| From foo@baz Thu Nov 9 09:48:01 CET 2017 |
| From: Marek Szyprowski <m.szyprowski@samsung.com> |
| Date: Thu, 26 Jan 2017 13:37:52 +0100 |
| Subject: clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks |
| |
| From: Marek Szyprowski <m.szyprowski@samsung.com> |
| |
| |
| [ Upstream commit 5ccb58968bf7f46dbd128df88f71838a5a9750b8 ] |
| |
| Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and |
| phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed |
| to setup initial clock configuration for display subsystem in device tree |
| in order to avoid dependency on the configuration left by the bootloader. |
| |
| Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> |
| Acked-by: Krzysztof Kozlowski <krzk@kernel.org> |
| Acked-by: Chanwoo Choi <cw00.choi@samsung.com> |
| Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> |
| Signed-off-by: Sasha Levin <alexander.levin@verizon.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/clk/samsung/clk-exynos5433.c | 6 ++++-- |
| include/dt-bindings/clock/exynos5433.h | 5 ++++- |
| 2 files changed, 8 insertions(+), 3 deletions(-) |
| |
| --- a/drivers/clk/samsung/clk-exynos5433.c |
| +++ b/drivers/clk/samsung/clk-exynos5433.c |
| @@ -2559,8 +2559,10 @@ static const struct samsung_fixed_rate_c |
| FRATE(0, "phyclk_mipidphy1_bitclkdiv8_phy", NULL, 0, 188000000), |
| FRATE(0, "phyclk_mipidphy1_rxclkesc0_phy", NULL, 0, 100000000), |
| /* PHY clocks from MIPI_DPHY0 */ |
| - FRATE(0, "phyclk_mipidphy0_bitclkdiv8_phy", NULL, 0, 188000000), |
| - FRATE(0, "phyclk_mipidphy0_rxclkesc0_phy", NULL, 0, 100000000), |
| + FRATE(CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY, "phyclk_mipidphy0_bitclkdiv8_phy", |
| + NULL, 0, 188000000), |
| + FRATE(CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY, "phyclk_mipidphy0_rxclkesc0_phy", |
| + NULL, 0, 100000000), |
| /* PHY clocks from HDMI_PHY */ |
| FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy", |
| NULL, 0, 300000000), |
| --- a/include/dt-bindings/clock/exynos5433.h |
| +++ b/include/dt-bindings/clock/exynos5433.h |
| @@ -771,7 +771,10 @@ |
| |
| #define CLK_PCLK_DECON 113 |
| |
| -#define DISP_NR_CLK 114 |
| +#define CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY 114 |
| +#define CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY 115 |
| + |
| +#define DISP_NR_CLK 116 |
| |
| /* CMU_AUD */ |
| #define CLK_MOUT_AUD_PLL_USER 1 |
