| From 6a6cba1d945a7511cdfaf338526871195e420762 Mon Sep 17 00:00:00 2001 |
| From: Paul Burton <paul.burton@mips.com> |
| Date: Tue, 31 Oct 2017 15:09:22 -0700 |
| Subject: MIPS: Fix CM region target definitions |
| |
| From: Paul Burton <paul.burton@mips.com> |
| |
| commit 6a6cba1d945a7511cdfaf338526871195e420762 upstream. |
| |
| The default CM target field in the GCR_BASE register is encoded with 0 |
| meaning memory & 1 being reserved. However the definitions we use for |
| those bits effectively get these two values backwards - likely because |
| they were copied from the definitions for the CM regions where the |
| target is encoded differently. This results in use setting up GCR_BASE |
| with the reserved target value by default, rather than targeting memory |
| as intended. Although we currently seem to get away with this it's not a |
| great idea to rely upon. |
| |
| Fix this by changing our macros to match the documentated target values. |
| |
| The incorrect encoding became used as of commit 9f98f3dd0c51 ("MIPS: Add |
| generic CM probe & access code") in the Linux v3.15 cycle, and was |
| likely carried forwards from older but unused code introduced by |
| commit 39b8d5254246 ("[MIPS] Add support for MIPS CMP platform.") in the |
| v2.6.26 cycle. |
| |
| Fixes: 9f98f3dd0c51 ("MIPS: Add generic CM probe & access code") |
| Signed-off-by: Paul Burton <paul.burton@mips.com> |
| Reported-by: Matt Redfearn <matt.redfearn@mips.com> |
| Reviewed-by: James Hogan <jhogan@kernel.org> |
| Cc: Matt Redfearn <matt.redfearn@mips.com> |
| Cc: Ralf Baechle <ralf@linux-mips.org> |
| Cc: linux-mips@linux-mips.org |
| Cc: <stable@vger.kernel.org> # v3.15+ |
| Patchwork: https://patchwork.linux-mips.org/patch/17562/ |
| Signed-off-by: James Hogan <jhogan@kernel.org> |
| [jhogan@kernel.org: Backported 3.15..4.13] |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/mips/include/asm/mips-cm.h | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| --- a/arch/mips/include/asm/mips-cm.h |
| +++ b/arch/mips/include/asm/mips-cm.h |
| @@ -239,8 +239,8 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80) |
| #define CM_GCR_BASE_GCRBASE_MSK (_ULCAST_(0x1ffff) << 15) |
| #define CM_GCR_BASE_CMDEFTGT_SHF 0 |
| #define CM_GCR_BASE_CMDEFTGT_MSK (_ULCAST_(0x3) << 0) |
| -#define CM_GCR_BASE_CMDEFTGT_DISABLED 0 |
| -#define CM_GCR_BASE_CMDEFTGT_MEM 1 |
| +#define CM_GCR_BASE_CMDEFTGT_MEM 0 |
| +#define CM_GCR_BASE_CMDEFTGT_RESERVED 1 |
| #define CM_GCR_BASE_CMDEFTGT_IOCU0 2 |
| #define CM_GCR_BASE_CMDEFTGT_IOCU1 3 |
| |
