| From 32864848050dde9e0932456a382619078c46705c Mon Sep 17 00:00:00 2001 |
| From: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| Date: Fri, 28 Sep 2018 16:33:06 +0900 |
| Subject: clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC |
| |
| [ Upstream commit b9df2ea2b8d09ad850afe4d4a0403cb23d9e0c02 ] |
| |
| The clock sources of the AXI-bus clock (266.66 MHz) used for Audio-DMAC |
| DMA transfers are: |
| |
| Channel R-Car H3 R-Car M3-W R-Car M3-N R-Car E3 |
| --------------------------------------------------------------- |
| Audio-DMAC0 S1D2 S1D2 S1D2 S1D2 |
| Audio-DMAC1 S1D2 S1D2 S1D2 - |
| |
| As a result, change the parent clocks of the Audio-DMAC{0,1} module |
| clocks on R-Car H3, R-Car M3-W, and R-Car M3-N to S1D2, and change the |
| parent clock of the Audio-DMAC0 module on R-Car E3 to S1D2. |
| |
| NOTE: This information will be reflected in a future revision of the |
| R-Car Gen3 Hardware Manual. |
| |
| Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> |
| [geert: Update R-Car D3, RZ/G2M, and RZ/G2E] |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/clk/renesas/r8a774a1-cpg-mssr.c | 4 ++-- |
| drivers/clk/renesas/r8a774c0-cpg-mssr.c | 2 +- |
| drivers/clk/renesas/r8a7795-cpg-mssr.c | 4 ++-- |
| drivers/clk/renesas/r8a7796-cpg-mssr.c | 4 ++-- |
| drivers/clk/renesas/r8a77965-cpg-mssr.c | 4 ++-- |
| drivers/clk/renesas/r8a77990-cpg-mssr.c | 2 +- |
| drivers/clk/renesas/r8a77995-cpg-mssr.c | 2 +- |
| 7 files changed, 11 insertions(+), 11 deletions(-) |
| |
| diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c |
| index 047599579c651..7a4c5957939a5 100644 |
| --- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c |
| @@ -143,8 +143,8 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = { |
| DEF_MOD("rwdt", 402, R8A774A1_CLK_R), |
| DEF_MOD("intc-ex", 407, R8A774A1_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A774A1_CLK_S0D3), |
| - DEF_MOD("audmac1", 501, R8A774A1_CLK_S0D3), |
| - DEF_MOD("audmac0", 502, R8A774A1_CLK_S0D3), |
| + DEF_MOD("audmac1", 501, R8A774A1_CLK_S1D2), |
| + DEF_MOD("audmac0", 502, R8A774A1_CLK_S1D2), |
| DEF_MOD("hscif4", 516, R8A774A1_CLK_S3D1), |
| DEF_MOD("hscif3", 517, R8A774A1_CLK_S3D1), |
| DEF_MOD("hscif2", 518, R8A774A1_CLK_S3D1), |
| diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c |
| index 34e274f2a273a..93dacd826fd04 100644 |
| --- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c |
| @@ -157,7 +157,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = { |
| DEF_MOD("intc-ex", 407, R8A774C0_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A774C0_CLK_S0D3), |
| |
| - DEF_MOD("audmac0", 502, R8A774C0_CLK_S3D4), |
| + DEF_MOD("audmac0", 502, R8A774C0_CLK_S1D2), |
| DEF_MOD("hscif4", 516, R8A774C0_CLK_S3D1C), |
| DEF_MOD("hscif3", 517, R8A774C0_CLK_S3D1C), |
| DEF_MOD("hscif2", 518, R8A774C0_CLK_S3D1C), |
| diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c |
| index eade38e9ed36b..0825cd0ff2866 100644 |
| --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c |
| @@ -153,8 +153,8 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { |
| DEF_MOD("rwdt", 402, R8A7795_CLK_R), |
| DEF_MOD("intc-ex", 407, R8A7795_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A7795_CLK_S0D3), |
| - DEF_MOD("audmac1", 501, R8A7795_CLK_S0D3), |
| - DEF_MOD("audmac0", 502, R8A7795_CLK_S0D3), |
| + DEF_MOD("audmac1", 501, R8A7795_CLK_S1D2), |
| + DEF_MOD("audmac0", 502, R8A7795_CLK_S1D2), |
| DEF_MOD("drif7", 508, R8A7795_CLK_S3D2), |
| DEF_MOD("drif6", 509, R8A7795_CLK_S3D2), |
| DEF_MOD("drif5", 510, R8A7795_CLK_S3D2), |
| diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| index 654f3ea88f335..997cd956f12bc 100644 |
| --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c |
| @@ -146,8 +146,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { |
| DEF_MOD("rwdt", 402, R8A7796_CLK_R), |
| DEF_MOD("intc-ex", 407, R8A7796_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A7796_CLK_S0D3), |
| - DEF_MOD("audmac1", 501, R8A7796_CLK_S0D3), |
| - DEF_MOD("audmac0", 502, R8A7796_CLK_S0D3), |
| + DEF_MOD("audmac1", 501, R8A7796_CLK_S1D2), |
| + DEF_MOD("audmac0", 502, R8A7796_CLK_S1D2), |
| DEF_MOD("drif7", 508, R8A7796_CLK_S3D2), |
| DEF_MOD("drif6", 509, R8A7796_CLK_S3D2), |
| DEF_MOD("drif5", 510, R8A7796_CLK_S3D2), |
| diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c |
| index 13d1f88be04a5..afc9c72fa0940 100644 |
| --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c |
| @@ -146,8 +146,8 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { |
| DEF_MOD("intc-ex", 407, R8A77965_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A77965_CLK_S0D3), |
| |
| - DEF_MOD("audmac1", 501, R8A77965_CLK_S0D3), |
| - DEF_MOD("audmac0", 502, R8A77965_CLK_S0D3), |
| + DEF_MOD("audmac1", 501, R8A77965_CLK_S1D2), |
| + DEF_MOD("audmac0", 502, R8A77965_CLK_S1D2), |
| DEF_MOD("drif7", 508, R8A77965_CLK_S3D2), |
| DEF_MOD("drif6", 509, R8A77965_CLK_S3D2), |
| DEF_MOD("drif5", 510, R8A77965_CLK_S3D2), |
| diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c |
| index 9a278c75c918c..03f445d47ef69 100644 |
| --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c |
| @@ -152,7 +152,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = { |
| DEF_MOD("intc-ex", 407, R8A77990_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A77990_CLK_S0D3), |
| |
| - DEF_MOD("audmac0", 502, R8A77990_CLK_S3D4), |
| + DEF_MOD("audmac0", 502, R8A77990_CLK_S1D2), |
| DEF_MOD("drif7", 508, R8A77990_CLK_S3D2), |
| DEF_MOD("drif6", 509, R8A77990_CLK_S3D2), |
| DEF_MOD("drif5", 510, R8A77990_CLK_S3D2), |
| diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c |
| index eee3874865a95..68707277b17b4 100644 |
| --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c |
| +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c |
| @@ -133,7 +133,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = { |
| DEF_MOD("rwdt", 402, R8A77995_CLK_R), |
| DEF_MOD("intc-ex", 407, R8A77995_CLK_CP), |
| DEF_MOD("intc-ap", 408, R8A77995_CLK_S1D2), |
| - DEF_MOD("audmac0", 502, R8A77995_CLK_S3D1), |
| + DEF_MOD("audmac0", 502, R8A77995_CLK_S1D2), |
| DEF_MOD("hscif3", 517, R8A77995_CLK_S3D1C), |
| DEF_MOD("hscif0", 520, R8A77995_CLK_S3D1C), |
| DEF_MOD("thermal", 522, R8A77995_CLK_CP), |
| -- |
| 2.20.1 |
| |