| From 4000388708159795fc55a857656dc49b3e4bed1d Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 3 Mar 2021 11:31:03 +0800 |
| Subject: arm64: dts: qcom: sdm845: fix number of pins in 'gpio-ranges' |
| |
| From: Shawn Guo <shawn.guo@linaro.org> |
| |
| [ Upstream commit 02058fc3839df65ff64de2a6b1c5de8c9fd705c1 ] |
| |
| The last cell of 'gpio-ranges' should be number of GPIO pins, and in |
| case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather |
| than msm_pinctrl_soc_data.ngpio - 1. |
| |
| This fixes the problem that when the last GPIO pin in the range is |
| configured with the following call sequence, it always fails with |
| -EPROBE_DEFER. |
| |
| pinctrl_gpio_set_config() |
| pinctrl_get_device_gpio_range() |
| pinctrl_match_gpio_range() |
| |
| Fixes: bc2c806293c6 ("arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node") |
| Cc: Evan Green <evgreen@chromium.org> |
| Signed-off-by: Shawn Guo <shawn.guo@linaro.org> |
| Link: https://lore.kernel.org/r/20210303033106.549-2-shawn.guo@linaro.org |
| Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi |
| index bcf888381f14..efefffaecc6c 100644 |
| --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi |
| +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi |
| @@ -2384,7 +2384,7 @@ |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| - gpio-ranges = <&tlmm 0 0 150>; |
| + gpio-ranges = <&tlmm 0 0 151>; |
| wakeup-parent = <&pdc_intc>; |
| |
| cci0_default: cci0-default { |
| -- |
| 2.30.2 |
| |