| From 67ee8e8ee5c7d5c9e5d42abf712a1b6578b3d468 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 19 Mar 2021 17:21:33 +0200 |
| Subject: pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is |
| not zero |
| |
| From: Hanna Hawa <hhhawa@amazon.com> |
| |
| [ Upstream commit bd85125ea88513f637a62a72e8949c579c5c0a87 ] |
| |
| A System Error (SError, followed by kernel panic) was detected when |
| trying to print the supported pins in a pinctrl device which supports |
| multiple pins per register. This change fixes the pcs_pin_dbg_show() in |
| pinctrl-single driver when bits_per_mux is not zero. In addition move |
| offset calculation and pin offset in register to common function. |
| |
| Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules") |
| Signed-off-by: Hanna Hawa <hhhawa@amazon.com> |
| Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> |
| Reviewed-by: Tony Lindgren <tony@atomide.com> |
| Reviewed-by: Drew Fustini <drew@beagleboard.org> |
| Link: https://lore.kernel.org/r/20210319152133.28705-4-hhhawa@amazon.com |
| Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/pinctrl/pinctrl-single.c | 55 ++++++++++++++++++++------------ |
| 1 file changed, 35 insertions(+), 20 deletions(-) |
| |
| diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c |
| index 539543898c89..12cc4eb18637 100644 |
| --- a/drivers/pinctrl/pinctrl-single.c |
| +++ b/drivers/pinctrl/pinctrl-single.c |
| @@ -270,20 +270,44 @@ static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg) |
| writel(val, reg); |
| } |
| |
| +static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs, |
| + unsigned int pin) |
| +{ |
| + unsigned int mux_bytes = pcs->width / BITS_PER_BYTE; |
| + |
| + if (pcs->bits_per_mux) { |
| + unsigned int pin_offset_bytes; |
| + |
| + pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; |
| + return (pin_offset_bytes / mux_bytes) * mux_bytes; |
| + } |
| + |
| + return pin * mux_bytes; |
| +} |
| + |
| +static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs, |
| + unsigned int pin) |
| +{ |
| + return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin; |
| +} |
| + |
| static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev, |
| struct seq_file *s, |
| unsigned pin) |
| { |
| struct pcs_device *pcs; |
| - unsigned val, mux_bytes; |
| + unsigned int val; |
| unsigned long offset; |
| size_t pa; |
| |
| pcs = pinctrl_dev_get_drvdata(pctldev); |
| |
| - mux_bytes = pcs->width / BITS_PER_BYTE; |
| - offset = pin * mux_bytes; |
| + offset = pcs_pin_reg_offset_get(pcs, pin); |
| val = pcs->read(pcs->base + offset); |
| + |
| + if (pcs->bits_per_mux) |
| + val &= pcs->fmask << pcs_pin_shift_reg_get(pcs, pin); |
| + |
| pa = pcs->res->start + offset; |
| |
| seq_printf(s, "%zx %08x %s ", pa, val, DRIVER_NAME); |
| @@ -384,7 +408,6 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, |
| struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); |
| struct pcs_gpiofunc_range *frange = NULL; |
| struct list_head *pos, *tmp; |
| - int mux_bytes = 0; |
| unsigned data; |
| |
| /* If function mask is null, return directly. */ |
| @@ -392,29 +415,27 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev, |
| return -ENOTSUPP; |
| |
| list_for_each_safe(pos, tmp, &pcs->gpiofuncs) { |
| + u32 offset; |
| + |
| frange = list_entry(pos, struct pcs_gpiofunc_range, node); |
| if (pin >= frange->offset + frange->npins |
| || pin < frange->offset) |
| continue; |
| - mux_bytes = pcs->width / BITS_PER_BYTE; |
| |
| - if (pcs->bits_per_mux) { |
| - int byte_num, offset, pin_shift; |
| + offset = pcs_pin_reg_offset_get(pcs, pin); |
| |
| - byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; |
| - offset = (byte_num / mux_bytes) * mux_bytes; |
| - pin_shift = pin % (pcs->width / pcs->bits_per_pin) * |
| - pcs->bits_per_pin; |
| + if (pcs->bits_per_mux) { |
| + int pin_shift = pcs_pin_shift_reg_get(pcs, pin); |
| |
| data = pcs->read(pcs->base + offset); |
| data &= ~(pcs->fmask << pin_shift); |
| data |= frange->gpiofunc << pin_shift; |
| pcs->write(data, pcs->base + offset); |
| } else { |
| - data = pcs->read(pcs->base + pin * mux_bytes); |
| + data = pcs->read(pcs->base + offset); |
| data &= ~pcs->fmask; |
| data |= frange->gpiofunc; |
| - pcs->write(data, pcs->base + pin * mux_bytes); |
| + pcs->write(data, pcs->base + offset); |
| } |
| break; |
| } |
| @@ -726,14 +747,8 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs) |
| for (i = 0; i < pcs->desc.npins; i++) { |
| unsigned offset; |
| int res; |
| - int byte_num; |
| |
| - if (pcs->bits_per_mux) { |
| - byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE; |
| - offset = (byte_num / mux_bytes) * mux_bytes; |
| - } else { |
| - offset = i * mux_bytes; |
| - } |
| + offset = pcs_pin_reg_offset_get(pcs, i); |
| res = pcs_add_pin(pcs, offset); |
| if (res < 0) { |
| dev_err(pcs->dev, "error adding pins: %i\n", res); |
| -- |
| 2.30.2 |
| |