| From fd6143db0448e81db8a5b75a715b27709f110e82 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 19 Nov 2021 16:03:13 +0100 |
| Subject: mtd: rawnand: Fix nand_erase_op delay |
| |
| From: Herve Codina <herve.codina@bootlin.com> |
| |
| [ Upstream commit 16d8b628a4152e8e8b01b6a1d82e30208ee2dd30 ] |
| |
| NAND_OP_CMD() expects a delay parameter in nanoseconds. |
| The delay value is wrongly given in milliseconds. |
| |
| Fix the conversion macro used in order to set this |
| delay in nanoseconds. |
| |
| Fixes: d7a773e8812b ("mtd: rawnand: Access SDR and NV-DDR timings through a common macro") |
| Signed-off-by: Herve Codina <herve.codina@bootlin.com> |
| Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> |
| Link: https://lore.kernel.org/linux-mtd/20211119150316.43080-2-herve.codina@bootlin.com |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/mtd/nand/raw/nand_base.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c |
| index 3d6c6e8805207..5c6b065837eff 100644 |
| --- a/drivers/mtd/nand/raw/nand_base.c |
| +++ b/drivers/mtd/nand/raw/nand_base.c |
| @@ -1837,7 +1837,7 @@ int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock) |
| NAND_OP_CMD(NAND_CMD_ERASE1, 0), |
| NAND_OP_ADDR(2, addrs, 0), |
| NAND_OP_CMD(NAND_CMD_ERASE2, |
| - NAND_COMMON_TIMING_MS(conf, tWB_max)), |
| + NAND_COMMON_TIMING_NS(conf, tWB_max)), |
| NAND_OP_WAIT_RDY(NAND_COMMON_TIMING_MS(conf, tBERS_max), |
| 0), |
| }; |
| -- |
| 2.33.0 |
| |
