| From aa3e146d04b6ae37939daeebaec060562b3db559 Mon Sep 17 00:00:00 2001 |
| From: Alex Deucher <alexander.deucher@amd.com> |
| Date: Tue, 1 Oct 2013 16:40:45 -0400 |
| Subject: drm/radeon: fix typo in CP DMA register headers |
| |
| From: Alex Deucher <alexander.deucher@amd.com> |
| |
| commit aa3e146d04b6ae37939daeebaec060562b3db559 upstream. |
| |
| Wrong bit offset for SRC endian swapping. |
| |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/radeon/evergreend.h | 4 ++-- |
| drivers/gpu/drm/radeon/r600d.h | 2 +- |
| drivers/gpu/drm/radeon/sid.h | 4 ++-- |
| 3 files changed, 5 insertions(+), 5 deletions(-) |
| |
| --- a/drivers/gpu/drm/radeon/evergreend.h |
| +++ b/drivers/gpu/drm/radeon/evergreend.h |
| @@ -1104,7 +1104,7 @@ |
| * 6. COMMAND [29:22] | BYTE_COUNT [20:0] |
| */ |
| # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) |
| - /* 0 - SRC_ADDR |
| + /* 0 - DST_ADDR |
| * 1 - GDS |
| */ |
| # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) |
| @@ -1119,7 +1119,7 @@ |
| # define PACKET3_CP_DMA_CP_SYNC (1 << 31) |
| /* COMMAND */ |
| # define PACKET3_CP_DMA_DIS_WC (1 << 21) |
| -# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) |
| +# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) |
| /* 0 - none |
| * 1 - 8 in 16 |
| * 2 - 8 in 32 |
| --- a/drivers/gpu/drm/radeon/r600d.h |
| +++ b/drivers/gpu/drm/radeon/r600d.h |
| @@ -1259,7 +1259,7 @@ |
| */ |
| # define PACKET3_CP_DMA_CP_SYNC (1 << 31) |
| /* COMMAND */ |
| -# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) |
| +# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) |
| /* 0 - none |
| * 1 - 8 in 16 |
| * 2 - 8 in 32 |
| --- a/drivers/gpu/drm/radeon/sid.h |
| +++ b/drivers/gpu/drm/radeon/sid.h |
| @@ -928,7 +928,7 @@ |
| * 6. COMMAND [30:21] | BYTE_COUNT [20:0] |
| */ |
| # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) |
| - /* 0 - SRC_ADDR |
| + /* 0 - DST_ADDR |
| * 1 - GDS |
| */ |
| # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) |
| @@ -943,7 +943,7 @@ |
| # define PACKET3_CP_DMA_CP_SYNC (1 << 31) |
| /* COMMAND */ |
| # define PACKET3_CP_DMA_DIS_WC (1 << 21) |
| -# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) |
| +# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) |
| /* 0 - none |
| * 1 - 8 in 16 |
| * 2 - 8 in 32 |
