| From 2ccdef959392ac042d56a3fd4afe8fd09909890a Mon Sep 17 00:00:00 2001 |
| From: Jerome Brunet <jbrunet@baylibre.com> |
| Date: Wed, 1 Aug 2018 16:00:51 +0200 |
| Subject: clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary |
| |
| [ Upstream commit 2303a9ca693e585a558497ad737728fec97e2b8a ] |
| |
| CLK_GET_RATE_NOCACHE should only be necessary when the registers |
| controlling the rate of clock may change outside of CCF. On Amlogic, |
| it should only be the case for the hdmi pll which is directly controlled |
| by the display driver (WIP to fix this). |
| |
| The other plls should not require this flag. |
| |
| Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/clk/meson/axg.c | 1 - |
| drivers/clk/meson/gxbb.c | 12 ++++++++---- |
| drivers/clk/meson/meson8b.c | 3 --- |
| 3 files changed, 8 insertions(+), 8 deletions(-) |
| |
| diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c |
| index baabcf7c0a24..02229d051d77 100644 |
| --- a/drivers/clk/meson/axg.c |
| +++ b/drivers/clk/meson/axg.c |
| @@ -96,7 +96,6 @@ static struct clk_regmap axg_sys_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c |
| index 6435d86118f1..6628ffa31383 100644 |
| --- a/drivers/clk/meson/gxbb.c |
| +++ b/drivers/clk/meson/gxbb.c |
| @@ -213,7 +213,6 @@ static struct clk_regmap gxbb_fixed_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| @@ -276,6 +275,10 @@ static struct clk_regmap gxbb_hdmi_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "hdmi_pll_pre_mult" }, |
| .num_parents = 1, |
| + /* |
| + * Display directly handle hdmi pll registers ATM, we need |
| + * NOCACHE to keep our view of the clock as accurate as possible |
| + */ |
| .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| @@ -334,6 +337,10 @@ static struct clk_regmap gxl_hdmi_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| + /* |
| + * Display directly handle hdmi pll registers ATM, we need |
| + * NOCACHE to keep our view of the clock as accurate as possible |
| + */ |
| .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| @@ -371,7 +378,6 @@ static struct clk_regmap gxbb_sys_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| @@ -418,7 +424,6 @@ static struct clk_regmap gxbb_gp0_pll = { |
| .ops = &meson_clk_pll_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| @@ -472,7 +477,6 @@ static struct clk_regmap gxl_gp0_pll = { |
| .ops = &meson_clk_pll_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c |
| index 7447d96a265f..74697e145dde 100644 |
| --- a/drivers/clk/meson/meson8b.c |
| +++ b/drivers/clk/meson/meson8b.c |
| @@ -132,7 +132,6 @@ static struct clk_regmap meson8b_fixed_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| @@ -169,7 +168,6 @@ static struct clk_regmap meson8b_vid_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| @@ -207,7 +205,6 @@ static struct clk_regmap meson8b_sys_pll = { |
| .ops = &meson_clk_pll_ro_ops, |
| .parent_names = (const char *[]){ "xtal" }, |
| .num_parents = 1, |
| - .flags = CLK_GET_RATE_NOCACHE, |
| }, |
| }; |
| |
| -- |
| 2.17.1 |
| |