| From fa4103ccc3071eff3eeceab6fe6708375b42b613 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 28 Jan 2020 17:09:52 +0100 |
| Subject: radeon: insert 10ms sleep in dce5_crtc_load_lut |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Daniel Vetter <daniel.vetter@ffwll.ch> |
| |
| [ Upstream commit ec3d65082d7dabad6fa8f66a8ef166f2d522d6b2 ] |
| |
| Per at least one tester this is enough magic to recover the regression |
| introduced for some people (but not all) in |
| |
| commit b8e2b0199cc377617dc238f5106352c06dcd3fa2 |
| Author: Peter Rosin <peda@axentia.se> |
| Date: Tue Jul 4 12:36:57 2017 +0200 |
| |
| drm/fb-helper: factor out pseudo-palette |
| |
| which for radeon had the side-effect of refactoring out a seemingly |
| redudant writing of the color palette. |
| |
| 10ms in a fairly slow modeset path feels like an acceptable form of |
| duct-tape, so maybe worth a shot and see what sticks. |
| |
| Cc: Alex Deucher <alexander.deucher@amd.com> |
| Cc: Michel Dรคnzer <michel.daenzer@amd.com> |
| References: https://bugzilla.kernel.org/show_bug.cgi?id=198123 |
| Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/radeon/radeon_display.c | 2 ++ |
| 1 file changed, 2 insertions(+) |
| |
| diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c |
| index e81b01f8db90e..0826efd9b5f51 100644 |
| --- a/drivers/gpu/drm/radeon/radeon_display.c |
| +++ b/drivers/gpu/drm/radeon/radeon_display.c |
| @@ -127,6 +127,8 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc) |
| |
| DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); |
| |
| + msleep(10); |
| + |
| WREG32(NI_INPUT_CSC_CONTROL + radeon_crtc->crtc_offset, |
| (NI_INPUT_CSC_GRPH_MODE(NI_INPUT_CSC_BYPASS) | |
| NI_INPUT_CSC_OVL_MODE(NI_INPUT_CSC_BYPASS))); |
| -- |
| 2.20.1 |
| |
