| From 0d8957c8a90bbb5d34fab9a304459448a5131e06 Mon Sep 17 00:00:00 2001 |
| From: Daniel Vetter <daniel.vetter@ffwll.ch> |
| Date: Tue, 7 Aug 2012 09:54:14 +0200 |
| Subject: drm/i915: correctly order the ring init sequence |
| |
| From: Daniel Vetter <daniel.vetter@ffwll.ch> |
| |
| commit 0d8957c8a90bbb5d34fab9a304459448a5131e06 upstream. |
| |
| We may only start to set up the new register values after having |
| confirmed that the ring is truely off. Otherwise the hw might lose the |
| newly written register values. This is caught later on in the init |
| sequence, when we check whether the register writes have stuck. |
| |
| Reviewed-by: Jani Nikula <jani.nikula@intel.com> |
| Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50522 |
| Tested-by: Yang Guang <guang.a.yang@intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++-- |
| 1 file changed, 5 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/gpu/drm/i915/intel_ringbuffer.c |
| +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c |
| @@ -150,8 +150,6 @@ static int init_ring_common(struct intel |
| I915_WRITE_HEAD(ring, 0); |
| ring->write_tail(ring, 0); |
| |
| - /* Initialize the ring. */ |
| - I915_WRITE_START(ring, obj->gtt_offset); |
| head = I915_READ_HEAD(ring) & HEAD_ADDR; |
| |
| /* G45 ring initialization fails to reset head to zero */ |
| @@ -177,6 +175,11 @@ static int init_ring_common(struct intel |
| } |
| } |
| |
| + /* Initialize the ring. This must happen _after_ we've cleared the ring |
| + * registers with the above sequence (the readback of the HEAD registers |
| + * also enforces ordering), otherwise the hw might lose the new ring |
| + * register values. */ |
| + I915_WRITE_START(ring, obj->gtt_offset); |
| I915_WRITE_CTL(ring, |
| ((ring->size - PAGE_SIZE) & RING_NR_PAGES) |
| | RING_REPORT_64K | RING_VALID); |
