| From 7b119fd1bdc59a8060df5b659b9f7a70e0169fd6 Mon Sep 17 00:00:00 2001 |
| From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
| Date: Thu, 23 Jan 2014 23:38:04 +0100 |
| Subject: irqchip: orion: clear bridge cause register on init |
| |
| From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
| |
| commit 7b119fd1bdc59a8060df5b659b9f7a70e0169fd6 upstream. |
| |
| It is good practice to mask and clear pending irqs on init. We already |
| mask all irqs, so also clear the bridge irq cause register. |
| |
| Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
| Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
| Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/irqchip/irq-orion.c | 3 ++- |
| 1 file changed, 2 insertions(+), 1 deletion(-) |
| |
| --- a/drivers/irqchip/irq-orion.c |
| +++ b/drivers/irqchip/irq-orion.c |
| @@ -180,8 +180,9 @@ static int __init orion_bridge_irq_init( |
| gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; |
| gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; |
| |
| - /* mask all interrupts */ |
| + /* mask and clear all interrupts */ |
| writel(0, gc->reg_base + ORION_BRIDGE_IRQ_MASK); |
| + writel(0, gc->reg_base + ORION_BRIDGE_IRQ_CAUSE); |
| |
| irq_set_handler_data(irq, domain); |
| irq_set_chained_handler(irq, orion_bridge_irq_handler); |