| From 1180e20606fd7c5d76dc5b2a1594fa51ba5a0f31 Mon Sep 17 00:00:00 2001 |
| From: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| Date: Tue, 7 Oct 2014 18:02:52 -0300 |
| Subject: drm/i915: properly reenable gen8 pipe IRQs |
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| |
| From: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| |
| commit 1180e20606fd7c5d76dc5b2a1594fa51ba5a0f31 upstream. |
| |
| We were missing the pipe B/C vblank bits! Take a look at |
| gen8_de_irq_postinstall for a comparison. |
| |
| This should fix a bunch of IGT tests. |
| |
| There are a few more things we could improve on this code, but this |
| should be the minimal fix to unblock us. |
| |
| v2: s/extra_iir/extra_ier/ because IIR doesn't make sense (Ville) |
| |
| Bugzilla:https://bugs.freedesktop.org/show_bug.cgi?id=83640 |
| Testcase: igt/* |
| Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
| Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Signed-off-by: Jani Nikula <jani.nikula@intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/i915/i915_irq.c | 5 +++-- |
| 1 file changed, 3 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/gpu/drm/i915/i915_irq.c |
| +++ b/drivers/gpu/drm/i915/i915_irq.c |
| @@ -3482,12 +3482,13 @@ static void gen8_irq_reset(struct drm_de |
| void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv) |
| { |
| unsigned long irqflags; |
| + uint32_t extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN; |
| |
| spin_lock_irqsave(&dev_priv->irq_lock, irqflags); |
| GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_B, dev_priv->de_irq_mask[PIPE_B], |
| - ~dev_priv->de_irq_mask[PIPE_B]); |
| + ~dev_priv->de_irq_mask[PIPE_B] | extra_ier); |
| GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_C, dev_priv->de_irq_mask[PIPE_C], |
| - ~dev_priv->de_irq_mask[PIPE_C]); |
| + ~dev_priv->de_irq_mask[PIPE_C] | extra_ier); |
| spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
| } |
| |