| From 5cc7b04740effa5cc0af53f434134b5859d58b73 Mon Sep 17 00:00:00 2001 |
| From: Alexander Stein <alexander.stein@systec-electronic.com> |
| Date: Tue, 4 Nov 2014 09:20:18 +0100 |
| Subject: spi: fsl-dspi: Fix CTAR selection |
| |
| From: Alexander Stein <alexander.stein@systec-electronic.com> |
| |
| commit 5cc7b04740effa5cc0af53f434134b5859d58b73 upstream. |
| |
| There are only 4 CTAR registers (CTAR0 - CTAR3) so we can only use the |
| lower 2 bits of the chip select to select a CTAR register. |
| SPI_PUSHR_CTAS used the lower 3 bits which would result in wrong bit values |
| if the chip selects 4/5 are used. For those chip selects SPI_CTAR even |
| calculated offsets of non-existing registers. |
| |
| Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> |
| Signed-off-by: Mark Brown <broonie@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/spi/spi-fsl-dspi.c | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| --- a/drivers/spi/spi-fsl-dspi.c |
| +++ b/drivers/spi/spi-fsl-dspi.c |
| @@ -46,7 +46,7 @@ |
| |
| #define SPI_TCR 0x08 |
| |
| -#define SPI_CTAR(x) (0x0c + (x * 4)) |
| +#define SPI_CTAR(x) (0x0c + (((x) & 0x3) * 4)) |
| #define SPI_CTAR_FMSZ(x) (((x) & 0x0000000f) << 27) |
| #define SPI_CTAR_CPOL(x) ((x) << 26) |
| #define SPI_CTAR_CPHA(x) ((x) << 25) |
| @@ -70,7 +70,7 @@ |
| |
| #define SPI_PUSHR 0x34 |
| #define SPI_PUSHR_CONT (1 << 31) |
| -#define SPI_PUSHR_CTAS(x) (((x) & 0x00000007) << 28) |
| +#define SPI_PUSHR_CTAS(x) (((x) & 0x00000003) << 28) |
| #define SPI_PUSHR_EOQ (1 << 27) |
| #define SPI_PUSHR_CTCNT (1 << 26) |
| #define SPI_PUSHR_PCS(x) (((1 << x) & 0x0000003f) << 16) |
