| From foo@baz Sun Jun 17 12:07:33 CEST 2018 |
| From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| Date: Mon, 26 Mar 2018 23:17:43 +0200 |
| Subject: ARM64: dts: meson-gxm: add GXM specific USB host configuration |
| |
| From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| |
| [ Upstream commit 458baa95c86406c81c6ebac0a98d1689075a3ec4 ] |
| |
| The USB configuration on GXM is slightly different than on GXL. The dwc3 |
| controller's internal hub has three USB2 ports (instead of 2 on GXL) |
| along with a dedicated USB2 PHY for this port. However, it seems that |
| there are no pins on GXM which would allow connecting the third port to |
| a physical USB port. |
| Passing the third PHY is required though, because without it none of the |
| other USB ports is working (this seems to be a limitation of how the |
| internal USB hub works, if one PHY is disabled then no USB port works). |
| |
| Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| Signed-off-by: Kevin Hilman <khilman@baylibre.com> |
| Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 17 +++++++++++++++++ |
| 1 file changed, 17 insertions(+) |
| |
| --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi |
| +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi |
| @@ -117,6 +117,19 @@ |
| }; |
| }; |
| |
| +&apb { |
| + usb2_phy2: phy@78040 { |
| + compatible = "amlogic,meson-gxl-usb2-phy"; |
| + #phy-cells = <0>; |
| + reg = <0x0 0x78040 0x0 0x20>; |
| + clocks = <&clkc CLKID_USB>; |
| + clock-names = "phy"; |
| + resets = <&reset RESET_USB_OTG>; |
| + reset-names = "phy"; |
| + status = "okay"; |
| + }; |
| +}; |
| + |
| &clkc_AO { |
| compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; |
| }; |
| @@ -137,3 +150,7 @@ |
| &hdmi_tx { |
| compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; |
| }; |
| + |
| +&dwc3 { |
| + phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; |
| +}; |