| From foo@baz Sun Jun 17 12:07:33 CEST 2018 |
| From: Masahiro Yamada <yamada.masahiro@socionext.com> |
| Date: Thu, 12 Apr 2018 11:31:31 +0900 |
| Subject: arm64: dts: uniphier: fix input delay value for legacy mode of eMMC |
| |
| From: Masahiro Yamada <yamada.masahiro@socionext.com> |
| |
| [ Upstream commit f4e5200fc0d7dad75c688e7ccc0652481a916df5 ] |
| |
| The property of the legacy mode for the eMMC PHY turned out to |
| be wrong. Some eMMC devices are unstable due to the set-up/hold |
| timing violation. Correct the delay value. |
| |
| Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
| Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 2 +- |
| arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +- |
| arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 2 +- |
| 3 files changed, 3 insertions(+), 3 deletions(-) |
| |
| --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi |
| +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi |
| @@ -330,7 +330,7 @@ |
| mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| mmc-pwrseq = <&emmc_pwrseq>; |
| - cdns,phy-input-delay-legacy = <4>; |
| + cdns,phy-input-delay-legacy = <9>; |
| cdns,phy-input-delay-mmc-highspeed = <2>; |
| cdns,phy-input-delay-mmc-ddr = <3>; |
| cdns,phy-dll-delay-sdclk = <21>; |
| --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi |
| +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi |
| @@ -435,7 +435,7 @@ |
| mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| mmc-pwrseq = <&emmc_pwrseq>; |
| - cdns,phy-input-delay-legacy = <4>; |
| + cdns,phy-input-delay-legacy = <9>; |
| cdns,phy-input-delay-mmc-highspeed = <2>; |
| cdns,phy-input-delay-mmc-ddr = <3>; |
| cdns,phy-dll-delay-sdclk = <21>; |
| --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi |
| +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi |
| @@ -336,7 +336,7 @@ |
| mmc-ddr-1_8v; |
| mmc-hs200-1_8v; |
| mmc-pwrseq = <&emmc_pwrseq>; |
| - cdns,phy-input-delay-legacy = <4>; |
| + cdns,phy-input-delay-legacy = <9>; |
| cdns,phy-input-delay-mmc-highspeed = <2>; |
| cdns,phy-input-delay-mmc-ddr = <3>; |
| cdns,phy-dll-delay-sdclk = <21>; |
