| From 7524a9e41d39d989ca198415d0e089ead798667e Mon Sep 17 00:00:00 2001 |
| From: Talons Lee <xin.li@citrix.com> |
| Date: Mon, 10 Dec 2018 18:03:00 +0800 |
| Subject: always clear the X2APIC_ENABLE bit for PV guest |
| |
| [ Upstream commit 5268c8f39e0efef81af2aaed160272d9eb507beb ] |
| |
| Commit e657fcc clears cpu capability bit instead of using fake cpuid |
| value, the EXTD should always be off for PV guest without depending |
| on cpuid value. So remove the cpuid check in xen_read_msr_safe() to |
| always clear the X2APIC_ENABLE bit. |
| |
| Signed-off-by: Talons Lee <xin.li@citrix.com> |
| Reviewed-by: Juergen Gross <jgross@suse.com> |
| Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/x86/xen/enlighten_pv.c | 5 +---- |
| 1 file changed, 1 insertion(+), 4 deletions(-) |
| |
| diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c |
| index 2f6787fc71066..c54a493e139a7 100644 |
| --- a/arch/x86/xen/enlighten_pv.c |
| +++ b/arch/x86/xen/enlighten_pv.c |
| @@ -898,10 +898,7 @@ static u64 xen_read_msr_safe(unsigned int msr, int *err) |
| val = native_read_msr_safe(msr, err); |
| switch (msr) { |
| case MSR_IA32_APICBASE: |
| -#ifdef CONFIG_X86_X2APIC |
| - if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) |
| -#endif |
| - val &= ~X2APIC_ENABLE; |
| + val &= ~X2APIC_ENABLE; |
| break; |
| } |
| return val; |
| -- |
| 2.19.1 |
| |
