| From de1ab6af5c3d92c0a031083962a7ff270cf301b7 Mon Sep 17 00:00:00 2001 |
| From: Takashi Iwai <tiwai@suse.de> |
| Date: Mon, 2 Nov 2015 17:35:34 +0100 |
| Subject: ALSA: hda - Fix lost 4k BDL boundary workaround |
| |
| From: Takashi Iwai <tiwai@suse.de> |
| |
| commit de1ab6af5c3d92c0a031083962a7ff270cf301b7 upstream. |
| |
| During the migration to HDA core code, we lost the workaround for 4k |
| BDL boundary. The flag exists in the new hdac_bus, but it's never |
| set. This resulted in the sudden sound stall on some controllers that |
| require this workaround like Creative Recon3D. |
| |
| This patch fixes the issue by setting the flag for such controllers |
| properly. |
| |
| Fixes: ccc98865aa44 ('ALSA: hda - Migrate more hdac_stream codes') |
| Signed-off-by: Takashi Iwai <tiwai@suse.de> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| sound/pci/hda/hda_controller.c | 3 +++ |
| 1 file changed, 3 insertions(+) |
| |
| --- a/sound/pci/hda/hda_controller.c |
| +++ b/sound/pci/hda/hda_controller.c |
| @@ -1059,6 +1059,9 @@ int azx_bus_init(struct azx *chip, const |
| bus->needs_damn_long_delay = 1; |
| } |
| |
| + if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY) |
| + bus->core.align_bdle_4k = true; |
| + |
| /* AMD chipsets often cause the communication stalls upon certain |
| * sequence like the pin-detection. It seems that forcing the synced |
| * access works around the stall. Grrr... |
