| From 1f3dc3e334c1192ebe2939ea17ba12f4776f90c3 Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com> |
| Date: Tue, 29 Nov 2016 16:13:57 +0200 |
| Subject: drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
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| |
| From: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| |
| commit 1f3dc3e334c1192ebe2939ea17ba12f4776f90c3 upstream. |
| |
| Looks like we're only initializing dev_priv->atomic_cdclk_freq |
| at resume and commit times, not at init time. Let's do that as |
| well. |
| |
| We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in |
| hsw_compute_linetime_wm() on account of populating |
| intel_state->cdclk from dev_priv->atomic_cdclk_freq. |
| Previously we were mispopulating intel_state->cdclk with |
| dev_priv->cdclk_freq which always had a proper value at init |
| time and hence the WARN_ON() didn't trigger. |
| |
| Cc: Matthew Auld <matthew.auld@intel.com> |
| Reported-by: Matthew Auld <matthew.auld@intel.com> |
| Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902 |
| Fixes: 14676ec6b1a6 ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things") |
| Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Link: http://patchwork.freedesktop.org/patch/msgid/1480428837-4207-1-git-send-email-ville.syrjala@linux.intel.com |
| Tested-by: Matthew Auld <matthew.auld@intel.com> |
| Reviewed-by: Matthew Auld <matthew.auld@intel.com> |
| (cherry picked from commit 6a259b1f8a9e99b1ed114f8bf8b0cfccee130e54) |
| Signed-off-by: Jani Nikula <jani.nikula@intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/i915/intel_display.c | 1 + |
| 1 file changed, 1 insertion(+) |
| |
| --- a/drivers/gpu/drm/i915/intel_display.c |
| +++ b/drivers/gpu/drm/i915/intel_display.c |
| @@ -15904,6 +15904,7 @@ void intel_modeset_init(struct drm_devic |
| |
| intel_update_czclk(dev_priv); |
| intel_update_cdclk(dev); |
| + dev_priv->atomic_cdclk_freq = dev_priv->cdclk_freq; |
| |
| intel_shared_dpll_init(dev); |
| |