| From foo@baz Tue Aug 14 16:14:56 CEST 2018 |
| From: Jim Mattson <jmattson@google.com> |
| Date: Tue, 4 Oct 2016 10:48:38 -0700 |
| Subject: kvm: nVMX: Update MSR load counts on a VMCS switch |
| |
| From: Jim Mattson <jmattson@google.com> |
| |
| Commit 83bafef1a131d1b8743d63658a180948bc880a74 upstream |
| |
| When L0 establishes (or removes) an MSR entry in the VM-entry or VM-exit |
| MSR load lists, the change should affect the dormant VMCS as well as the |
| current VMCS. Moreover, the vmcs02 MSR-load addresses should be |
| initialized. |
| |
| [ dwmw2: Pulled in to 4.9 backports for L1TF ] |
| |
| Signed-off-by: Jim Mattson <jmattson@google.com> |
| Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> |
| Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/x86/kvm/vmx.c | 11 +++++++++++ |
| 1 file changed, 11 insertions(+) |
| |
| --- a/arch/x86/kvm/vmx.c |
| +++ b/arch/x86/kvm/vmx.c |
| @@ -10221,6 +10221,15 @@ static void prepare_vmcs02(struct kvm_vc |
| vmx_set_constant_host_state(vmx); |
| |
| /* |
| + * Set the MSR load/store lists to match L0's settings. |
| + */ |
| + vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0); |
| + vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.nr); |
| + vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host)); |
| + vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.nr); |
| + vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest)); |
| + |
| + /* |
| * HOST_RSP is normally set correctly in vmx_vcpu_run() just before |
| * entry, but only if the current (host) sp changed from the value |
| * we wrote last (vmx->host_rsp). This cache is no longer relevant |
| @@ -11067,6 +11076,8 @@ static void nested_vmx_vmexit(struct kvm |
| load_vmcs12_host_state(vcpu, vmcs12); |
| |
| /* Update any VMCS fields that might have changed while L2 ran */ |
| + vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.nr); |
| + vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.nr); |
| vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset); |
| if (vmx->hv_deadline_tsc == -1) |
| vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL, |
