| From foo@baz Tue Aug 14 16:14:56 CEST 2018 |
| From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
| Date: Wed, 20 Jun 2018 16:42:57 -0400 |
| Subject: x86/bugs: Move the l1tf function and define pr_fmt properly |
| |
| From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
| |
| commit 56563f53d3066afa9e63d6c997bf67e76a8b05c0 upstream |
| |
| The pr_warn in l1tf_select_mitigation would have used the prior pr_fmt |
| which was defined as "Spectre V2 : ". |
| |
| Move the function to be past SSBD and also define the pr_fmt. |
| |
| Fixes: 17dbca119312 ("x86/speculation/l1tf: Add sysfs reporting for l1tf") |
| Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
| Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
| Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/x86/kernel/cpu/bugs.c | 55 +++++++++++++++++++++++---------------------- |
| 1 file changed, 29 insertions(+), 26 deletions(-) |
| |
| --- a/arch/x86/kernel/cpu/bugs.c |
| +++ b/arch/x86/kernel/cpu/bugs.c |
| @@ -208,32 +208,6 @@ static void x86_amd_ssb_disable(void) |
| wrmsrl(MSR_AMD64_LS_CFG, msrval); |
| } |
| |
| -static void __init l1tf_select_mitigation(void) |
| -{ |
| - u64 half_pa; |
| - |
| - if (!boot_cpu_has_bug(X86_BUG_L1TF)) |
| - return; |
| - |
| -#if CONFIG_PGTABLE_LEVELS == 2 |
| - pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n"); |
| - return; |
| -#endif |
| - |
| - /* |
| - * This is extremely unlikely to happen because almost all |
| - * systems have far more MAX_PA/2 than RAM can be fit into |
| - * DIMM slots. |
| - */ |
| - half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT; |
| - if (e820_any_mapped(half_pa, ULLONG_MAX - half_pa, E820_RAM)) { |
| - pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n"); |
| - return; |
| - } |
| - |
| - setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV); |
| -} |
| - |
| #ifdef RETPOLINE |
| static bool spectre_v2_bad_module; |
| |
| @@ -659,6 +633,35 @@ void x86_spec_ctrl_setup_ap(void) |
| x86_amd_ssb_disable(); |
| } |
| |
| +#undef pr_fmt |
| +#define pr_fmt(fmt) "L1TF: " fmt |
| +static void __init l1tf_select_mitigation(void) |
| +{ |
| + u64 half_pa; |
| + |
| + if (!boot_cpu_has_bug(X86_BUG_L1TF)) |
| + return; |
| + |
| +#if CONFIG_PGTABLE_LEVELS == 2 |
| + pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n"); |
| + return; |
| +#endif |
| + |
| + /* |
| + * This is extremely unlikely to happen because almost all |
| + * systems have far more MAX_PA/2 than RAM can be fit into |
| + * DIMM slots. |
| + */ |
| + half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT; |
| + if (e820_any_mapped(half_pa, ULLONG_MAX - half_pa, E820_RAM)) { |
| + pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n"); |
| + return; |
| + } |
| + |
| + setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV); |
| +} |
| +#undef pr_fmt |
| + |
| #ifdef CONFIG_SYSFS |
| |
| static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr, |