| From foo@baz Tue Aug 14 16:14:56 CEST 2018 |
| From: Thomas Gleixner <tglx@linutronix.de> |
| Date: Tue, 29 May 2018 17:50:22 +0200 |
| Subject: x86/smp: Provide topology_is_primary_thread() |
| |
| From: Thomas Gleixner <tglx@linutronix.de> |
| |
| commit 6a4d2657e048f096c7ffcad254010bd94891c8c0 upstream |
| |
| If the CPU is supporting SMT then the primary thread can be found by |
| checking the lower APIC ID bits for zero. smp_num_siblings is used to build |
| the mask for the APIC ID bits which need to be taken into account. |
| |
| This uses the MPTABLE or ACPI/MADT supplied APIC ID, which can be different |
| than the initial APIC ID in CPUID. But according to AMD the lower bits have |
| to be consistent. Intel gave a tentative confirmation as well. |
| |
| Preparatory patch to support disabling SMT at boot/runtime. |
| |
| Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
| Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
| Acked-by: Ingo Molnar <mingo@kernel.org> |
| Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/x86/include/asm/apic.h | 7 +++++++ |
| arch/x86/include/asm/topology.h | 4 +++- |
| arch/x86/kernel/apic/apic.c | 15 +++++++++++++++ |
| arch/x86/kernel/smpboot.c | 9 +++++++++ |
| 4 files changed, 34 insertions(+), 1 deletion(-) |
| |
| --- a/arch/x86/include/asm/apic.h |
| +++ b/arch/x86/include/asm/apic.h |
| @@ -633,6 +633,13 @@ extern int default_check_phys_apicid_pre |
| #endif |
| |
| #endif /* CONFIG_X86_LOCAL_APIC */ |
| + |
| +#ifdef CONFIG_SMP |
| +bool apic_id_is_primary_thread(unsigned int id); |
| +#else |
| +static inline bool apic_id_is_primary_thread(unsigned int id) { return false; } |
| +#endif |
| + |
| extern void irq_enter(void); |
| extern void irq_exit(void); |
| |
| --- a/arch/x86/include/asm/topology.h |
| +++ b/arch/x86/include/asm/topology.h |
| @@ -129,13 +129,15 @@ static inline int topology_max_smt_threa |
| } |
| |
| int topology_update_package_map(unsigned int apicid, unsigned int cpu); |
| -extern int topology_phys_to_logical_pkg(unsigned int pkg); |
| +int topology_phys_to_logical_pkg(unsigned int pkg); |
| +bool topology_is_primary_thread(unsigned int cpu); |
| #else |
| #define topology_max_packages() (1) |
| static inline int |
| topology_update_package_map(unsigned int apicid, unsigned int cpu) { return 0; } |
| static inline int topology_phys_to_logical_pkg(unsigned int pkg) { return 0; } |
| static inline int topology_max_smt_threads(void) { return 1; } |
| +static inline bool topology_is_primary_thread(unsigned int cpu) { return true; } |
| #endif |
| |
| static inline void arch_fix_phys_package_id(int num, u32 slot) |
| --- a/arch/x86/kernel/apic/apic.c |
| +++ b/arch/x86/kernel/apic/apic.c |
| @@ -2041,6 +2041,21 @@ static int cpuid_to_apicid[] = { |
| [0 ... NR_CPUS - 1] = -1, |
| }; |
| |
| +/** |
| + * apic_id_is_primary_thread - Check whether APIC ID belongs to a primary thread |
| + * @id: APIC ID to check |
| + */ |
| +bool apic_id_is_primary_thread(unsigned int apicid) |
| +{ |
| + u32 mask; |
| + |
| + if (smp_num_siblings == 1) |
| + return true; |
| + /* Isolate the SMT bit(s) in the APICID and check for 0 */ |
| + mask = (1U << (fls(smp_num_siblings) - 1)) - 1; |
| + return !(apicid & mask); |
| +} |
| + |
| /* |
| * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids |
| * and cpuid_to_apicid[] synchronized. |
| --- a/arch/x86/kernel/smpboot.c |
| +++ b/arch/x86/kernel/smpboot.c |
| @@ -296,6 +296,15 @@ found: |
| } |
| |
| /** |
| + * topology_is_primary_thread - Check whether CPU is the primary SMT thread |
| + * @cpu: CPU to check |
| + */ |
| +bool topology_is_primary_thread(unsigned int cpu) |
| +{ |
| + return apic_id_is_primary_thread(per_cpu(x86_cpu_to_apicid, cpu)); |
| +} |
| + |
| +/** |
| * topology_phys_to_logical_pkg - Map a physical package id to a logical |
| * |
| * Returns logical package id or -1 if not found |