| From ed73b9fd83fc7100a4d8553c95824a0fd5f140c5 Mon Sep 17 00:00:00 2001 |
| From: Petr Cvek <petrcvekcz@gmail.com> |
| Date: Thu, 20 Jun 2019 23:39:37 +0200 |
| Subject: MIPS: lantiq: Fix bitfield masking |
| |
| [ Upstream commit ba1bc0fcdeaf3bf583c1517bd2e3e29cf223c969 ] |
| |
| The modification of EXIN register doesn't clean the bitfield before |
| the writing of a new value. After a few modifications the bitfield would |
| accumulate only '1's. |
| |
| Signed-off-by: Petr Cvek <petrcvekcz@gmail.com> |
| Signed-off-by: Paul Burton <paul.burton@mips.com> |
| Cc: hauke@hauke-m.de |
| Cc: john@phrozen.org |
| Cc: linux-mips@vger.kernel.org |
| Cc: openwrt-devel@lists.openwrt.org |
| Cc: pakahmar@hotmail.com |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/mips/lantiq/irq.c | 5 +++-- |
| 1 file changed, 3 insertions(+), 2 deletions(-) |
| |
| diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c |
| index 8ac0e5994ed29..7c6f75c2aa4df 100644 |
| --- a/arch/mips/lantiq/irq.c |
| +++ b/arch/mips/lantiq/irq.c |
| @@ -160,8 +160,9 @@ static int ltq_eiu_settype(struct irq_data *d, unsigned int type) |
| if (edge) |
| irq_set_handler(d->hwirq, handle_edge_irq); |
| |
| - ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) | |
| - (val << (i * 4)), LTQ_EIU_EXIN_C); |
| + ltq_eiu_w32((ltq_eiu_r32(LTQ_EIU_EXIN_C) & |
| + (~(7 << (i * 4)))) | (val << (i * 4)), |
| + LTQ_EIU_EXIN_C); |
| } |
| } |
| |
| -- |
| 2.20.1 |
| |
