| From beca415f1fbf5dc03961a242bba8e118ca3553b6 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 1 Jun 2021 11:59:03 +0800 |
| Subject: soc: mtk-pm-domains: Fix the clock prepared issue |
| |
| From: Weiyi Lu <weiyi.lu@mediatek.com> |
| |
| [ Upstream commit f0fce06e345dc4f75c1cdd21840780f5fe2df1f3 ] |
| |
| In this new power domain driver, when adding one power domain |
| it will prepare the dependent clocks at the same. |
| So we only do clk_bulk_enable/disable control during power ON/OFF. |
| When system suspend, the pm runtime framework will forcely power off |
| power domains. However, the dependent clocks are disabled but kept |
| prepared. |
| |
| In MediaTek clock drivers, PLL would be turned ON when we do |
| clk_bulk_prepare control. |
| |
| Clock hierarchy: |
| PLL --> |
| DIV_CK --> |
| CLK_MUX |
| (may be dependent clocks) |
| --> |
| SUBSYS_CG |
| (may be dependent clocks) |
| |
| It will lead some unexpected clock states during system suspend. |
| This patch will fix by doing prepare_enable/disable_unprepare on |
| dependent clocks at the same time while we are going to power on/off |
| any power domain. |
| |
| Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") |
| Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> |
| Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> |
| Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com> |
| Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
| Link: https://lore.kernel.org/r/20210601035905.2970384-1-hsinyi@chromium.org |
| Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/soc/mediatek/mtk-pm-domains.c | 31 +++++++-------------------- |
| 1 file changed, 8 insertions(+), 23 deletions(-) |
| |
| diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c |
| index 22fa52f0e86e..b762bc40f56b 100644 |
| --- a/drivers/soc/mediatek/mtk-pm-domains.c |
| +++ b/drivers/soc/mediatek/mtk-pm-domains.c |
| @@ -211,7 +211,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) |
| if (ret) |
| return ret; |
| |
| - ret = clk_bulk_enable(pd->num_clks, pd->clks); |
| + ret = clk_bulk_prepare_enable(pd->num_clks, pd->clks); |
| if (ret) |
| goto err_reg; |
| |
| @@ -229,7 +229,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) |
| regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT); |
| regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); |
| |
| - ret = clk_bulk_enable(pd->num_subsys_clks, pd->subsys_clks); |
| + ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks); |
| if (ret) |
| goto err_pwr_ack; |
| |
| @@ -246,9 +246,9 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) |
| err_disable_sram: |
| scpsys_sram_disable(pd); |
| err_disable_subsys_clks: |
| - clk_bulk_disable(pd->num_subsys_clks, pd->subsys_clks); |
| + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); |
| err_pwr_ack: |
| - clk_bulk_disable(pd->num_clks, pd->clks); |
| + clk_bulk_disable_unprepare(pd->num_clks, pd->clks); |
| err_reg: |
| scpsys_regulator_disable(pd->supply); |
| return ret; |
| @@ -269,7 +269,7 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) |
| if (ret < 0) |
| return ret; |
| |
| - clk_bulk_disable(pd->num_subsys_clks, pd->subsys_clks); |
| + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); |
| |
| /* subsys power off */ |
| regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT); |
| @@ -284,7 +284,7 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) |
| if (ret < 0) |
| return ret; |
| |
| - clk_bulk_disable(pd->num_clks, pd->clks); |
| + clk_bulk_disable_unprepare(pd->num_clks, pd->clks); |
| |
| scpsys_regulator_disable(pd->supply); |
| |
| @@ -410,14 +410,6 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no |
| pd->subsys_clks[i].clk = clk; |
| } |
| |
| - ret = clk_bulk_prepare(pd->num_clks, pd->clks); |
| - if (ret) |
| - goto err_put_subsys_clocks; |
| - |
| - ret = clk_bulk_prepare(pd->num_subsys_clks, pd->subsys_clks); |
| - if (ret) |
| - goto err_unprepare_clocks; |
| - |
| /* |
| * Initially turn on all domains to make the domains usable |
| * with !CONFIG_PM and to get the hardware in sync with the |
| @@ -432,7 +424,7 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no |
| ret = scpsys_power_on(&pd->genpd); |
| if (ret < 0) { |
| dev_err(scpsys->dev, "%pOF: failed to power on domain: %d\n", node, ret); |
| - goto err_unprepare_clocks; |
| + goto err_put_subsys_clocks; |
| } |
| } |
| |
| @@ -440,7 +432,7 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no |
| ret = -EINVAL; |
| dev_err(scpsys->dev, |
| "power domain with id %d already exists, check your device-tree\n", id); |
| - goto err_unprepare_subsys_clocks; |
| + goto err_put_subsys_clocks; |
| } |
| |
| if (!pd->data->name) |
| @@ -460,10 +452,6 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no |
| |
| return scpsys->pd_data.domains[id]; |
| |
| -err_unprepare_subsys_clocks: |
| - clk_bulk_unprepare(pd->num_subsys_clks, pd->subsys_clks); |
| -err_unprepare_clocks: |
| - clk_bulk_unprepare(pd->num_clks, pd->clks); |
| err_put_subsys_clocks: |
| clk_bulk_put(pd->num_subsys_clks, pd->subsys_clks); |
| err_put_clocks: |
| @@ -542,10 +530,7 @@ static void scpsys_remove_one_domain(struct scpsys_domain *pd) |
| "failed to remove domain '%s' : %d - state may be inconsistent\n", |
| pd->genpd.name, ret); |
| |
| - clk_bulk_unprepare(pd->num_clks, pd->clks); |
| clk_bulk_put(pd->num_clks, pd->clks); |
| - |
| - clk_bulk_unprepare(pd->num_subsys_clks, pd->subsys_clks); |
| clk_bulk_put(pd->num_subsys_clks, pd->subsys_clks); |
| } |
| |
| -- |
| 2.30.2 |
| |