| From 2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb Mon Sep 17 00:00:00 2001 |
| From: Alex Deucher <alexander.deucher@amd.com> |
| Date: Fri, 1 Apr 2022 11:08:48 -0400 |
| Subject: drm/amdgpu/smu10: fix SoC/fclk units in auto mode |
| |
| From: Alex Deucher <alexander.deucher@amd.com> |
| |
| commit 2f25d8ce09b7ba5d769c132ba3d4eb84a941d2cb upstream. |
| |
| SMU takes clock limits in Mhz units. socclk and fclk were |
| using 10 khz units in some cases. Switch to Mhz units. |
| Fixes higher than required SoC clocks. |
| |
| Fixes: 97cf32996c46d9 ("drm/amd/pm: Removed fixed clock in auto mode DPM") |
| Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 8 ++++---- |
| 1 file changed, 4 insertions(+), 4 deletions(-) |
| |
| --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c |
| +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c |
| @@ -773,13 +773,13 @@ static int smu10_dpm_force_dpm_level(str |
| smum_send_msg_to_smc_with_parameter(hwmgr, |
| PPSMC_MSG_SetHardMinFclkByFreq, |
| hwmgr->display_config->num_display > 3 ? |
| - data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk : |
| + (data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk / 100) : |
| min_mclk, |
| NULL); |
| |
| smum_send_msg_to_smc_with_parameter(hwmgr, |
| PPSMC_MSG_SetHardMinSocclkByFreq, |
| - data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk, |
| + data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk / 100, |
| NULL); |
| smum_send_msg_to_smc_with_parameter(hwmgr, |
| PPSMC_MSG_SetHardMinVcn, |
| @@ -792,11 +792,11 @@ static int smu10_dpm_force_dpm_level(str |
| NULL); |
| smum_send_msg_to_smc_with_parameter(hwmgr, |
| PPSMC_MSG_SetSoftMaxFclkByFreq, |
| - data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk, |
| + data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk / 100, |
| NULL); |
| smum_send_msg_to_smc_with_parameter(hwmgr, |
| PPSMC_MSG_SetSoftMaxSocclkByFreq, |
| - data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk, |
| + data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk / 100, |
| NULL); |
| smum_send_msg_to_smc_with_parameter(hwmgr, |
| PPSMC_MSG_SetSoftMaxVcn, |
