| From 8fa44740009f0147358a8120f71355e50c2bba83 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 10 Feb 2022 20:20:03 +0530 |
| Subject: PCI: pciehp: Add Qualcomm quirk for Command Completed erratum |
| |
| From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| |
| [ Upstream commit 9f72d4757cbe4d1ed669192f6d23817c9e437c4b ] |
| |
| The Qualcomm PCI bridge device (Device ID 0x0110) found in chipsets such as |
| SM8450 does not set the Command Completed bit unless writes to the Slot |
| Command register change "Control" bits. |
| |
| This results in timeouts like below: |
| |
| pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago) |
| |
| Add the device to the Command Completed quirk to mark commands "completed" |
| immediately unless they change the "Control" bits. |
| |
| Link: https://lore.kernel.org/r/20220210145003.135907-1-manivannan.sadhasivam@linaro.org |
| Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/pci/hotplug/pciehp_hpc.c | 2 ++ |
| 1 file changed, 2 insertions(+) |
| |
| diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c |
| index 0e765e0644c2..60098a701e83 100644 |
| --- a/drivers/pci/hotplug/pciehp_hpc.c |
| +++ b/drivers/pci/hotplug/pciehp_hpc.c |
| @@ -1086,6 +1086,8 @@ static void quirk_cmd_compl(struct pci_dev *pdev) |
| } |
| DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, |
| PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); |
| +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0110, |
| + PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); |
| DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0400, |
| PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); |
| DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401, |
| -- |
| 2.35.1 |
| |
