| From 931dce14c5e2c969ceb5c4cd8a1b512ef48eb4ca Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 6 Feb 2020 14:42:01 +0530 |
| Subject: drm/msm/dsi/pll: call vco set rate explicitly |
| |
| From: Harigovindan P <harigovi@codeaurora.org> |
| |
| [ Upstream commit c6659785dfb3f8d75f1fe637e4222ff8178f5280 ] |
| |
| For a given byte clock, if VCO recalc value is exactly same as |
| vco set rate value, vco_set_rate does not get called assuming |
| VCO is already set to required value. But Due to GDSC toggle, |
| VCO values are erased in the HW. To make sure VCO is programmed |
| correctly, we forcefully call set_rate from vco_prepare. |
| |
| Signed-off-by: Harigovindan P <harigovi@codeaurora.org> |
| Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> |
| Signed-off-by: Rob Clark <robdclark@chromium.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 6 ++++++ |
| 1 file changed, 6 insertions(+) |
| |
| diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c |
| index 8f6100db90ed4..aa9385d5bfff9 100644 |
| --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c |
| +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c |
| @@ -411,6 +411,12 @@ static int dsi_pll_10nm_vco_prepare(struct clk_hw *hw) |
| if (pll_10nm->slave) |
| dsi_pll_enable_pll_bias(pll_10nm->slave); |
| |
| + rc = dsi_pll_10nm_vco_set_rate(hw,pll_10nm->vco_current_rate, 0); |
| + if (rc) { |
| + pr_err("vco_set_rate failed, rc=%d\n", rc); |
| + return rc; |
| + } |
| + |
| /* Start PLL */ |
| pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, |
| 0x01); |
| -- |
| 2.20.1 |
| |