| From e47cb97f153193d4b41ca8d48127da14513d54c7 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Fri, 8 May 2020 11:59:18 +0200 |
| Subject: ARM: dts: r8a7740: Add missing extal2 to CPG node |
| |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| |
| commit e47cb97f153193d4b41ca8d48127da14513d54c7 upstream. |
| |
| The Clock Pulse Generator (CPG) device node lacks the extal2 clock. |
| This may lead to a failure registering the "r" clock, or to a wrong |
| parent for the "usb24s" clock, depending on MD_CK2 pin configuration and |
| boot loader CPG_USBCKCR register configuration. |
| |
| This went unnoticed, as this does not affect the single upstream board |
| configuration, which relies on the first clock input only. |
| |
| Fixes: d9ffd583bf345e2e ("ARM: shmobile: r8a7740: add SoC clocks to DTS") |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> |
| Link: https://lore.kernel.org/r/20200508095918.6061-1-geert+renesas@glider.be |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| arch/arm/boot/dts/r8a7740.dtsi | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/arch/arm/boot/dts/r8a7740.dtsi |
| +++ b/arch/arm/boot/dts/r8a7740.dtsi |
| @@ -479,7 +479,7 @@ |
| cpg_clocks: cpg_clocks@e6150000 { |
| compatible = "renesas,r8a7740-cpg-clocks"; |
| reg = <0xe6150000 0x10000>; |
| - clocks = <&extal1_clk>, <&extalr_clk>; |
| + clocks = <&extal1_clk>, <&extal2_clk>, <&extalr_clk>; |
| #clock-cells = <1>; |
| clock-output-names = "system", "pllc0", "pllc1", |
| "pllc2", "r", |
