| From 8f3a1058c66db20cdbb903433325a6cb78e6974b Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 1 May 2020 13:22:49 +0100 |
| Subject: drm/i915/gt: Make timeslicing an explicit engine property |
| |
| From: Chris Wilson <chris@chris-wilson.co.uk> |
| |
| [ Upstream commit fe5a708267911d55cce42910d93e303924b088fd ] |
| |
| In order to allow userspace to rely on timeslicing to reorder their |
| batches, we must support preemption of those user batches. Declare |
| timeslicing as an explicit property that is a combination of having the |
| kernel support and HW support. |
| |
| Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> |
| Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing") |
| Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> |
| Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> |
| Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> |
| Link: https://patchwork.freedesktop.org/patch/msgid/20200501122249.12417-1-chris@chris-wilson.co.uk |
| (cherry picked from commit a211da9c771bf97395a3ced83a3aa383372b13a7) |
| Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/i915/gt/intel_engine.h | 9 --------- |
| drivers/gpu/drm/i915/gt/intel_engine_types.h | 18 ++++++++++++++---- |
| drivers/gpu/drm/i915/gt/intel_lrc.c | 5 ++++- |
| 3 files changed, 18 insertions(+), 14 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h |
| index 5df003061e442..beb3211a6249d 100644 |
| --- a/drivers/gpu/drm/i915/gt/intel_engine.h |
| +++ b/drivers/gpu/drm/i915/gt/intel_engine.h |
| @@ -338,13 +338,4 @@ intel_engine_has_preempt_reset(const struct intel_engine_cs *engine) |
| return intel_engine_has_preemption(engine); |
| } |
| |
| -static inline bool |
| -intel_engine_has_timeslices(const struct intel_engine_cs *engine) |
| -{ |
| - if (!IS_ACTIVE(CONFIG_DRM_I915_TIMESLICE_DURATION)) |
| - return false; |
| - |
| - return intel_engine_has_semaphores(engine); |
| -} |
| - |
| #endif /* _INTEL_RINGBUFFER_H_ */ |
| diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h |
| index 92be41a6903c0..4ea067e1508a5 100644 |
| --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h |
| +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h |
| @@ -473,10 +473,11 @@ struct intel_engine_cs { |
| #define I915_ENGINE_SUPPORTS_STATS BIT(1) |
| #define I915_ENGINE_HAS_PREEMPTION BIT(2) |
| #define I915_ENGINE_HAS_SEMAPHORES BIT(3) |
| -#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(4) |
| -#define I915_ENGINE_IS_VIRTUAL BIT(5) |
| -#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(6) |
| -#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(7) |
| +#define I915_ENGINE_HAS_TIMESLICES BIT(4) |
| +#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(5) |
| +#define I915_ENGINE_IS_VIRTUAL BIT(6) |
| +#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(7) |
| +#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(8) |
| unsigned int flags; |
| |
| /* |
| @@ -573,6 +574,15 @@ intel_engine_has_semaphores(const struct intel_engine_cs *engine) |
| return engine->flags & I915_ENGINE_HAS_SEMAPHORES; |
| } |
| |
| +static inline bool |
| +intel_engine_has_timeslices(const struct intel_engine_cs *engine) |
| +{ |
| + if (!IS_ACTIVE(CONFIG_DRM_I915_TIMESLICE_DURATION)) |
| + return false; |
| + |
| + return engine->flags & I915_ENGINE_HAS_TIMESLICES; |
| +} |
| + |
| static inline bool |
| intel_engine_needs_breadcrumb_tasklet(const struct intel_engine_cs *engine) |
| { |
| diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c |
| index 31455eceeb0c6..5bebda4a2d0b4 100644 |
| --- a/drivers/gpu/drm/i915/gt/intel_lrc.c |
| +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c |
| @@ -4194,8 +4194,11 @@ void intel_execlists_set_default_submission(struct intel_engine_cs *engine) |
| engine->flags |= I915_ENGINE_SUPPORTS_STATS; |
| if (!intel_vgpu_active(engine->i915)) { |
| engine->flags |= I915_ENGINE_HAS_SEMAPHORES; |
| - if (HAS_LOGICAL_RING_PREEMPTION(engine->i915)) |
| + if (HAS_LOGICAL_RING_PREEMPTION(engine->i915)) { |
| engine->flags |= I915_ENGINE_HAS_PREEMPTION; |
| + if (IS_ACTIVE(CONFIG_DRM_I915_TIMESLICE_DURATION)) |
| + engine->flags |= I915_ENGINE_HAS_TIMESLICES; |
| + } |
| } |
| |
| if (INTEL_GEN(engine->i915) >= 12) |
| -- |
| 2.20.1 |
| |