| From 4457a9db2bdec2360ddb15242341696108167886 Mon Sep 17 00:00:00 2001 |
| From: Imre Deak <imre.deak@intel.com> |
| Date: Mon, 4 May 2020 10:58:28 +0300 |
| Subject: drm/i915/tgl+: Fix interrupt handling for DP AUX transactions |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| From: Imre Deak <imre.deak@intel.com> |
| |
| commit 4457a9db2bdec2360ddb15242341696108167886 upstream. |
| |
| Unmask/enable AUX interrupts on all ports on TGL+. So far the interrupts |
| worked only on port A, which meant each transaction on other ports took |
| 10ms. |
| |
| Cc: <stable@vger.kernel.org> # v5.4+ |
| Signed-off-by: Imre Deak <imre.deak@intel.com> |
| Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> |
| Link: https://patchwork.freedesktop.org/patch/msgid/20200504075828.20348-1-imre.deak@intel.com |
| (cherry picked from commit 054318c7e35f1d7d06b216143fff5f32405047ee) |
| Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/i915/i915_irq.c | 16 +++------------- |
| 1 file changed, 3 insertions(+), 13 deletions(-) |
| |
| --- a/drivers/gpu/drm/i915/i915_irq.c |
| +++ b/drivers/gpu/drm/i915/i915_irq.c |
| @@ -3324,7 +3324,7 @@ static void gen8_de_irq_postinstall(stru |
| u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) | |
| GEN8_PIPE_CDCLK_CRC_DONE; |
| u32 de_pipe_enables; |
| - u32 de_port_masked = GEN8_AUX_CHANNEL_A; |
| + u32 de_port_masked = gen8_de_port_aux_mask(dev_priv); |
| u32 de_port_enables; |
| u32 de_misc_masked = GEN8_DE_EDP_PSR; |
| enum pipe pipe; |
| @@ -3332,18 +3332,8 @@ static void gen8_de_irq_postinstall(stru |
| if (INTEL_GEN(dev_priv) <= 10) |
| de_misc_masked |= GEN8_DE_MISC_GSE; |
| |
| - if (INTEL_GEN(dev_priv) >= 9) { |
| - de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | |
| - GEN9_AUX_CHANNEL_D; |
| - if (IS_GEN9_LP(dev_priv)) |
| - de_port_masked |= BXT_DE_PORT_GMBUS; |
| - } |
| - |
| - if (INTEL_GEN(dev_priv) >= 11) |
| - de_port_masked |= ICL_AUX_CHANNEL_E; |
| - |
| - if (IS_CNL_WITH_PORT_F(dev_priv) || INTEL_GEN(dev_priv) >= 11) |
| - de_port_masked |= CNL_AUX_CHANNEL_F; |
| + if (IS_GEN9_LP(dev_priv)) |
| + de_port_masked |= BXT_DE_PORT_GMBUS; |
| |
| de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK | |
| GEN8_PIPE_FIFO_UNDERRUN; |
