| From 12c350050538c7dc779c083b7342bfd20f74949c Mon Sep 17 00:00:00 2001 |
| From: Axel Lin <axel.lin@ingics.com> |
| Date: Fri, 15 May 2015 09:15:16 +0800 |
| Subject: ASoC: wm8955: Fix setting wrong register for WM8955_K_8_0_MASK bits |
| |
| From: Axel Lin <axel.lin@ingics.com> |
| |
| commit 12c350050538c7dc779c083b7342bfd20f74949c upstream. |
| |
| WM8955_K_8_0_MASK bits is controlled by WM8955_PLL_CONTROL_3 rather than |
| WM8955_PLL_CONTROL_2. |
| |
| Signed-off-by: Axel Lin <axel.lin@ingics.com> |
| Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> |
| Signed-off-by: Mark Brown <broonie@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| sound/soc/codecs/wm8955.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/sound/soc/codecs/wm8955.c |
| +++ b/sound/soc/codecs/wm8955.c |
| @@ -298,7 +298,7 @@ static int wm8955_configure_clocking(str |
| snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2, |
| WM8955_K_17_9_MASK, |
| (pll.k >> 9) & WM8955_K_17_9_MASK); |
| - snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2, |
| + snd_soc_update_bits(codec, WM8955_PLL_CONTROL_3, |
| WM8955_K_8_0_MASK, |
| pll.k & WM8955_K_8_0_MASK); |
| if (pll.k) |
