| From foo@baz Thu May 24 11:23:00 CEST 2018 |
| From: Thinh Nguyen <Thinh.Nguyen@synopsys.com> |
| Date: Fri, 16 Mar 2018 15:33:54 -0700 |
| Subject: usb: dwc3: Update DWC_usb31 GTXFIFOSIZ reg fields |
| |
| From: Thinh Nguyen <Thinh.Nguyen@synopsys.com> |
| |
| [ Upstream commit 0cab8d26d6e5e053b2bed3356992aaa71dc93628 ] |
| |
| Update two GTXFIFOSIZ bit fields for the DWC_usb31 controller. TXFDEP |
| is a 15-bit value instead of 16-bit value, and bit 15 is TXFRAMNUM. |
| |
| The GTXFIFOSIZ register for DWC_usb31 is as follows: |
| +-------+-----------+----------------------------------+ |
| | BITS | Name | Description | |
| +=======+===========+==================================+ |
| | 31:16 | TXFSTADDR | Transmit FIFOn RAM Start Address | |
| | 15 | TXFRAMNUM | Asynchronous/Periodic TXFIFO | |
| | 14:0 | TXFDEP | TXFIFO Depth | |
| +-------+-----------+----------------------------------+ |
| |
| Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> |
| Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> |
| Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/usb/dwc3/core.h | 2 ++ |
| 1 file changed, 2 insertions(+) |
| |
| --- a/drivers/usb/dwc3/core.h |
| +++ b/drivers/usb/dwc3/core.h |
| @@ -238,6 +238,8 @@ |
| #define DWC3_GUSB3PIPECTL_TX_DEEPH(n) ((n) << 1) |
| |
| /* Global TX Fifo Size Register */ |
| +#define DWC31_GTXFIFOSIZ_TXFRAMNUM BIT(15) /* DWC_usb31 only */ |
| +#define DWC31_GTXFIFOSIZ_TXFDEF(n) ((n) & 0x7fff) /* DWC_usb31 only */ |
| #define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff) |
| #define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000) |
| |
