| From c43eb2c6e5699fc3ec60f6390be797754c87f8d5 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 3 Oct 2019 18:01:27 +0100 |
| Subject: arm64: Fix incorrect irqflag restore for priority masking for compat |
| |
| From: James Morse <james.morse@arm.com> |
| |
| [ Upstream commit f46f27a576cc3b1e3d45ea50bc06287aa46b04b2 ] |
| |
| Commit bd82d4bd2188 ("arm64: Fix incorrect irqflag restore for priority |
| masking") added a macro to the entry.S call paths that leave the |
| PSTATE.I bit set. This tells the pPNMI masking logic that interrupts |
| are masked by the CPU, not by the PMR. This value is read back by |
| local_daif_save(). |
| |
| Commit bd82d4bd2188 added this call to el0_svc, as el0_svc_handler |
| is called with interrupts masked. el0_svc_compat was missed, but should |
| be covered in the same way as both of these paths end up in |
| el0_svc_common(), which expects to unmask interrupts. |
| |
| Fixes: bd82d4bd2188 ("arm64: Fix incorrect irqflag restore for priority masking") |
| Signed-off-by: James Morse <james.morse@arm.com> |
| Cc: Julien Thierry <julien.thierry.kdev@gmail.com> |
| Signed-off-by: Will Deacon <will@kernel.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm64/kernel/entry.S | 1 + |
| 1 file changed, 1 insertion(+) |
| |
| diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S |
| index 109894bd31948..239f6841a7412 100644 |
| --- a/arch/arm64/kernel/entry.S |
| +++ b/arch/arm64/kernel/entry.S |
| @@ -775,6 +775,7 @@ el0_sync_compat: |
| b.ge el0_dbg |
| b el0_inv |
| el0_svc_compat: |
| + gic_prio_kentry_setup tmp=x1 |
| mov x0, sp |
| bl el0_svc_compat_handler |
| b ret_to_user |
| -- |
| 2.20.1 |
| |