| .. SPDX-License-Identifier: GPL-2.0 | 
 |  | 
 | Kernel driver max31827 | 
 | ====================== | 
 |  | 
 | Supported chips: | 
 |  | 
 |   * Maxim MAX31827 | 
 |  | 
 |     Prefix: 'max31827' | 
 |  | 
 |     Addresses scanned: I2C 0x40 - 0x5f | 
 |  | 
 |     Datasheet: Publicly available at the Analog Devices website | 
 |  | 
 |   * Maxim MAX31828 | 
 |  | 
 |     Prefix: 'max31828' | 
 |  | 
 |     Addresses scanned: I2C 0x40 - 0x5f | 
 |  | 
 |     Datasheet: Publicly available at the Analog Devices website | 
 |  | 
 |   * Maxim MAX31829 | 
 |  | 
 |     Prefix: 'max31829' | 
 |  | 
 |     Addresses scanned: I2C 0x40 - 0x5f | 
 |  | 
 |     Datasheet: Publicly available at the Analog Devices website | 
 |  | 
 |  | 
 | Authors: | 
 | 	- Daniel Matyas <daniel.matyas@analog.com> | 
 |  | 
 | Description | 
 | ----------- | 
 |  | 
 | The chips supported by this driver are quite similar. The only difference | 
 | between them is found in the default power-on behaviour of the chips. While the | 
 | MAX31827's fault queue is set to 1, the other two chip's fault queue is set to | 
 | 4. Besides this, the MAX31829's alarm active state is high, while the other two | 
 | chip's alarms are active on low. It is important to note that the chips can be | 
 | configured to operate in the same manner with 1 write operation to the | 
 | configuration register. From here on, we will refer to all these chips as | 
 | MAX31827. | 
 |  | 
 | MAX31827 implements a temperature sensor with a 6 WLP packaging scheme. This | 
 | sensor measures the temperature of the chip itself. | 
 |  | 
 | MAX31827 has low and over temperature alarms with an effective value and a | 
 | hysteresis value: -40 and -30 degrees for under temperature alarm and +100 and | 
 | +90 degrees for over temperature alarm. | 
 |  | 
 | The alarm can be configured in comparator and interrupt mode from the | 
 | devicetree. In Comparator mode, the OT/UT status bits have a value of 1 when the | 
 | temperature rises above the TH value or falls below TL, which is also subject to | 
 | the Fault Queue selection. OT status returns to 0 when the temperature drops | 
 | below the TH_HYST value or when shutdown mode is entered. Similarly, UT status | 
 | returns to 0 when the temperature rises above TL_HYST value or when shutdown | 
 | mode is entered. | 
 |  | 
 | In interrupt mode exceeding TH also sets OT status to 1, which remains set until | 
 | a read operation is performed on the configuration/status register (max or min | 
 | attribute); at this point, it returns to 0. Once OT status is set to 1 from | 
 | exceeding TH and reset, it is set to 1 again only when the temperature drops | 
 | below TH_HYST. The output remains asserted until it is reset by a read. It is | 
 | set again if the temperature rises above TH, and so on. The same logic applies | 
 | to the operation of the UT status bit. | 
 |  | 
 | Putting the MAX31827 into shutdown mode also resets the OT/UT status bits. Note | 
 | that if the mode is changed while OT/UT status bits are set, an OT/UT status | 
 | reset may be required before it begins to behave normally. To prevent this, | 
 | it is recommended to perform a read of the configuration/status register to | 
 | clear the status bits before changing the operating mode. | 
 |  | 
 | The conversions can be manual with the one-shot functionality and automatic with | 
 | a set frequency. When powered on, the chip measures temperatures with 1 conv/s. | 
 | The conversion rate can be modified with update_interval attribute of the chip. | 
 | Conversion/second = 1/update_interval. Thus, the available options according to | 
 | the data sheet are: | 
 |  | 
 | - 64000 (ms) = 1 conv/64 sec | 
 | - 32000 (ms) = 1 conv/32 sec | 
 | - 16000 (ms) = 1 conv/16 sec | 
 | - 4000 (ms) = 1 conv/4 sec | 
 | - 1000 (ms) = 1 conv/sec (default) | 
 | - 250 (ms) = 4 conv/sec | 
 | - 125 (ms) = 8 conv/sec | 
 |  | 
 | Enabling the device when it is already enabled has the side effect of setting | 
 | the conversion frequency to 1 conv/s. The conversion time varies depending on | 
 | the resolution. | 
 |  | 
 | The conversion time doubles with every bit of increased resolution. The | 
 | available resolutions are: | 
 |  | 
 | - 8 bit -> 8.75 ms conversion time | 
 | - 9 bit -> 17.5 ms conversion time | 
 | - 10 bit -> 35 ms conversion time | 
 | - 12 bit (default) -> 140 ms conversion time | 
 |  | 
 | There is a temp1_resolution attribute which indicates the unit change in the | 
 | input temperature in milli-degrees C. | 
 |  | 
 | - 1000 mC -> 8 bit | 
 | - 500 mC -> 9 bit | 
 | - 250 mC -> 10 bit | 
 | - 62 mC -> 12 bit (default) - actually this is 62.5, but the fil returns 62 | 
 |  | 
 | When chip is in shutdown mode and a read operation is requested, one-shot is | 
 | triggered, the device waits for <conversion time> ms, and only after that is | 
 | the temperature value register read. Note that the conversion times are rounded | 
 | up to the nearest possible integer. | 
 |  | 
 | The LSB of the temperature values is 0.0625 degrees Celsius, but the values of | 
 | the temperatures are displayed in milli-degrees. This means, that some data is | 
 | lost. The step between 2 consecutive values is 62 or 63. This effect can be seen | 
 | in the writing of alarm values too. For positive numbers the user-input value | 
 | will always be rounded down to the nearest possible value, for negative numbers | 
 | the user-input will always be rounded up to the nearest possible value. | 
 |  | 
 | Bus timeout resets the I2C-compatible interface when SCL is low for more than | 
 | 30ms (nominal). | 
 |  | 
 | Alarm polarity determines if the active state of the alarm is low or high. The | 
 | behavior for both settings is dependent on the Fault Queue setting. The ALARM | 
 | pin is an open-drain output and requires a pullup resistor to operate. | 
 |  | 
 | The Fault Queue bits select how many consecutive temperature faults must occur | 
 | before overtemperature or undertemperature faults are indicated in the | 
 | corresponding status bits. | 
 |  | 
 | PEC Support | 
 | ----------- | 
 |  | 
 | When reading a register value, the PEC byte is computed and sent by the chip. | 
 |  | 
 | PEC on word data transaction represents a significant increase in bandwidth | 
 | usage (+33% for both write and reads) in normal conditions. | 
 |  | 
 | Since this operation implies there will be an extra delay to each | 
 | transaction, PEC can be disabled or enabled through sysfs. | 
 | Just write 1  to the "pec" file for enabling PEC and 0 for disabling it. |