arm64: renesas: r8a7795: Add OPPs table for cpu devices
Current, OPP tables are defined temporary,
they are being evaluated and adjust in future.
Signed-off-by: Dien Pham <dien.pham.ry@rvc.renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b93fbda..c3b09a9 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -61,6 +61,10 @@
enable-method = "psci";
clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group0_opp_tb0>,
+ <&group0_opp_tb1>, <&group0_opp_tb2>,
+ <&group0_opp_tb3>, <&group0_opp_tb4>,
+ <&group0_opp_tb5>, <&group0_opp_tb6>;
};
a57_1: cpu@1 {
@@ -69,6 +73,10 @@
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group0_opp_tb0>,
+ <&group0_opp_tb1>, <&group0_opp_tb2>,
+ <&group0_opp_tb3>, <&group0_opp_tb4>,
+ <&group0_opp_tb5>, <&group0_opp_tb6>;
};
a57_2: cpu@2 {
compatible = "arm,cortex-a57","arm,armv8";
@@ -76,6 +84,10 @@
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group0_opp_tb0>,
+ <&group0_opp_tb1>, <&group0_opp_tb2>,
+ <&group0_opp_tb3>, <&group0_opp_tb4>,
+ <&group0_opp_tb5>, <&group0_opp_tb6>;
};
a57_3: cpu@3 {
compatible = "arm,cortex-a57","arm,armv8";
@@ -83,6 +95,10 @@
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group0_opp_tb0>,
+ <&group0_opp_tb1>, <&group0_opp_tb2>,
+ <&group0_opp_tb3>, <&group0_opp_tb4>,
+ <&group0_opp_tb5>, <&group0_opp_tb6>;
};
a53_0: cpu@100 {
@@ -92,6 +108,7 @@
enable-method = "psci";
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group1_opp_tb>;
};
a53_1: cpu@101 {
@@ -100,6 +117,7 @@
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group1_opp_tb>;
};
a53_2: cpu@102 {
@@ -108,6 +126,7 @@
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group1_opp_tb>;
};
a53_3: cpu@103 {
@@ -116,6 +135,7 @@
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ operating-points-v2 = <&group1_opp_tb>;
};
idle-states {
@@ -132,6 +152,332 @@
};
};
+ group0_opp_tb0: avs_tb0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <870000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <1030000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group0_opp_tb1: avs_tb1{
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <870000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <1030000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group0_opp_tb2: avs_tb2 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <870000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <1030000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group0_opp_tb3: avs_tb3 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <790000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <790000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <790000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <850000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <980000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group0_opp_tb4: avs_tb4 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <790000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <790000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <790000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <830000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <880000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <880000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <960000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group0_opp_tb5: avs_tb5 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <770000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <770000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <770000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <780000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <860000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <860000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <940000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group0_opp_tb6: avs_tb6 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <750000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <750000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <750000>;
+ clock-latency-ns = <300000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <770000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <850000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <850000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp@1900000000 {
+ opp-hz = /bits/ 64 <1900000000>;
+ opp-microvolt = <930000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ group1_opp_tb: grp1_opp_tb0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ };
+
extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
