Add first set of Renesas patches.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch b/patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch
new file mode 100644
index 0000000..68098bc
--- /dev/null
+++ b/patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch
@@ -0,0 +1,349 @@
+From 1d16a28f468a2a98fe742386b656f6e8b823fd0f Mon Sep 17 00:00:00 2001
+From: John Stultz <john.stultz@linaro.org>
+Date: Mon, 28 Nov 2016 17:22:31 -0800
+Subject: [PATCH 001/299] drm/bridge: adv7511: Add Audio support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch adds support to Audio for both adv7511 and adv7533
+bridge chips.
+
+This patch was originally from [1] by Lars-Peter Clausen <lars@metafoo.de>
+and was adapted by Archit Taneja <architt@codeaurora.org> and
+Srinivas Kandagatla <srinivas.kandagatla@linaro.org>.
+
+Then I heavily reworked it to use the hdmi-codec driver. And also
+folded in some audio packet initialization done by Andy Green
+<andy.green@linaro.org>. So credit to them, but blame to me.
+
+[1] https://github.com/analogdevicesinc/linux/blob/xcomm_zynq/drivers/gpu/drm/i2c/adv7511_audio.c
+
+Cc: David Airlie <airlied@linux.ie>
+Cc: Archit Taneja <architt@codeaurora.org>
+Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
+Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
+Cc: Andy Green <andy@warmcat.com>
+Cc: Dave Long <dave.long@linaro.org>
+Cc: Guodong Xu <guodong.xu@linaro.org>
+Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
+Cc: Mark Brown <broonie@kernel.org>
+Cc: Lars-Peter Clausen <lars@metafoo.de>
+Cc: Jose Abreu <joabreu@synopsys.com>
+Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Cc: dri-devel@lists.freedesktop.org
+Acked-by: Lars-Peter Clausen <lars@metafoo.de>
+Signed-off-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: http://patchwork.freedesktop.org/patch/msgid/1480382552-28219-2-git-send-email-john.stultz@linaro.org
+(cherry picked from commit 53c515befe2864173ac5acb5c248587ce24d245e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/bridge/adv7511/Kconfig | 8
+ drivers/gpu/drm/bridge/adv7511/Makefile | 1
+ drivers/gpu/drm/bridge/adv7511/adv7511.h | 16 +
+ drivers/gpu/drm/bridge/adv7511/adv7511_audio.c | 213 +++++++++++++++++++++++++
+ drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 4
+ 5 files changed, 242 insertions(+)
+ create mode 100644 drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
+
+--- a/drivers/gpu/drm/bridge/adv7511/Kconfig
++++ b/drivers/gpu/drm/bridge/adv7511/Kconfig
+@@ -6,6 +6,14 @@ config DRM_I2C_ADV7511
+ help
+ Support for the Analog Device ADV7511(W) and ADV7513 HDMI encoders.
+
++config DRM_I2C_ADV7511_AUDIO
++ bool "ADV7511 HDMI Audio driver"
++ depends on DRM_I2C_ADV7511 && SND_SOC
++ select SND_SOC_HDMI_CODEC
++ help
++ Support the ADV7511 HDMI Audio interface. This is used in
++ conjunction with the AV7511 HDMI driver.
++
+ config DRM_I2C_ADV7533
+ bool "ADV7533 encoder"
+ depends on DRM_I2C_ADV7511
+--- a/drivers/gpu/drm/bridge/adv7511/Makefile
++++ b/drivers/gpu/drm/bridge/adv7511/Makefile
+@@ -1,3 +1,4 @@
+ adv7511-y := adv7511_drv.o
++adv7511-$(CONFIG_DRM_I2C_ADV7511_AUDIO) += adv7511_audio.o
+ adv7511-$(CONFIG_DRM_I2C_ADV7533) += adv7533.o
+ obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511.o
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
+@@ -309,6 +309,8 @@ struct adv7511 {
+ struct drm_display_mode curr_mode;
+
+ unsigned int f_tmds;
++ unsigned int f_audio;
++ unsigned int audio_source;
+
+ unsigned int current_edid_segment;
+ uint8_t edid_buf[256];
+@@ -334,6 +336,7 @@ struct adv7511 {
+ bool use_timing_gen;
+
+ enum adv7511_type type;
++ struct platform_device *audio_pdev;
+ };
+
+ #ifdef CONFIG_DRM_I2C_ADV7533
+@@ -389,4 +392,17 @@ static inline int adv7533_parse_dt(struc
+ }
+ #endif
+
++#ifdef CONFIG_DRM_I2C_ADV7511_AUDIO
++int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511);
++void adv7511_audio_exit(struct adv7511 *adv7511);
++#else /*CONFIG_DRM_I2C_ADV7511_AUDIO */
++static inline int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511)
++{
++ return 0;
++}
++static inline void adv7511_audio_exit(struct adv7511 *adv7511)
++{
++}
++#endif /* CONFIG_DRM_I2C_ADV7511_AUDIO */
++
+ #endif /* __DRM_I2C_ADV7511_H__ */
+--- /dev/null
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_audio.c
+@@ -0,0 +1,213 @@
++/*
++ * Analog Devices ADV7511 HDMI transmitter driver
++ *
++ * Copyright 2012 Analog Devices Inc.
++ * Copyright (c) 2016, Linaro Limited
++ *
++ * Licensed under the GPL-2.
++ */
++
++#include <sound/core.h>
++#include <sound/hdmi-codec.h>
++#include <sound/pcm.h>
++#include <sound/soc.h>
++
++#include "adv7511.h"
++
++static void adv7511_calc_cts_n(unsigned int f_tmds, unsigned int fs,
++ unsigned int *cts, unsigned int *n)
++{
++ switch (fs) {
++ case 32000:
++ *n = 4096;
++ break;
++ case 44100:
++ *n = 6272;
++ break;
++ case 48000:
++ *n = 6144;
++ break;
++ }
++
++ *cts = ((f_tmds * *n) / (128 * fs)) * 1000;
++}
++
++static int adv7511_update_cts_n(struct adv7511 *adv7511)
++{
++ unsigned int cts = 0;
++ unsigned int n = 0;
++
++ adv7511_calc_cts_n(adv7511->f_tmds, adv7511->f_audio, &cts, &n);
++
++ regmap_write(adv7511->regmap, ADV7511_REG_N0, (n >> 16) & 0xf);
++ regmap_write(adv7511->regmap, ADV7511_REG_N1, (n >> 8) & 0xff);
++ regmap_write(adv7511->regmap, ADV7511_REG_N2, n & 0xff);
++
++ regmap_write(adv7511->regmap, ADV7511_REG_CTS_MANUAL0,
++ (cts >> 16) & 0xf);
++ regmap_write(adv7511->regmap, ADV7511_REG_CTS_MANUAL1,
++ (cts >> 8) & 0xff);
++ regmap_write(adv7511->regmap, ADV7511_REG_CTS_MANUAL2,
++ cts & 0xff);
++
++ return 0;
++}
++
++int adv7511_hdmi_hw_params(struct device *dev, void *data,
++ struct hdmi_codec_daifmt *fmt,
++ struct hdmi_codec_params *hparms)
++{
++ struct adv7511 *adv7511 = dev_get_drvdata(dev);
++ unsigned int audio_source, i2s_format = 0;
++ unsigned int invert_clock;
++ unsigned int rate;
++ unsigned int len;
++
++ switch (hparms->sample_rate) {
++ case 32000:
++ rate = ADV7511_SAMPLE_FREQ_32000;
++ break;
++ case 44100:
++ rate = ADV7511_SAMPLE_FREQ_44100;
++ break;
++ case 48000:
++ rate = ADV7511_SAMPLE_FREQ_48000;
++ break;
++ case 88200:
++ rate = ADV7511_SAMPLE_FREQ_88200;
++ break;
++ case 96000:
++ rate = ADV7511_SAMPLE_FREQ_96000;
++ break;
++ case 176400:
++ rate = ADV7511_SAMPLE_FREQ_176400;
++ break;
++ case 192000:
++ rate = ADV7511_SAMPLE_FREQ_192000;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ switch (hparms->sample_width) {
++ case 16:
++ len = ADV7511_I2S_SAMPLE_LEN_16;
++ break;
++ case 18:
++ len = ADV7511_I2S_SAMPLE_LEN_18;
++ break;
++ case 20:
++ len = ADV7511_I2S_SAMPLE_LEN_20;
++ break;
++ case 24:
++ len = ADV7511_I2S_SAMPLE_LEN_24;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ switch (fmt->fmt) {
++ case HDMI_I2S:
++ audio_source = ADV7511_AUDIO_SOURCE_I2S;
++ i2s_format = ADV7511_I2S_FORMAT_I2S;
++ break;
++ case HDMI_RIGHT_J:
++ audio_source = ADV7511_AUDIO_SOURCE_I2S;
++ i2s_format = ADV7511_I2S_FORMAT_RIGHT_J;
++ break;
++ case HDMI_LEFT_J:
++ audio_source = ADV7511_AUDIO_SOURCE_I2S;
++ i2s_format = ADV7511_I2S_FORMAT_LEFT_J;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ invert_clock = fmt->bit_clk_inv;
++
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_SOURCE, 0x70,
++ audio_source << 4);
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CONFIG, BIT(6),
++ invert_clock << 6);
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_I2S_CONFIG, 0x03,
++ i2s_format);
++
++ adv7511->audio_source = audio_source;
++
++ adv7511->f_audio = hparms->sample_rate;
++
++ adv7511_update_cts_n(adv7511);
++
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CFG3,
++ ADV7511_AUDIO_CFG3_LEN_MASK, len);
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG,
++ ADV7511_I2C_FREQ_ID_CFG_RATE_MASK, rate << 4);
++ regmap_write(adv7511->regmap, 0x73, 0x1);
++
++ return 0;
++}
++
++static int audio_startup(struct device *dev, void *data)
++{
++ struct adv7511 *adv7511 = dev_get_drvdata(dev);
++
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CONFIG,
++ BIT(7), 0);
++
++ /* hide Audio infoframe updates */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE,
++ BIT(5), BIT(5));
++ /* enable N/CTS, enable Audio sample packets */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
++ BIT(5), BIT(5));
++ /* enable N/CTS */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
++ BIT(6), BIT(6));
++ /* not copyrighted */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_AUDIO_CFG1,
++ BIT(5), BIT(5));
++ /* enable audio infoframes */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
++ BIT(3), BIT(3));
++ /* AV mute disable */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_GC(0),
++ BIT(7) | BIT(6), BIT(7));
++ /* use Audio infoframe updated info */
++ regmap_update_bits(adv7511->regmap, ADV7511_REG_GC(1),
++ BIT(5), 0);
++ return 0;
++}
++
++static void audio_shutdown(struct device *dev, void *data)
++{
++}
++
++static const struct hdmi_codec_ops adv7511_codec_ops = {
++ .hw_params = adv7511_hdmi_hw_params,
++ .audio_shutdown = audio_shutdown,
++ .audio_startup = audio_startup,
++};
++
++static struct hdmi_codec_pdata codec_data = {
++ .ops = &adv7511_codec_ops,
++ .max_i2s_channels = 2,
++ .i2s = 1,
++};
++
++int adv7511_audio_init(struct device *dev, struct adv7511 *adv7511)
++{
++ adv7511->audio_pdev = platform_device_register_data(dev,
++ HDMI_CODEC_DRV_NAME,
++ PLATFORM_DEVID_AUTO,
++ &codec_data,
++ sizeof(codec_data));
++ return PTR_ERR_OR_ZERO(adv7511->audio_pdev);
++}
++
++void adv7511_audio_exit(struct adv7511 *adv7511)
++{
++ if (adv7511->audio_pdev) {
++ platform_device_unregister(adv7511->audio_pdev);
++ adv7511->audio_pdev = NULL;
++ }
++}
+--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+@@ -1037,6 +1037,8 @@ static int adv7511_probe(struct i2c_clie
+ goto err_unregister_cec;
+ }
+
++ adv7511_audio_init(dev, adv7511);
++
+ return 0;
+
+ err_unregister_cec:
+@@ -1058,6 +1060,8 @@ static int adv7511_remove(struct i2c_cli
+
+ drm_bridge_remove(&adv7511->bridge);
+
++ adv7511_audio_exit(adv7511);
++
+ i2c_unregister_device(adv7511->i2c_edid);
+
+ kfree(adv7511->edid);
diff --git a/patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch b/patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch
new file mode 100644
index 0000000..afd9b07
--- /dev/null
+++ b/patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch
@@ -0,0 +1,48 @@
+From f0e43dea74b7b5a3a458de7af13dbb55ac4948dc Mon Sep 17 00:00:00 2001
+From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Date: Mon, 28 Nov 2016 17:22:32 -0800
+Subject: [PATCH 002/299] drm/bridge: adv7511: Enable the audio data and clock
+ pads on adv7533
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch enables the Audio Data and Clock pads to the adv7533 bridge.
+Without this patch audio can not be played.
+
+Cc: David Airlie <airlied@linux.ie>
+Cc: Archit Taneja <architt@codeaurora.org>
+Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
+Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
+Cc: Andy Green <andy@warmcat.com>
+Cc: Dave Long <dave.long@linaro.org>
+Cc: Guodong Xu <guodong.xu@linaro.org>
+Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
+Cc: Mark Brown <broonie@kernel.org>
+Cc: Lars-Peter Clausen <lars@metafoo.de>
+Cc: Jose Abreu <joabreu@synopsys.com>
+Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Cc: dri-devel@lists.freedesktop.org
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Signed-off-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: http://patchwork.freedesktop.org/patch/msgid/1480382552-28219-3-git-send-email-john.stultz@linaro.org
+(cherry picked from commit b2383fa3592061cda53b1650bf538b1d82add816)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/bridge/adv7511/adv7533.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/bridge/adv7511/adv7533.c
++++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c
+@@ -29,6 +29,7 @@ static const struct reg_sequence adv7533
+ { 0x17, 0xd0 },
+ { 0x24, 0x20 },
+ { 0x57, 0x11 },
++ { 0x05, 0xc8 },
+ };
+
+ static const struct regmap_config adv7533_cec_regmap_config = {
diff --git a/patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch b/patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch
new file mode 100644
index 0000000..5dbf305
--- /dev/null
+++ b/patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch
@@ -0,0 +1,377 @@
+From 7d5db65022debc59bda386f72c9c4c40df2a3f56 Mon Sep 17 00:00:00 2001
+From: Hans Verkuil <hans.verkuil@cisco.com>
+Date: Fri, 25 Nov 2016 06:23:34 -0200
+Subject: [PATCH 003/299] [media] cec: pass parent device in register(), not
+ allocate()
+
+The cec_allocate_adapter function doesn't need the parent device, only the
+cec_register_adapter function needs it.
+
+Drop the cec_devnode parent field, since devnode.dev.parent can be used
+instead.
+
+This change makes the framework consistent with other frameworks where the
+parent device is not used until the device is registered.
+
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit f51e80804f084de269954d875c0892b081b7df3c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/media/kapi/cec-core.rst | 14 ++++++--------
+ drivers/media/i2c/adv7511.c | 5 +++--
+ drivers/media/i2c/adv7604.c | 6 +++---
+ drivers/media/i2c/adv7842.c | 6 +++---
+ drivers/media/platform/vivid/vivid-cec.c | 3 +--
+ drivers/media/platform/vivid/vivid-cec.h | 1 -
+ drivers/media/platform/vivid/vivid-core.c | 9 ++++-----
+ drivers/staging/media/cec/cec-api.c | 2 +-
+ drivers/staging/media/cec/cec-core.c | 18 ++++++++++--------
+ drivers/staging/media/pulse8-cec/pulse8-cec.c | 4 ++--
+ drivers/staging/media/s5p-cec/s5p_cec.c | 5 ++---
+ drivers/staging/media/st-cec/stih-cec.c | 5 ++---
+ include/media/cec.h | 10 ++++------
+ 13 files changed, 41 insertions(+), 47 deletions(-)
+
+--- a/Documentation/media/kapi/cec-core.rst
++++ b/Documentation/media/kapi/cec-core.rst
+@@ -37,9 +37,8 @@ The struct cec_adapter represents the CE
+ calling cec_allocate_adapter() and deleted by calling cec_delete_adapter():
+
+ .. c:function::
+- struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
+- void *priv, const char *name, u32 caps, u8 available_las,
+- struct device *parent);
++ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops, void *priv,
++ const char *name, u32 caps, u8 available_las);
+
+ .. c:function::
+ void cec_delete_adapter(struct cec_adapter *adap);
+@@ -66,20 +65,19 @@ available_las:
+ the number of simultaneous logical addresses that this
+ adapter can handle. Must be 1 <= available_las <= CEC_MAX_LOG_ADDRS.
+
+-parent:
+- the parent device.
+-
+
+ To register the /dev/cecX device node and the remote control device (if
+ CEC_CAP_RC is set) you call:
+
+ .. c:function::
+- int cec_register_adapter(struct cec_adapter \*adap);
++ int cec_register_adapter(struct cec_adapter *adap, struct device *parent);
++
++where parent is the parent device.
+
+ To unregister the devices call:
+
+ .. c:function::
+- void cec_unregister_adapter(struct cec_adapter \*adap);
++ void cec_unregister_adapter(struct cec_adapter *adap);
+
+ Note: if cec_register_adapter() fails, then call cec_delete_adapter() to
+ clean up. But if cec_register_adapter() succeeded, then only call
+--- a/drivers/media/i2c/adv7511.c
++++ b/drivers/media/i2c/adv7511.c
+@@ -1732,9 +1732,10 @@ static bool adv7511_check_edid_status(st
+ static int adv7511_registered(struct v4l2_subdev *sd)
+ {
+ struct adv7511_state *state = get_adv7511_state(sd);
++ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int err;
+
+- err = cec_register_adapter(state->cec_adap);
++ err = cec_register_adapter(state->cec_adap, &client->dev);
+ if (err)
+ cec_delete_adapter(state->cec_adap);
+ return err;
+@@ -1928,7 +1929,7 @@ static int adv7511_probe(struct i2c_clie
+ state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
+ state, dev_name(&client->dev), CEC_CAP_TRANSMIT |
+ CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH | CEC_CAP_RC,
+- ADV7511_MAX_ADDRS, &client->dev);
++ ADV7511_MAX_ADDRS);
+ err = PTR_ERR_OR_ZERO(state->cec_adap);
+ if (err) {
+ destroy_workqueue(state->work_queue);
+--- a/drivers/media/i2c/adv7604.c
++++ b/drivers/media/i2c/adv7604.c
+@@ -2617,9 +2617,10 @@ static int adv76xx_subscribe_event(struc
+ static int adv76xx_registered(struct v4l2_subdev *sd)
+ {
+ struct adv76xx_state *state = to_state(sd);
++ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int err;
+
+- err = cec_register_adapter(state->cec_adap);
++ err = cec_register_adapter(state->cec_adap, &client->dev);
+ if (err)
+ cec_delete_adapter(state->cec_adap);
+ return err;
+@@ -3497,8 +3498,7 @@ static int adv76xx_probe(struct i2c_clie
+ state->cec_adap = cec_allocate_adapter(&adv76xx_cec_adap_ops,
+ state, dev_name(&client->dev),
+ CEC_CAP_TRANSMIT | CEC_CAP_LOG_ADDRS |
+- CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV76XX_MAX_ADDRS,
+- &client->dev);
++ CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV76XX_MAX_ADDRS);
+ err = PTR_ERR_OR_ZERO(state->cec_adap);
+ if (err)
+ goto err_entity;
+--- a/drivers/media/i2c/adv7842.c
++++ b/drivers/media/i2c/adv7842.c
+@@ -3250,9 +3250,10 @@ static int adv7842_subscribe_event(struc
+ static int adv7842_registered(struct v4l2_subdev *sd)
+ {
+ struct adv7842_state *state = to_state(sd);
++ struct i2c_client *client = v4l2_get_subdevdata(sd);
+ int err;
+
+- err = cec_register_adapter(state->cec_adap);
++ err = cec_register_adapter(state->cec_adap, &client->dev);
+ if (err)
+ cec_delete_adapter(state->cec_adap);
+ return err;
+@@ -3568,8 +3569,7 @@ static int adv7842_probe(struct i2c_clie
+ state->cec_adap = cec_allocate_adapter(&adv7842_cec_adap_ops,
+ state, dev_name(&client->dev),
+ CEC_CAP_TRANSMIT | CEC_CAP_LOG_ADDRS |
+- CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV7842_MAX_ADDRS,
+- &client->dev);
++ CEC_CAP_PASSTHROUGH | CEC_CAP_RC, ADV7842_MAX_ADDRS);
+ err = PTR_ERR_OR_ZERO(state->cec_adap);
+ if (err)
+ goto err_entity;
+--- a/drivers/media/platform/vivid/vivid-cec.c
++++ b/drivers/media/platform/vivid/vivid-cec.c
+@@ -216,7 +216,6 @@ static const struct cec_adap_ops vivid_c
+
+ struct cec_adapter *vivid_cec_alloc_adap(struct vivid_dev *dev,
+ unsigned int idx,
+- struct device *parent,
+ bool is_source)
+ {
+ char name[sizeof(dev->vid_out_dev.name) + 2];
+@@ -227,5 +226,5 @@ struct cec_adapter *vivid_cec_alloc_adap
+ is_source ? dev->vid_out_dev.name : dev->vid_cap_dev.name,
+ idx);
+ return cec_allocate_adapter(&vivid_cec_adap_ops, dev,
+- name, caps, 1, parent);
++ name, caps, 1);
+ }
+--- a/drivers/media/platform/vivid/vivid-cec.h
++++ b/drivers/media/platform/vivid/vivid-cec.h
+@@ -20,7 +20,6 @@
+ #ifdef CONFIG_VIDEO_VIVID_CEC
+ struct cec_adapter *vivid_cec_alloc_adap(struct vivid_dev *dev,
+ unsigned int idx,
+- struct device *parent,
+ bool is_source);
+ void vivid_cec_bus_free_work(struct vivid_dev *dev);
+
+--- a/drivers/media/platform/vivid/vivid-core.c
++++ b/drivers/media/platform/vivid/vivid-core.c
+@@ -1167,12 +1167,12 @@ static int vivid_create_instance(struct
+ if (in_type_counter[HDMI]) {
+ struct cec_adapter *adap;
+
+- adap = vivid_cec_alloc_adap(dev, 0, &pdev->dev, false);
++ adap = vivid_cec_alloc_adap(dev, 0, false);
+ ret = PTR_ERR_OR_ZERO(adap);
+ if (ret < 0)
+ goto unreg_dev;
+ dev->cec_rx_adap = adap;
+- ret = cec_register_adapter(adap);
++ ret = cec_register_adapter(adap, &pdev->dev);
+ if (ret < 0) {
+ cec_delete_adapter(adap);
+ dev->cec_rx_adap = NULL;
+@@ -1222,13 +1222,12 @@ static int vivid_create_instance(struct
+ if (dev->output_type[i] != HDMI)
+ continue;
+ dev->cec_output2bus_map[i] = bus_cnt;
+- adap = vivid_cec_alloc_adap(dev, bus_cnt,
+- &pdev->dev, true);
++ adap = vivid_cec_alloc_adap(dev, bus_cnt, true);
+ ret = PTR_ERR_OR_ZERO(adap);
+ if (ret < 0)
+ goto unreg_dev;
+ dev->cec_tx_adap[bus_cnt] = adap;
+- ret = cec_register_adapter(adap);
++ ret = cec_register_adapter(adap, &pdev->dev);
+ if (ret < 0) {
+ cec_delete_adapter(adap);
+ dev->cec_tx_adap[bus_cnt] = NULL;
+--- a/drivers/staging/media/cec/cec-api.c
++++ b/drivers/staging/media/cec/cec-api.c
+@@ -88,7 +88,7 @@ static long cec_adap_g_caps(struct cec_a
+ {
+ struct cec_caps caps = {};
+
+- strlcpy(caps.driver, adap->devnode.parent->driver->name,
++ strlcpy(caps.driver, adap->devnode.dev.parent->driver->name,
+ sizeof(caps.driver));
+ strlcpy(caps.name, adap->name, sizeof(caps.name));
+ caps.available_log_addrs = adap->available_log_addrs;
+--- a/drivers/staging/media/cec/cec-core.c
++++ b/drivers/staging/media/cec/cec-core.c
+@@ -132,7 +132,6 @@ static int __must_check cec_devnode_regi
+ devnode->dev.bus = &cec_bus_type;
+ devnode->dev.devt = MKDEV(MAJOR(cec_dev_t), minor);
+ devnode->dev.release = cec_devnode_release;
+- devnode->dev.parent = devnode->parent;
+ dev_set_name(&devnode->dev, "cec%d", devnode->minor);
+ device_initialize(&devnode->dev);
+
+@@ -198,13 +197,11 @@ static void cec_devnode_unregister(struc
+
+ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
+ void *priv, const char *name, u32 caps,
+- u8 available_las, struct device *parent)
++ u8 available_las)
+ {
+ struct cec_adapter *adap;
+ int res;
+
+- if (WARN_ON(!parent))
+- return ERR_PTR(-EINVAL);
+ if (WARN_ON(!caps))
+ return ERR_PTR(-EINVAL);
+ if (WARN_ON(!ops))
+@@ -214,8 +211,6 @@ struct cec_adapter *cec_allocate_adapter
+ adap = kzalloc(sizeof(*adap), GFP_KERNEL);
+ if (!adap)
+ return ERR_PTR(-ENOMEM);
+- adap->owner = parent->driver->owner;
+- adap->devnode.parent = parent;
+ strlcpy(adap->name, name, sizeof(adap->name));
+ adap->phys_addr = CEC_PHYS_ADDR_INVALID;
+ adap->log_addrs.cec_version = CEC_OP_CEC_VERSION_2_0;
+@@ -264,7 +259,6 @@ struct cec_adapter *cec_allocate_adapter
+ adap->rc->input_id.vendor = 0;
+ adap->rc->input_id.product = 0;
+ adap->rc->input_id.version = 1;
+- adap->rc->dev.parent = parent;
+ adap->rc->driver_type = RC_DRIVER_SCANCODE;
+ adap->rc->driver_name = CEC_NAME;
+ adap->rc->allowed_protocols = RC_BIT_CEC;
+@@ -278,14 +272,22 @@ struct cec_adapter *cec_allocate_adapter
+ }
+ EXPORT_SYMBOL_GPL(cec_allocate_adapter);
+
+-int cec_register_adapter(struct cec_adapter *adap)
++int cec_register_adapter(struct cec_adapter *adap,
++ struct device *parent)
+ {
+ int res;
+
+ if (IS_ERR_OR_NULL(adap))
+ return 0;
+
++ if (WARN_ON(!parent))
++ return -EINVAL;
++
++ adap->owner = parent->driver->owner;
++ adap->devnode.dev.parent = parent;
++
+ #if IS_REACHABLE(CONFIG_RC_CORE)
++ adap->rc->dev.parent = parent;
+ if (adap->capabilities & CEC_CAP_RC) {
+ res = rc_register_device(adap->rc);
+
+--- a/drivers/staging/media/pulse8-cec/pulse8-cec.c
++++ b/drivers/staging/media/pulse8-cec/pulse8-cec.c
+@@ -651,7 +651,7 @@ static int pulse8_connect(struct serio *
+
+ pulse8->serio = serio;
+ pulse8->adap = cec_allocate_adapter(&pulse8_cec_adap_ops, pulse8,
+- "HDMI CEC", caps, 1, &serio->dev);
++ "HDMI CEC", caps, 1);
+ err = PTR_ERR_OR_ZERO(pulse8->adap);
+ if (err < 0)
+ goto free_device;
+@@ -671,7 +671,7 @@ static int pulse8_connect(struct serio *
+ if (err)
+ goto close_serio;
+
+- err = cec_register_adapter(pulse8->adap);
++ err = cec_register_adapter(pulse8->adap, &serio->dev);
+ if (err < 0)
+ goto close_serio;
+
+--- a/drivers/staging/media/s5p-cec/s5p_cec.c
++++ b/drivers/staging/media/s5p-cec/s5p_cec.c
+@@ -204,12 +204,11 @@ static int s5p_cec_probe(struct platform
+ cec->adap = cec_allocate_adapter(&s5p_cec_adap_ops, cec,
+ CEC_NAME,
+ CEC_CAP_PHYS_ADDR | CEC_CAP_LOG_ADDRS | CEC_CAP_TRANSMIT |
+- CEC_CAP_PASSTHROUGH | CEC_CAP_RC,
+- 1, &pdev->dev);
++ CEC_CAP_PASSTHROUGH | CEC_CAP_RC, 1);
+ ret = PTR_ERR_OR_ZERO(cec->adap);
+ if (ret)
+ return ret;
+- ret = cec_register_adapter(cec->adap);
++ ret = cec_register_adapter(cec->adap, &pdev->dev);
+ if (ret) {
+ cec_delete_adapter(cec->adap);
+ return ret;
+--- a/drivers/staging/media/st-cec/stih-cec.c
++++ b/drivers/staging/media/st-cec/stih-cec.c
+@@ -336,13 +336,12 @@ static int stih_cec_probe(struct platfor
+ cec->adap = cec_allocate_adapter(&sti_cec_adap_ops, cec,
+ CEC_NAME,
+ CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH |
+- CEC_CAP_PHYS_ADDR | CEC_CAP_TRANSMIT,
+- 1, &pdev->dev);
++ CEC_CAP_PHYS_ADDR | CEC_CAP_TRANSMIT, 1);
+ ret = PTR_ERR_OR_ZERO(cec->adap);
+ if (ret)
+ return ret;
+
+- ret = cec_register_adapter(cec->adap);
++ ret = cec_register_adapter(cec->adap, &pdev->dev);
+ if (ret) {
+ cec_delete_adapter(cec->adap);
+ return ret;
+--- a/include/media/cec.h
++++ b/include/media/cec.h
+@@ -35,7 +35,6 @@
+ * struct cec_devnode - cec device node
+ * @dev: cec device
+ * @cdev: cec character device
+- * @parent: parent device
+ * @minor: device node minor number
+ * @registered: the device was correctly registered
+ * @unregistered: the device was unregistered
+@@ -51,7 +50,6 @@ struct cec_devnode {
+ /* sysfs */
+ struct device dev;
+ struct cdev cdev;
+- struct device *parent;
+
+ /* device info */
+ int minor;
+@@ -198,9 +196,8 @@ static inline bool cec_is_sink(const str
+
+ #if IS_ENABLED(CONFIG_MEDIA_CEC)
+ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
+- void *priv, const char *name, u32 caps, u8 available_las,
+- struct device *parent);
+-int cec_register_adapter(struct cec_adapter *adap);
++ void *priv, const char *name, u32 caps, u8 available_las);
++int cec_register_adapter(struct cec_adapter *adap, struct device *parent);
+ void cec_unregister_adapter(struct cec_adapter *adap);
+ void cec_delete_adapter(struct cec_adapter *adap);
+
+@@ -218,7 +215,8 @@ void cec_received_msg(struct cec_adapter
+
+ #else
+
+-static inline int cec_register_adapter(struct cec_adapter *adap)
++static inline int cec_register_adapter(struct cec_adapter *adap,
++ struct device *parent)
+ {
+ return 0;
+ }
diff --git a/patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch b/patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch
new file mode 100644
index 0000000..4e60df7
--- /dev/null
+++ b/patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch
@@ -0,0 +1,25 @@
+From fdd111762812963ae852636a786a0740fa3067a1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 26 Oct 2016 04:12:34 +0000
+Subject: [PATCH 004/299] ASoC: rsnd: depends on OF
+
+Current Renesas sound driver is completely depends on CONFIG_OF
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 609c94865adcef3dba070a2d3905e4b67b4e6919)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/sound/soc/sh/Kconfig
++++ b/sound/soc/sh/Kconfig
+@@ -37,6 +37,7 @@ config SND_SOC_SH4_SIU
+ config SND_SOC_RCAR
+ tristate "R-Car series SRU/SCU/SSIU/SSI support"
+ depends on COMMON_CLK
++ depends on OF
+ select SND_SIMPLE_CARD
+ select REGMAP_MMIO
+ help
diff --git a/patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch b/patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch
new file mode 100644
index 0000000..257e5aa
--- /dev/null
+++ b/patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch
@@ -0,0 +1,31 @@
+From 1277c76953e9c4829e2775eaa66ba4c819cb9e13 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 26 Oct 2016 04:12:53 +0000
+Subject: [PATCH 005/299] ASoC: rsnd: enable COMPILE_TEST
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit e144e5d06d0207c0b1631545fc1821565ee0fe6b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/sh/Kconfig
++++ b/sound/soc/sh/Kconfig
+@@ -1,5 +1,5 @@
+ menu "SoC Audio support for SuperH"
+- depends on SUPERH || ARCH_SHMOBILE
++ depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
+
+ config SND_SOC_PCM_SH7760
+ tristate "SoC Audio support for Renesas SH7760"
+@@ -37,7 +37,7 @@ config SND_SOC_SH4_SIU
+ config SND_SOC_RCAR
+ tristate "R-Car series SRU/SCU/SSIU/SSI support"
+ depends on COMMON_CLK
+- depends on OF
++ depends on OF || COMPILE_TEST
+ select SND_SIMPLE_CARD
+ select REGMAP_MMIO
+ help
diff --git a/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch b/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch
new file mode 100644
index 0000000..71dbd9e
--- /dev/null
+++ b/patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch
@@ -0,0 +1,75 @@
+From 56cab5182c3301e001cb0a0f48bc2ce806922b97 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Tue, 13 Sep 2016 12:56:59 +0200
+Subject: [PATCH 006/299] arm64: dts: r8a7795: salvator-x: enable UHS for SDHI
+ 0 & 3
+
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2a927eeaf6b64f39b4f0907417f85c7ee1d26119)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 22 +++++++++++++++++++--
+ 1 file changed, 20 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+@@ -237,11 +237,25 @@
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
++ power-source = <3300>;
++ };
++
++ sdhi0_pins_uhs: sd0_uhs {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <1800>;
+ };
+
+ sdhi3_pins: sd3 {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
++ power-source = <3300>;
++ };
++
++ sdhi3_pins_uhs: sd3_uhs {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <1800>;
+ };
+
+ sound_pins: sound {
+@@ -371,25 +385,29 @@
+
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi0_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
+ &sdhi3 {
+ pinctrl-0 = <&sdhi3_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi3_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi3>;
+ vqmmc-supply = <&vccq_sdhi3>;
+ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch b/patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch
new file mode 100644
index 0000000..89572e4
--- /dev/null
+++ b/patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch
@@ -0,0 +1,30 @@
+From d1c93663e3c086a2895e0d7772de40e162acab39 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 20 Sep 2016 14:25:17 +0200
+Subject: [PATCH 007/299] arm64: dts: r8a7796: salvator-x: Populate EXTALR
+
+It can be used for the watchdog.
+
+Based on similar work for r8a7795/salvator-x by Wolfram Sang.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ad47fff1941115d8caf88061851993f6e001c03e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+@@ -49,6 +49,10 @@
+ clock-frequency = <16666666>;
+ };
+
++&extalr_clk {
++ clock-frequency = <32768>;
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
diff --git a/patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch b/patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch
new file mode 100644
index 0000000..36059c2
--- /dev/null
+++ b/patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch
@@ -0,0 +1,30 @@
+From 352bb1d1c3512722975e37942374ae17bf657baf Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 3 Oct 2016 20:12:31 +0300
+Subject: [PATCH 008/299] arm64: dts: r8a7795: salvator-x: Add DU LVDS output
+ endpoint
+
+Declaring the endpoint makes LVDS enablement easier by just including
+the corresponding panel's dtsi file.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ea3c17b03b9bb57c0ea05a8afac934649128c2f0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+@@ -191,6 +191,10 @@
+ remote-endpoint = <&adv7123_in>;
+ };
+ };
++ port@3 {
++ lvds_connector: endpoint {
++ };
++ };
+ };
+ };
+
diff --git a/patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch b/patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch
new file mode 100644
index 0000000..31c4aa6
--- /dev/null
+++ b/patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch
@@ -0,0 +1,44 @@
+From e13f4d6313bd605e3a8efb0b04113acbb2b36c8e Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Wed, 26 Oct 2016 14:24:22 +0900
+Subject: [PATCH 009/299] arm64: defconfig: Enable DRM DU and V4L2 FCP + VSP
+ modules
+
+Extend the ARM64 defconfig to enable the DU DRM device as module
+together with required dependencies of V4L2 FCP and VSP modules.
+
+This enables VGA output on the r8a7795 Salvator-X board.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 833c97254724a620d1d9fb9a580681fb52536fbf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/configs/defconfig | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -292,8 +292,22 @@ CONFIG_REGULATOR_PWM=y
+ CONFIG_REGULATOR_QCOM_SMD_RPM=y
+ CONFIG_REGULATOR_QCOM_SPMI=y
+ CONFIG_REGULATOR_S2MPS11=y
++CONFIG_MEDIA_SUPPORT=m
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_VIDEO_V4L2_SUBDEV_API=y
++# CONFIG_DVB_NET is not set
++CONFIG_V4L_MEM2MEM_DRIVERS=y
++CONFIG_VIDEO_RENESAS_FCP=m
++CONFIG_VIDEO_RENESAS_VSP1=m
+ CONFIG_DRM=m
+ CONFIG_DRM_NOUVEAU=m
++CONFIG_DRM_RCAR_DU=m
++CONFIG_DRM_RCAR_HDMI=y
++CONFIG_DRM_RCAR_LVDS=y
++CONFIG_DRM_RCAR_VSP=y
+ CONFIG_DRM_TEGRA=m
+ CONFIG_DRM_PANEL_SIMPLE=m
+ CONFIG_DRM_I2C_ADV7511=m
diff --git a/patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch b/patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch
new file mode 100644
index 0000000..f37d967
--- /dev/null
+++ b/patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch
@@ -0,0 +1,125 @@
+From beaadb43bfd206479f957a9a64faa12cecc335c4 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Oct 2016 23:29:03 +0300
+Subject: [PATCH 010/299] arm64: dts: r8a7795: Remove FCP SoC-specific
+ compatible strings
+
+The SoC-specific compatible strings have been removed from the FCP DT
+bindings, removed them from the device tree.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ab33da0bd8f9b6a8b16a61bb5baae365a87cd52c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 24 ++++++++++++------------
+ 1 file changed, 12 insertions(+), 12 deletions(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -1307,28 +1307,28 @@
+ };
+
+ fcpvb1: fcp@fe92f000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfe92f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 606>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpf0: fcp@fe950000 {
+- compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
++ compatible = "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+ clocks = <&cpg CPG_MOD 615>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpf1: fcp@fe951000 {
+- compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
++ compatible = "renesas,fcpf";
+ reg = <0 0xfe951000 0 0x200>;
+ clocks = <&cpg CPG_MOD 614>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ };
+
+ fcpf2: fcp@fe952000 {
+- compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
++ compatible = "renesas,fcpf";
+ reg = <0 0xfe952000 0 0x200>;
+ clocks = <&cpg CPG_MOD 613>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+@@ -1345,7 +1345,7 @@
+ };
+
+ fcpvb0: fcp@fe96f000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+@@ -1362,7 +1362,7 @@
+ };
+
+ fcpvi0: fcp@fe9af000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfe9af000 0 0x200>;
+ clocks = <&cpg CPG_MOD 611>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+@@ -1379,7 +1379,7 @@
+ };
+
+ fcpvi1: fcp@fe9bf000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfe9bf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 610>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+@@ -1396,7 +1396,7 @@
+ };
+
+ fcpvi2: fcp@fe9cf000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfe9cf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 609>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+@@ -1413,7 +1413,7 @@
+ };
+
+ fcpvd0: fcp@fea27000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+@@ -1430,7 +1430,7 @@
+ };
+
+ fcpvd1: fcp@fea2f000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+@@ -1447,7 +1447,7 @@
+ };
+
+ fcpvd2: fcp@fea37000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfea37000 0 0x200>;
+ clocks = <&cpg CPG_MOD 601>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+@@ -1464,7 +1464,7 @@
+ };
+
+ fcpvd3: fcp@fea3f000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfea3f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 600>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
diff --git a/patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch b/patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch
new file mode 100644
index 0000000..c913a32
--- /dev/null
+++ b/patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch
@@ -0,0 +1,66 @@
+From 9213a66f320de7e2bdc5e408dc99358fda1ce5ba Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 17 Aug 2016 10:08:05 +0200
+Subject: [PATCH 011/299] arm64: dts: r8a7796: add SDHI nodes
+
+Add SDHI nodes to the DT of the r8a7796 SoC.
+
+Based on the DT of the r8a7795 SoC.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit a513cf1e645785cd119676aea4aa00c4e1e0c7b3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 40 +++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -251,5 +251,45 @@
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
++
++ sdhi0: sd@ee100000 {
++ compatible = "renesas,sdhi-r8a7796";
++ reg = <0 0xee100000 0 0x2000>;
++ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 314>;
++ max-frequency = <200000000>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ sdhi1: sd@ee120000 {
++ compatible = "renesas,sdhi-r8a7796";
++ reg = <0 0xee120000 0 0x2000>;
++ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 313>;
++ max-frequency = <200000000>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ sdhi2: sd@ee140000 {
++ compatible = "renesas,sdhi-r8a7796";
++ reg = <0 0xee140000 0 0x2000>;
++ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 312>;
++ max-frequency = <200000000>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ sdhi3: sd@ee160000 {
++ compatible = "renesas,sdhi-r8a7796";
++ reg = <0 0xee160000 0 0x2000>;
++ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 311>;
++ max-frequency = <200000000>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
+ };
+ };
diff --git a/patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch b/patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch
new file mode 100644
index 0000000..030ac56
--- /dev/null
+++ b/patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch
@@ -0,0 +1,25 @@
+From ba47d07d4ed1efce8e593640498733c3b45d3b18 Mon Sep 17 00:00:00 2001
+From: Catalin Marinas <catalin.marinas@arm.com>
+Date: Wed, 19 Oct 2016 17:59:52 +0100
+Subject: [PATCH 012/299] arm64: Enable HIBERNATION in defconfig
+
+This patch adds CONFIG_HIBERNATION to the arm64 defconfig.
+
+Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Olof Johansson <olof@lixom.net>
+(cherry picked from commit 87ca90ef9503835839f4a2cbd3b015c2608bcbc7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/configs/defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -82,6 +82,7 @@ CONFIG_KEXEC=y
+ # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+ CONFIG_COMPAT=y
+ CONFIG_CPU_IDLE=y
++CONFIG_HIBERNATION=y
+ CONFIG_ARM_CPUIDLE=y
+ CONFIG_CPU_FREQ=y
+ CONFIG_CPUFREQ_DT=y
diff --git a/patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch b/patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch
new file mode 100644
index 0000000..b5d84ef
--- /dev/null
+++ b/patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch
@@ -0,0 +1,329 @@
+From 216f04b6d43b6a804d28b315e5fe5343e9249750 Mon Sep 17 00:00:00 2001
+From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+Date: Tue, 23 Feb 2016 15:32:14 -0800
+Subject: [PATCH 013/299] Input: gpio_keys_polled - keep button data constant
+
+Commit 633a21d80b4a ("input: gpio_keys_polled: Add support for GPIO
+descriptors") placed gpio descriptor into gpio_keys_button structure, which
+is supposed to be part of platform data and not modifiable by the driver.
+To keep the data constant, let's move the descriptor to
+gpio_keys_button_data structure instead.
+
+Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit 0f78ba96bbcf30a78224fe56f8fd72f87915afdd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/input/keyboard/gpio_keys.c | 10 +-
+ drivers/input/keyboard/gpio_keys_polled.c | 105 ++++++++++++++++--------------
+ include/linux/gpio_keys.h | 5 -
+ 3 files changed, 64 insertions(+), 56 deletions(-)
+
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -639,7 +639,6 @@ gpio_keys_get_devtree_pdata(struct devic
+ struct gpio_keys_button *button;
+ int error;
+ int nbuttons;
+- int i;
+
+ node = dev->of_node;
+ if (!node)
+@@ -655,19 +654,18 @@ gpio_keys_get_devtree_pdata(struct devic
+ if (!pdata)
+ return ERR_PTR(-ENOMEM);
+
+- pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
++ button = (struct gpio_keys_button *)(pdata + 1);
++
++ pdata->buttons = button;
+ pdata->nbuttons = nbuttons;
+
+ pdata->rep = !!of_get_property(node, "autorepeat", NULL);
+
+ of_property_read_string(node, "label", &pdata->name);
+
+- i = 0;
+ for_each_available_child_of_node(node, pp) {
+ enum of_gpio_flags flags;
+
+- button = &pdata->buttons[i++];
+-
+ button->gpio = of_get_gpio_flags(pp, 0, &flags);
+ if (button->gpio < 0) {
+ error = button->gpio;
+@@ -709,6 +707,8 @@ gpio_keys_get_devtree_pdata(struct devic
+ if (of_property_read_u32(pp, "debounce-interval",
+ &button->debounce_interval))
+ button->debounce_interval = 5;
++
++ button++;
+ }
+
+ if (pdata->nbuttons == 0)
+--- a/drivers/input/keyboard/gpio_keys_polled.c
++++ b/drivers/input/keyboard/gpio_keys_polled.c
+@@ -30,6 +30,7 @@
+ #define DRV_NAME "gpio-keys-polled"
+
+ struct gpio_keys_button_data {
++ struct gpio_desc *gpiod;
+ int last_state;
+ int count;
+ int threshold;
+@@ -46,7 +47,7 @@ struct gpio_keys_polled_dev {
+ };
+
+ static void gpio_keys_button_event(struct input_polled_dev *dev,
+- struct gpio_keys_button *button,
++ const struct gpio_keys_button *button,
+ int state)
+ {
+ struct gpio_keys_polled_dev *bdev = dev->private;
+@@ -70,15 +71,15 @@ static void gpio_keys_button_event(struc
+ }
+
+ static void gpio_keys_polled_check_state(struct input_polled_dev *dev,
+- struct gpio_keys_button *button,
++ const struct gpio_keys_button *button,
+ struct gpio_keys_button_data *bdata)
+ {
+ int state;
+
+ if (bdata->can_sleep)
+- state = !!gpiod_get_value_cansleep(button->gpiod);
++ state = !!gpiod_get_value_cansleep(bdata->gpiod);
+ else
+- state = !!gpiod_get_value(button->gpiod);
++ state = !!gpiod_get_value(bdata->gpiod);
+
+ gpio_keys_button_event(dev, button, state);
+
+@@ -142,48 +143,35 @@ static void gpio_keys_polled_close(struc
+ pdata->disable(bdev->dev);
+ }
+
+-static struct gpio_keys_platform_data *gpio_keys_polled_get_devtree_pdata(struct device *dev)
++static struct gpio_keys_platform_data *
++gpio_keys_polled_get_devtree_pdata(struct device *dev)
+ {
+ struct gpio_keys_platform_data *pdata;
+ struct gpio_keys_button *button;
+ struct fwnode_handle *child;
+- int error;
+ int nbuttons;
+
+ nbuttons = device_get_child_node_count(dev);
+ if (nbuttons == 0)
+- return NULL;
++ return ERR_PTR(-EINVAL);
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata) + nbuttons * sizeof(*button),
+ GFP_KERNEL);
+ if (!pdata)
+ return ERR_PTR(-ENOMEM);
+
+- pdata->buttons = (struct gpio_keys_button *)(pdata + 1);
++ button = (struct gpio_keys_button *)(pdata + 1);
++
++ pdata->buttons = button;
++ pdata->nbuttons = nbuttons;
+
+ pdata->rep = device_property_present(dev, "autorepeat");
+ device_property_read_u32(dev, "poll-interval", &pdata->poll_interval);
+
+ device_for_each_child_node(dev, child) {
+- struct gpio_desc *desc;
+-
+- desc = devm_get_gpiod_from_child(dev, NULL, child);
+- if (IS_ERR(desc)) {
+- error = PTR_ERR(desc);
+- if (error != -EPROBE_DEFER)
+- dev_err(dev,
+- "Failed to get gpio flags, error: %d\n",
+- error);
+- fwnode_handle_put(child);
+- return ERR_PTR(error);
+- }
+-
+- button = &pdata->buttons[pdata->nbuttons++];
+- button->gpiod = desc;
+-
+- if (fwnode_property_read_u32(child, "linux,code", &button->code)) {
+- dev_err(dev, "Button without keycode: %d\n",
+- pdata->nbuttons - 1);
++ if (fwnode_property_read_u32(child, "linux,code",
++ &button->code)) {
++ dev_err(dev, "button without keycode\n");
+ fwnode_handle_put(child);
+ return ERR_PTR(-EINVAL);
+ }
+@@ -206,10 +194,9 @@ static struct gpio_keys_platform_data *g
+ if (fwnode_property_read_u32(child, "debounce-interval",
+ &button->debounce_interval))
+ button->debounce_interval = 5;
+- }
+
+- if (pdata->nbuttons == 0)
+- return ERR_PTR(-EINVAL);
++ button++;
++ }
+
+ return pdata;
+ }
+@@ -220,7 +207,7 @@ static void gpio_keys_polled_set_abs_par
+ int i, min = 0, max = 0;
+
+ for (i = 0; i < pdata->nbuttons; i++) {
+- struct gpio_keys_button *button = &pdata->buttons[i];
++ const struct gpio_keys_button *button = &pdata->buttons[i];
+
+ if (button->type != EV_ABS || button->code != code)
+ continue;
+@@ -230,6 +217,7 @@ static void gpio_keys_polled_set_abs_par
+ if (button->value > max)
+ max = button->value;
+ }
++
+ input_set_abs_params(input, code, min, max, 0, 0);
+ }
+
+@@ -242,6 +230,7 @@ MODULE_DEVICE_TABLE(of, gpio_keys_polled
+ static int gpio_keys_polled_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
++ struct fwnode_handle *child = NULL;
+ const struct gpio_keys_platform_data *pdata = dev_get_platdata(dev);
+ struct gpio_keys_polled_dev *bdev;
+ struct input_polled_dev *poll_dev;
+@@ -254,10 +243,6 @@ static int gpio_keys_polled_probe(struct
+ pdata = gpio_keys_polled_get_devtree_pdata(dev);
+ if (IS_ERR(pdata))
+ return PTR_ERR(pdata);
+- if (!pdata) {
+- dev_err(dev, "missing platform data\n");
+- return -EINVAL;
+- }
+ }
+
+ if (!pdata->poll_interval) {
+@@ -300,20 +285,40 @@ static int gpio_keys_polled_probe(struct
+ __set_bit(EV_REP, input->evbit);
+
+ for (i = 0; i < pdata->nbuttons; i++) {
+- struct gpio_keys_button *button = &pdata->buttons[i];
++ const struct gpio_keys_button *button = &pdata->buttons[i];
+ struct gpio_keys_button_data *bdata = &bdev->data[i];
+ unsigned int type = button->type ?: EV_KEY;
+
+ if (button->wakeup) {
+ dev_err(dev, DRV_NAME " does not support wakeup\n");
++ fwnode_handle_put(child);
+ return -EINVAL;
+ }
+
+- /*
+- * Legacy GPIO number so request the GPIO here and
+- * convert it to descriptor.
+- */
+- if (!button->gpiod && gpio_is_valid(button->gpio)) {
++ if (!dev_get_platdata(dev)) {
++ /* No legacy static platform data */
++ child = device_get_next_child_node(dev, child);
++ if (!child) {
++ dev_err(dev, "missing child device node\n");
++ return -EINVAL;
++ }
++
++ bdata->gpiod = devm_get_gpiod_from_child(dev, NULL,
++ child);
++ if (IS_ERR(bdata->gpiod)) {
++ error = PTR_ERR(bdata->gpiod);
++ if (error != -EPROBE_DEFER)
++ dev_err(dev,
++ "failed to get gpio: %d\n",
++ error);
++ fwnode_handle_put(child);
++ return error;
++ }
++ } else if (gpio_is_valid(button->gpio)) {
++ /*
++ * Legacy GPIO number so request the GPIO here and
++ * convert it to descriptor.
++ */
+ unsigned flags = GPIOF_IN;
+
+ if (button->active_low)
+@@ -322,18 +327,22 @@ static int gpio_keys_polled_probe(struct
+ error = devm_gpio_request_one(&pdev->dev, button->gpio,
+ flags, button->desc ? : DRV_NAME);
+ if (error) {
+- dev_err(dev, "unable to claim gpio %u, err=%d\n",
++ dev_err(dev,
++ "unable to claim gpio %u, err=%d\n",
+ button->gpio, error);
+ return error;
+ }
+
+- button->gpiod = gpio_to_desc(button->gpio);
++ bdata->gpiod = gpio_to_desc(button->gpio);
++ if (!bdata->gpiod) {
++ dev_err(dev,
++ "unable to convert gpio %u to descriptor\n",
++ button->gpio);
++ return -EINVAL;
++ }
+ }
+
+- if (IS_ERR(button->gpiod))
+- return PTR_ERR(button->gpiod);
+-
+- bdata->can_sleep = gpiod_cansleep(button->gpiod);
++ bdata->can_sleep = gpiod_cansleep(bdata->gpiod);
+ bdata->last_state = -1;
+ bdata->threshold = DIV_ROUND_UP(button->debounce_interval,
+ pdata->poll_interval);
+@@ -344,6 +353,8 @@ static int gpio_keys_polled_probe(struct
+ button->code);
+ }
+
++ fwnode_handle_put(child);
++
+ bdev->poll_dev = poll_dev;
+ bdev->dev = dev;
+ bdev->pdata = pdata;
+--- a/include/linux/gpio_keys.h
++++ b/include/linux/gpio_keys.h
+@@ -2,7 +2,6 @@
+ #define _GPIO_KEYS_H
+
+ struct device;
+-struct gpio_desc;
+
+ /**
+ * struct gpio_keys_button - configuration parameters
+@@ -18,7 +17,6 @@ struct gpio_desc;
+ * disable button via sysfs
+ * @value: axis value for %EV_ABS
+ * @irq: Irq number in case of interrupt keys
+- * @gpiod: GPIO descriptor
+ */
+ struct gpio_keys_button {
+ unsigned int code;
+@@ -31,7 +29,6 @@ struct gpio_keys_button {
+ bool can_disable;
+ int value;
+ unsigned int irq;
+- struct gpio_desc *gpiod;
+ };
+
+ /**
+@@ -46,7 +43,7 @@ struct gpio_keys_button {
+ * @name: input device name
+ */
+ struct gpio_keys_platform_data {
+- struct gpio_keys_button *buttons;
++ const struct gpio_keys_button *buttons;
+ int nbuttons;
+ unsigned int poll_interval;
+ unsigned int rep:1;
diff --git a/patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch b/patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch
new file mode 100644
index 0000000..a9cdc97
--- /dev/null
+++ b/patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch
@@ -0,0 +1,46 @@
+From eb6f6a7ea791fcd1f306b8ec1113e6b97ee95056 Mon Sep 17 00:00:00 2001
+From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+Date: Wed, 19 Oct 2016 15:38:26 -0700
+Subject: [PATCH 014/299] Input: gpio_keys - annotate PM methods as
+ __maybe_unused
+
+Instead of using #ifdef, let's mark suspend and resume methods as
+__maybe_unused to provide better compile coverage.
+
+Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit f9645f22584250336a99a23bc9e444396b5bc323)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/input/keyboard/gpio_keys.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -829,8 +829,7 @@ static int gpio_keys_remove(struct platf
+ return 0;
+ }
+
+-#ifdef CONFIG_PM_SLEEP
+-static int gpio_keys_suspend(struct device *dev)
++static int __maybe_unused gpio_keys_suspend(struct device *dev)
+ {
+ struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev);
+ struct input_dev *input = ddata->input;
+@@ -852,7 +851,7 @@ static int gpio_keys_suspend(struct devi
+ return 0;
+ }
+
+-static int gpio_keys_resume(struct device *dev)
++static int __maybe_unused gpio_keys_resume(struct device *dev)
+ {
+ struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev);
+ struct input_dev *input = ddata->input;
+@@ -878,7 +877,6 @@ static int gpio_keys_resume(struct devic
+ gpio_keys_report_state(ddata);
+ return 0;
+ }
+-#endif
+
+ static SIMPLE_DEV_PM_OPS(gpio_keys_pm_ops, gpio_keys_suspend, gpio_keys_resume);
+
diff --git a/patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch b/patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch
new file mode 100644
index 0000000..6132a37
--- /dev/null
+++ b/patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch
@@ -0,0 +1,42 @@
+From 61d987b2399860c3fb69915397f9ef1ffe779a58 Mon Sep 17 00:00:00 2001
+From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+Date: Thu, 20 Oct 2016 15:11:45 -0700
+Subject: [PATCH 015/299] Input: gpio_keys - fix leaking DT node references
+
+for_each_available_child_of_node(node, pp) takes reference to 'pp' and
+drops it when attempting next iteration. However if we exit the loop early
+we need to drop the reference ourselves.
+
+Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit 0860913b02c28f0a1d8b515b99ae6419ef10569f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/input/keyboard/gpio_keys.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -674,6 +674,7 @@ gpio_keys_get_devtree_pdata(struct devic
+ dev_err(dev,
+ "Failed to get gpio flags, error: %d\n",
+ error);
++ of_node_put(pp);
+ return ERR_PTR(error);
+ }
+ } else {
+@@ -684,12 +685,14 @@ gpio_keys_get_devtree_pdata(struct devic
+
+ if (!gpio_is_valid(button->gpio) && !button->irq) {
+ dev_err(dev, "Found button without gpios or irqs\n");
++ of_node_put(pp);
+ return ERR_PTR(-EINVAL);
+ }
+
+ if (of_property_read_u32(pp, "linux,code", &button->code)) {
+ dev_err(dev, "Button without keycode: 0x%x\n",
+ button->gpio);
++ of_node_put(pp);
+ return ERR_PTR(-EINVAL);
+ }
+
diff --git a/patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch b/patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch
new file mode 100644
index 0000000..4c1bd16
--- /dev/null
+++ b/patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch
@@ -0,0 +1,272 @@
+From 7cd14b1171f859b60c5be3a241e580ba721f49db Mon Sep 17 00:00:00 2001
+From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+Date: Wed, 19 Oct 2016 19:34:48 -0700
+Subject: [PATCH 016/299] Input: gpio_keys - switch to using generic device
+ properties
+
+Make use of the device property API in this driver so that both OF based
+systems and ACPI based systems can use this driver.
+
+Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit 700a38b27eefc582099fdf69effacfad0ad738a4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/input/keyboard/gpio_keys.c | 143 ++++++++++++++++++-------------------
+ 1 file changed, 70 insertions(+), 73 deletions(-)
+
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -28,8 +28,6 @@
+ #include <linux/gpio.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/of.h>
+-#include <linux/of_platform.h>
+-#include <linux/of_gpio.h>
+ #include <linux/of_irq.h>
+ #include <linux/spinlock.h>
+
+@@ -468,7 +466,8 @@ static void gpio_keys_quiesce_key(void *
+ static int gpio_keys_setup_key(struct platform_device *pdev,
+ struct input_dev *input,
+ struct gpio_button_data *bdata,
+- const struct gpio_keys_button *button)
++ const struct gpio_keys_button *button,
++ struct fwnode_handle *child)
+ {
+ const char *desc = button->desc ? button->desc : "gpio_keys";
+ struct device *dev = &pdev->dev;
+@@ -481,11 +480,28 @@ static int gpio_keys_setup_key(struct pl
+ bdata->button = button;
+ spin_lock_init(&bdata->lock);
+
+- /*
+- * Legacy GPIO number, so request the GPIO here and
+- * convert it to descriptor.
+- */
+- if (gpio_is_valid(button->gpio)) {
++ if (child) {
++ bdata->gpiod = devm_get_gpiod_from_child(dev, NULL, child);
++ if (IS_ERR(bdata->gpiod)) {
++ error = PTR_ERR(bdata->gpiod);
++ if (error == -ENOENT) {
++ /*
++ * GPIO is optional, we may be dealing with
++ * purely interrupt-driven setup.
++ */
++ bdata->gpiod = NULL;
++ } else {
++ if (error != -EPROBE_DEFER)
++ dev_err(dev, "failed to get gpio: %d\n",
++ error);
++ return error;
++ }
++ }
++ } else if (gpio_is_valid(button->gpio)) {
++ /*
++ * Legacy GPIO number, so request the GPIO here and
++ * convert it to descriptor.
++ */
+ unsigned flags = GPIOF_IN;
+
+ if (button->active_low)
+@@ -502,7 +518,9 @@ static int gpio_keys_setup_key(struct pl
+ bdata->gpiod = gpio_to_desc(button->gpio);
+ if (!bdata->gpiod)
+ return -EINVAL;
++ }
+
++ if (bdata->gpiod) {
+ if (button->debounce_interval) {
+ error = gpiod_set_debounce(bdata->gpiod,
+ button->debounce_interval * 1000);
+@@ -533,9 +551,10 @@ static int gpio_keys_setup_key(struct pl
+
+ } else {
+ if (!button->irq) {
+- dev_err(dev, "No IRQ specified\n");
++ dev_err(dev, "Found button without gpio or irq\n");
+ return -EINVAL;
+ }
++
+ bdata->irq = button->irq;
+
+ if (button->type && button->type != EV_KEY) {
+@@ -627,24 +646,18 @@ static void gpio_keys_close(struct input
+ * Handlers for alternative sources of platform_data
+ */
+
+-#ifdef CONFIG_OF
+ /*
+- * Translate OpenFirmware node properties into platform_data
++ * Translate properties into platform_data
+ */
+ static struct gpio_keys_platform_data *
+ gpio_keys_get_devtree_pdata(struct device *dev)
+ {
+- struct device_node *node, *pp;
+ struct gpio_keys_platform_data *pdata;
+ struct gpio_keys_button *button;
+- int error;
++ struct fwnode_handle *child;
+ int nbuttons;
+
+- node = dev->of_node;
+- if (!node)
+- return ERR_PTR(-ENODEV);
+-
+- nbuttons = of_get_available_child_count(node);
++ nbuttons = device_get_child_node_count(dev);
+ if (nbuttons == 0)
+ return ERR_PTR(-ENODEV);
+
+@@ -659,64 +672,43 @@ gpio_keys_get_devtree_pdata(struct devic
+ pdata->buttons = button;
+ pdata->nbuttons = nbuttons;
+
+- pdata->rep = !!of_get_property(node, "autorepeat", NULL);
+-
+- of_property_read_string(node, "label", &pdata->name);
+-
+- for_each_available_child_of_node(node, pp) {
+- enum of_gpio_flags flags;
+-
+- button->gpio = of_get_gpio_flags(pp, 0, &flags);
+- if (button->gpio < 0) {
+- error = button->gpio;
+- if (error != -ENOENT) {
+- if (error != -EPROBE_DEFER)
+- dev_err(dev,
+- "Failed to get gpio flags, error: %d\n",
+- error);
+- of_node_put(pp);
+- return ERR_PTR(error);
+- }
+- } else {
+- button->active_low = flags & OF_GPIO_ACTIVE_LOW;
+- }
+-
+- button->irq = irq_of_parse_and_map(pp, 0);
++ pdata->rep = device_property_read_bool(dev, "autorepeat");
+
+- if (!gpio_is_valid(button->gpio) && !button->irq) {
+- dev_err(dev, "Found button without gpios or irqs\n");
+- of_node_put(pp);
+- return ERR_PTR(-EINVAL);
+- }
++ device_property_read_string(dev, "label", &pdata->name);
+
+- if (of_property_read_u32(pp, "linux,code", &button->code)) {
+- dev_err(dev, "Button without keycode: 0x%x\n",
+- button->gpio);
+- of_node_put(pp);
++ device_for_each_child_node(dev, child) {
++ if (is_of_node(child))
++ button->irq =
++ irq_of_parse_and_map(to_of_node(child), 0);
++
++ if (fwnode_property_read_u32(child, "linux,code",
++ &button->code)) {
++ dev_err(dev, "Button without keycode\n");
++ fwnode_handle_put(child);
+ return ERR_PTR(-EINVAL);
+ }
+
+- button->desc = of_get_property(pp, "label", NULL);
++ fwnode_property_read_string(child, "label", &button->desc);
+
+- if (of_property_read_u32(pp, "linux,input-type", &button->type))
++ if (fwnode_property_read_u32(child, "linux,input-type",
++ &button->type))
+ button->type = EV_KEY;
+
+- button->wakeup = of_property_read_bool(pp, "wakeup-source") ||
+- /* legacy name */
+- of_property_read_bool(pp, "gpio-key,wakeup");
++ button->wakeup =
++ fwnode_property_read_bool(child, "wakeup-source") ||
++ /* legacy name */
++ fwnode_property_read_bool(child, "gpio-key,wakeup");
+
+- button->can_disable = !!of_get_property(pp, "linux,can-disable", NULL);
++ button->can_disable =
++ fwnode_property_read_bool(child, "linux,can-disable");
+
+- if (of_property_read_u32(pp, "debounce-interval",
++ if (fwnode_property_read_u32(child, "debounce-interval",
+ &button->debounce_interval))
+ button->debounce_interval = 5;
+
+ button++;
+ }
+
+- if (pdata->nbuttons == 0)
+- return ERR_PTR(-EINVAL);
+-
+ return pdata;
+ }
+
+@@ -726,20 +718,11 @@ static const struct of_device_id gpio_ke
+ };
+ MODULE_DEVICE_TABLE(of, gpio_keys_of_match);
+
+-#else
+-
+-static inline struct gpio_keys_platform_data *
+-gpio_keys_get_devtree_pdata(struct device *dev)
+-{
+- return ERR_PTR(-ENODEV);
+-}
+-
+-#endif
+-
+ static int gpio_keys_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+ const struct gpio_keys_platform_data *pdata = dev_get_platdata(dev);
++ struct fwnode_handle *child = NULL;
+ struct gpio_keys_drvdata *ddata;
+ struct input_dev *input;
+ size_t size;
+@@ -792,14 +775,28 @@ static int gpio_keys_probe(struct platfo
+ const struct gpio_keys_button *button = &pdata->buttons[i];
+ struct gpio_button_data *bdata = &ddata->data[i];
+
+- error = gpio_keys_setup_key(pdev, input, bdata, button);
+- if (error)
++ if (!dev_get_platdata(dev)) {
++ child = device_get_next_child_node(&pdev->dev, child);
++ if (!child) {
++ dev_err(&pdev->dev,
++ "missing child device node for entry %d\n",
++ i);
++ return -EINVAL;
++ }
++ }
++
++ error = gpio_keys_setup_key(pdev, input, bdata, button, child);
++ if (error) {
++ fwnode_handle_put(child);
+ return error;
++ }
+
+ if (button->wakeup)
+ wakeup = 1;
+ }
+
++ fwnode_handle_put(child);
++
+ error = sysfs_create_group(&pdev->dev.kobj, &gpio_keys_attr_group);
+ if (error) {
+ dev_err(dev, "Unable to export keys/switches, error: %d\n",
+@@ -889,7 +886,7 @@ static struct platform_driver gpio_keys_
+ .driver = {
+ .name = "gpio-keys",
+ .pm = &gpio_keys_pm_ops,
+- .of_match_table = of_match_ptr(gpio_keys_of_match),
++ .of_match_table = gpio_keys_of_match,
+ }
+ };
+
diff --git a/patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch b/patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch
new file mode 100644
index 0000000..a7725ed
--- /dev/null
+++ b/patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch
@@ -0,0 +1,68 @@
+From 2f37e454f0f68b5529a171546e8234bb2c0bf2e3 Mon Sep 17 00:00:00 2001
+From: Sudeep Holla <sudeep.holla@arm.com>
+Date: Wed, 16 Nov 2016 17:01:26 -0800
+Subject: [PATCH 017/299] Input: gpio_keys - set input direction explicitly
+
+Commit 700a38b27eef ("Input: gpio_keys - switch to using generic device
+properties") switched to use generic device properties for GPIO keys and
+commit 5feeca3c1e39 ("Input: gpio_keys - add support for GPIO descriptors")
+switched from legacy GPIO numbers to GPIO descriptors.
+
+Previously devm_gpio_request_one was explicitly passed GPIOF_DIR_IN flag
+to set the GPIO direction as input. However devm_get_gpiod_from_child
+doesn't have such provisions and hence fwnode_get_named_gpiod can't set
+it as input.
+
+This breaks few platforms with the following error:
+" gpiochip_lock_as_irq: tried to flag a GPIO set as output for IRQ
+ unable to lock HW IRQ <n> for IRQ
+ genirq: Failed to request resources for POWER (irq <x>) on irqchip
+ gpio_keys: Unable to claim irq <x>; error -22
+ gpio-keys: probe failed with error -22 "
+
+This patch fixes the issue by setting input direction explicitly for
+gpio lines described by generic properties.
+
+Fixes: 700a38b27eef ("Input: gpio_keys - switch to using generic device properties")
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+(cherry picked from commit dadbb0aa363bf1233f75cab23977add69d197e23)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/input/keyboard/gpio_keys.c | 7 +++++++
+ drivers/input/keyboard/gpio_keys_polled.c | 8 ++++++++
+ 2 files changed, 15 insertions(+)
+
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -496,6 +496,13 @@ static int gpio_keys_setup_key(struct pl
+ error);
+ return error;
+ }
++ } else {
++ error = gpiod_direction_input(bdata->gpiod);
++ if (error) {
++ dev_err(dev, "Failed to configure GPIO %d as input: %d\n",
++ desc_to_gpio(bdata->gpiod), error);
++ return error;
++ }
+ }
+ } else if (gpio_is_valid(button->gpio)) {
+ /*
+--- a/drivers/input/keyboard/gpio_keys_polled.c
++++ b/drivers/input/keyboard/gpio_keys_polled.c
+@@ -314,6 +314,14 @@ static int gpio_keys_polled_probe(struct
+ fwnode_handle_put(child);
+ return error;
+ }
++
++ error = gpiod_direction_input(bdata->gpiod);
++ if (error) {
++ dev_err(dev, "Failed to configure GPIO %d as input: %d\n",
++ desc_to_gpio(bdata->gpiod), error);
++ fwnode_handle_put(child);
++ return error;
++ }
+ } else if (gpio_is_valid(button->gpio)) {
+ /*
+ * Legacy GPIO number so request the GPIO here and
diff --git a/patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch b/patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch
new file mode 100644
index 0000000..8f638e1
--- /dev/null
+++ b/patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch
@@ -0,0 +1,52 @@
+From 2210ef9034fe636cb4bec1d185ed5c903bb3b9a2 Mon Sep 17 00:00:00 2001
+From: Jisheng Zhang <jszhang@marvell.com>
+Date: Thu, 10 Nov 2016 17:21:29 +0800
+Subject: [PATCH 018/299] regulator: gpio: properly check return value of
+ of_get_named_gpio
+
+The function of_get_named_gpio() could return -ENOENT, -EPROBE_DEFER
+-EINVAL and so on. Currently, for the optional property "enable-gpio",
+we only check -EPROBE_DEFER, this is not enough since there may be
+misconfigured "enable-gpio" in the DTB, of_get_named_gpio() will return
+-EINVAL in this case, we should return immediately here. And for the
+optional property "gpios", we didn't check the return value, the driver
+will continue to the point where gpio_request_array() is called, it
+doesn't make sense to continue if we got -EPROBE_DEFER or -EINVAL here.
+
+This patch tries to address these two issues by properly checking the
+return value of of_get_named_gpio.
+
+Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 09f2ba0b0b7c44ecea49cf69a708203b76ba5535)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/regulator/gpio-regulator.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+--- a/drivers/regulator/gpio-regulator.c
++++ b/drivers/regulator/gpio-regulator.c
+@@ -162,8 +162,8 @@ of_get_gpio_regulator_config(struct devi
+ of_property_read_u32(np, "startup-delay-us", &config->startup_delay);
+
+ config->enable_gpio = of_get_named_gpio(np, "enable-gpio", 0);
+- if (config->enable_gpio == -EPROBE_DEFER)
+- return ERR_PTR(-EPROBE_DEFER);
++ if (config->enable_gpio < 0 && config->enable_gpio != -ENOENT)
++ return ERR_PTR(config->enable_gpio);
+
+ /* Fetch GPIOs. - optional property*/
+ ret = of_gpio_count(np);
+@@ -190,8 +190,11 @@ of_get_gpio_regulator_config(struct devi
+
+ for (i = 0; i < config->nr_gpios; i++) {
+ gpio = of_get_named_gpio(np, "gpios", i);
+- if (gpio < 0)
++ if (gpio < 0) {
++ if (gpio != -ENOENT)
++ return ERR_PTR(gpio);
+ break;
++ }
+ config->gpios[i].gpio = gpio;
+ if (proplen > 0) {
+ of_property_read_u32_index(np, "gpios-states",
diff --git a/patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch b/patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch
new file mode 100644
index 0000000..df8d798
--- /dev/null
+++ b/patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch
@@ -0,0 +1,103 @@
+From f071d45fa24d96f9782bcd7478da43ed9c767078 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 6 Dec 2016 17:01:28 +0100
+Subject: [PATCH 019/299] i2c: rcar: Add per-Generation fallback bindings
+
+In the case of Renesas R-Car hardware we know that there are generations of
+SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the
+relationship between IP blocks might be. For example, I believe that
+r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
+descendant of the former or vice versa.
+
+We can, however, by examining the documentation and behaviour of the
+hardware at run-time observe that the current driver implementation appears
+to be compatible with the IP blocks on SoCs within a given generation.
+
+For the above reasons and convenience when enabling new SoCs a
+per-generation fallback compatibility string scheme is being adopted for
+drivers for Renesas SoCs.
+
+Also:
+* Deprecate renesas,i2c-rcar. It seems poorly named as it is only
+ compatible with R-Car Gen 1. It also appears unused in mainline.
+* Add some text to describe per-SoC bindings
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit ad4a8dc3fec6485b18654d1090ef8012fcfc37b8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 32 +++++++++++++--------
+ drivers/i2c/busses/i2c-rcar.c | 5 ++-
+ 2 files changed, 24 insertions(+), 13 deletions(-)
+
+--- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
++++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+@@ -1,17 +1,25 @@
+ I2C for R-Car platforms
+
+ Required properties:
+-- compatible: Must be one of
+- "renesas,i2c-rcar"
+- "renesas,i2c-r8a7778"
+- "renesas,i2c-r8a7779"
+- "renesas,i2c-r8a7790"
+- "renesas,i2c-r8a7791"
+- "renesas,i2c-r8a7792"
+- "renesas,i2c-r8a7793"
+- "renesas,i2c-r8a7794"
+- "renesas,i2c-r8a7795"
+- "renesas,i2c-r8a7796"
++- compatible:
++ "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC.
++ "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC.
++ "renesas,i2c-r8a7790" if the device is a part of a R8A7790 SoC.
++ "renesas,i2c-r8a7791" if the device is a part of a R8A7791 SoC.
++ "renesas,i2c-r8a7792" if the device is a part of a R8A7792 SoC.
++ "renesas,i2c-r8a7793" if the device is a part of a R8A7793 SoC.
++ "renesas,i2c-r8a7794" if the device is a part of a R8A7794 SoC.
++ "renesas,i2c-r8a7795" if the device is a part of a R8A7795 SoC.
++ "renesas,i2c-r8a7796" if the device is a part of a R8A7796 SoC.
++ "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device.
++ "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 compatible device.
++ "renesas,rcar-gen3-i2c" for a generic R-Car Gen3 compatible device.
++ "renesas,i2c-rcar" (deprecated)
++
++ When compatible with the generic version, nodes must list the
++ SoC-specific version corresponding to the platform first followed
++ by the generic version.
++
+ - reg: physical base address of the controller and length of memory mapped
+ region.
+ - interrupts: interrupt specifier.
+@@ -33,7 +41,7 @@ Examples :
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,i2c-r8a7791";
++ compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -793,7 +793,6 @@ static const struct i2c_algorithm rcar_i
+ };
+
+ static const struct of_device_id rcar_i2c_dt_ids[] = {
+- { .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_GEN1 },
+ { .compatible = "renesas,i2c-r8a7778", .data = (void *)I2C_RCAR_GEN1 },
+ { .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 },
+ { .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 },
+@@ -803,6 +802,10 @@ static const struct of_device_id rcar_i2
+ { .compatible = "renesas,i2c-r8a7794", .data = (void *)I2C_RCAR_GEN2 },
+ { .compatible = "renesas,i2c-r8a7795", .data = (void *)I2C_RCAR_GEN3 },
+ { .compatible = "renesas,i2c-r8a7796", .data = (void *)I2C_RCAR_GEN3 },
++ { .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_GEN1 }, /* Deprecated */
++ { .compatible = "renesas,rcar-gen1-i2c", .data = (void *)I2C_RCAR_GEN1 },
++ { .compatible = "renesas,rcar-gen2-i2c", .data = (void *)I2C_RCAR_GEN2 },
++ { .compatible = "renesas,rcar-gen3-i2c", .data = (void *)I2C_RCAR_GEN3 },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
diff --git a/patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch b/patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch
new file mode 100644
index 0000000..cdaa43c
--- /dev/null
+++ b/patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch
@@ -0,0 +1,86 @@
+From 6e95f33b00994ce1efca19a2643f2c8e8f1aeb8a Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 7 Dec 2016 11:39:36 +0100
+Subject: [PATCH 020/299] i2c: sh_mobile: Add per-Generation fallback bindings
+
+Add per-Generation fallback bindings for R-Car SoCs.
+
+This is in keeping with the compatibility string scheme is being adopted
+for drivers for Renesas SoCs.
+
+Also, improve readability by listing the rmobile fallback compatibility
+string after the more-specific compatibility strings they provide a
+fallback for.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit b880ccaf1742c28e91534ad7820c4405c04dabf9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 17 +++++++++++++---
+ drivers/i2c/busses/i2c-sh_mobile.c | 4 ++-
+ 2 files changed, 17 insertions(+), 4 deletions(-)
+
+--- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
++++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
+@@ -1,8 +1,7 @@
+ Device tree configuration for Renesas IIC (sh_mobile) driver
+
+ Required properties:
+-- compatible : "renesas,iic-<soctype>". "renesas,rmobile-iic" as fallback
+- Examples with soctypes are:
++- compatible :
+ - "renesas,iic-r8a73a4" (R-Mobile APE6)
+ - "renesas,iic-r8a7740" (R-Mobile A1)
+ - "renesas,iic-r8a7790" (R-Car H2)
+@@ -12,6 +11,17 @@ Required properties:
+ - "renesas,iic-r8a7794" (R-Car E2)
+ - "renesas,iic-r8a7795" (R-Car H3)
+ - "renesas,iic-sh73a0" (SH-Mobile AG5)
++ - "renesas,rcar-gen2-iic" (generic R-Car Gen2 compatible device)
++ - "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device)
++ - "renesas,rmobile-iic" (generic device)
++
++ When compatible with a generic R-Car version, nodes
++ must list the SoC-specific version corresponding to
++ the platform first followed by the generic R-Car
++ version.
++
++ renesas,rmobile-iic must always follow.
++
+ - reg : address start and address range size of device
+ - interrupts : interrupt of device
+ - clocks : clock for device
+@@ -31,7 +41,8 @@ Pinctrl properties might be needed, too.
+ Example:
+
+ iic0: i2c@e6500000 {
+- compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
++ compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
++ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -827,7 +827,6 @@ static const struct sh_mobile_dt_config
+ };
+
+ static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
+- { .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
+ { .compatible = "renesas,iic-r8a73a4", .data = &fast_clock_dt_config },
+ { .compatible = "renesas,iic-r8a7740", .data = &r8a7740_dt_config },
+ { .compatible = "renesas,iic-r8a7790", .data = &fast_clock_dt_config },
+@@ -835,8 +834,11 @@ static const struct of_device_id sh_mobi
+ { .compatible = "renesas,iic-r8a7792", .data = &fast_clock_dt_config },
+ { .compatible = "renesas,iic-r8a7793", .data = &fast_clock_dt_config },
+ { .compatible = "renesas,iic-r8a7794", .data = &fast_clock_dt_config },
++ { .compatible = "renesas,rcar-gen2-iic", .data = &fast_clock_dt_config },
+ { .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config },
++ { .compatible = "renesas,rcar-gen3-iic", .data = &fast_clock_dt_config },
+ { .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config },
++ { .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
diff --git a/patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch b/patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch
new file mode 100644
index 0000000..ae7d9c3
--- /dev/null
+++ b/patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch
@@ -0,0 +1,50 @@
+From 0c2851a91abbf4ea96e549c695f89aa2f57bba3d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 27 Sep 2016 17:10:29 +0200
+Subject: [PATCH 021/299] base: soc: Early register bus when needed
+
+If soc_device_register() is called before soc_bus_register(), it crashes
+with a NULL pointer dereference.
+
+soc_bus_register() is already a core_initcall(), but drivers/base/ is
+entered later than e.g. drivers/pinctrl/ and drivers/soc/. Hence there
+are several subsystems that may need to know SoC revision information,
+while it's not so easy to initialize the SoC bus even earlier using an
+initcall.
+
+To fix this, let soc_device_register() register the bus early if that
+hasn't happened yet.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit 1da1b3628df34a2a5e38b70c8551770aadce969d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/base/soc.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/base/soc.c
++++ b/drivers/base/soc.c
+@@ -113,6 +113,12 @@ struct soc_device *soc_device_register(s
+ struct soc_device *soc_dev;
+ int ret;
+
++ if (!soc_bus_type.p) {
++ ret = bus_register(&soc_bus_type);
++ if (ret)
++ goto out1;
++ }
++
+ soc_dev = kzalloc(sizeof(*soc_dev), GFP_KERNEL);
+ if (!soc_dev) {
+ ret = -ENOMEM;
+@@ -156,6 +162,9 @@ void soc_device_unregister(struct soc_de
+
+ static int __init soc_bus_register(void)
+ {
++ if (soc_bus_type.p)
++ return 0;
++
+ return bus_register(&soc_bus_type);
+ }
+ core_initcall(soc_bus_register);
diff --git a/patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch b/patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch
new file mode 100644
index 0000000..91b8305
--- /dev/null
+++ b/patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch
@@ -0,0 +1,155 @@
+From b1b6e5ce1a71e21b47cc9c229eba2db35cc25f35 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Wed, 21 Sep 2016 14:57:19 +0800
+Subject: [PATCH 022/299] base: soc: Introduce soc_device_match() interface
+
+We keep running into cases where device drivers want to know the exact
+version of the a SoC they are currently running on. In the past, this has
+usually been done through a vendor specific API that can be called by a
+driver, or by directly accessing some kind of version register that is
+not part of the device itself but that belongs to a global register area
+of the chip.
+
+Common reasons for doing this include:
+
+- A machine is not using devicetree or similar for passing data about
+ on-chip devices, but just announces their presence using boot-time
+ platform devices, and the machine code itself does not care about the
+ revision.
+
+- There is existing firmware or boot loaders with existing DT binaries
+ with generic compatible strings that do not identify the particular
+ revision of each device, but the driver knows which SoC revisions
+ include which part.
+
+- A prerelease version of a chip has some quirks and we are using the same
+ version of the bootloader and the DT blob on both the prerelease and the
+ final version. An update of the DT binding seems inappropriate because
+ that would involve maintaining multiple copies of the dts and/or
+ bootloader.
+
+This patch introduces the soc_device_match() interface that is meant to
+work like of_match_node() but instead of identifying the version of a
+device, it identifies the SoC itself using a vendor-agnostic interface.
+
+Unlike of_match_node(), we do not do an exact string compare but instead
+use glob_match() to allow wildcards in strings.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit c97db7cc7778e34a53b42d58c766f0ec0e30d580)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/base/Kconfig | 1
+ drivers/base/soc.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++
+ include/linux/sys_soc.h | 3 ++
+ 3 files changed, 70 insertions(+)
+
+--- a/drivers/base/Kconfig
++++ b/drivers/base/Kconfig
+@@ -237,6 +237,7 @@ config GENERIC_CPU_AUTOPROBE
+
+ config SOC_BUS
+ bool
++ select GLOB
+
+ source "drivers/base/regmap/Kconfig"
+
+--- a/drivers/base/soc.c
++++ b/drivers/base/soc.c
+@@ -13,6 +13,7 @@
+ #include <linux/spinlock.h>
+ #include <linux/sys_soc.h>
+ #include <linux/err.h>
++#include <linux/glob.h>
+
+ static DEFINE_IDA(soc_ida);
+
+@@ -168,3 +169,68 @@ static int __init soc_bus_register(void)
+ return bus_register(&soc_bus_type);
+ }
+ core_initcall(soc_bus_register);
++
++static int soc_device_match_one(struct device *dev, void *arg)
++{
++ struct soc_device *soc_dev = container_of(dev, struct soc_device, dev);
++ const struct soc_device_attribute *match = arg;
++
++ if (match->machine &&
++ !glob_match(match->machine, soc_dev->attr->machine))
++ return 0;
++
++ if (match->family &&
++ !glob_match(match->family, soc_dev->attr->family))
++ return 0;
++
++ if (match->revision &&
++ !glob_match(match->revision, soc_dev->attr->revision))
++ return 0;
++
++ if (match->soc_id &&
++ !glob_match(match->soc_id, soc_dev->attr->soc_id))
++ return 0;
++
++ return 1;
++}
++
++/*
++ * soc_device_match - identify the SoC in the machine
++ * @matches: zero-terminated array of possible matches
++ *
++ * returns the first matching entry of the argument array, or NULL
++ * if none of them match.
++ *
++ * This function is meant as a helper in place of of_match_node()
++ * in cases where either no device tree is available or the information
++ * in a device node is insufficient to identify a particular variant
++ * by its compatible strings or other properties. For new devices,
++ * the DT binding should always provide unique compatible strings
++ * that allow the use of of_match_node() instead.
++ *
++ * The calling function can use the .data entry of the
++ * soc_device_attribute to pass a structure or function pointer for
++ * each entry.
++ */
++const struct soc_device_attribute *soc_device_match(
++ const struct soc_device_attribute *matches)
++{
++ int ret = 0;
++
++ if (!matches)
++ return NULL;
++
++ while (!ret) {
++ if (!(matches->machine || matches->family ||
++ matches->revision || matches->soc_id))
++ break;
++ ret = bus_for_each_dev(&soc_bus_type, NULL, (void *)matches,
++ soc_device_match_one);
++ if (!ret)
++ matches++;
++ else
++ return matches;
++ }
++ return NULL;
++}
++EXPORT_SYMBOL_GPL(soc_device_match);
+--- a/include/linux/sys_soc.h
++++ b/include/linux/sys_soc.h
+@@ -13,6 +13,7 @@ struct soc_device_attribute {
+ const char *family;
+ const char *revision;
+ const char *soc_id;
++ const void *data;
+ };
+
+ /**
+@@ -34,4 +35,6 @@ void soc_device_unregister(struct soc_de
+ */
+ struct device *soc_device_to_device(struct soc_device *soc);
+
++const struct soc_device_attribute *soc_device_match(
++ const struct soc_device_attribute *matches);
+ #endif /* __SOC_BUS_H */
diff --git a/patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch b/patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch
new file mode 100644
index 0000000..fdbd354
--- /dev/null
+++ b/patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch
@@ -0,0 +1,51 @@
+From bf18158073ebb40bf6903ab8d4107752106e5e3b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 3 Oct 2016 17:43:41 +0200
+Subject: [PATCH 023/299] base: soc: Check for NULL SoC device attributes
+
+If soc_device_match() is used to check the value of a specific
+attribute that is not present for the current SoC, the kernel crashes
+with a NULL pointer dereference.
+
+Fix this by explicitly checking for the absence of a needed property,
+and considering this a non-match.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit ab6a713e7dc2f92ad3bc3387122524655431501e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/base/soc.c | 12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+--- a/drivers/base/soc.c
++++ b/drivers/base/soc.c
+@@ -176,19 +176,23 @@ static int soc_device_match_one(struct d
+ const struct soc_device_attribute *match = arg;
+
+ if (match->machine &&
+- !glob_match(match->machine, soc_dev->attr->machine))
++ (!soc_dev->attr->machine ||
++ !glob_match(match->machine, soc_dev->attr->machine)))
+ return 0;
+
+ if (match->family &&
+- !glob_match(match->family, soc_dev->attr->family))
++ (!soc_dev->attr->family ||
++ !glob_match(match->family, soc_dev->attr->family)))
+ return 0;
+
+ if (match->revision &&
+- !glob_match(match->revision, soc_dev->attr->revision))
++ (!soc_dev->attr->revision ||
++ !glob_match(match->revision, soc_dev->attr->revision)))
+ return 0;
+
+ if (match->soc_id &&
+- !glob_match(match->soc_id, soc_dev->attr->soc_id))
++ (!soc_dev->attr->soc_id ||
++ !glob_match(match->soc_id, soc_dev->attr->soc_id)))
+ return 0;
+
+ return 1;
diff --git a/patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch b/patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch
new file mode 100644
index 0000000..d7e827f
--- /dev/null
+++ b/patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch
@@ -0,0 +1,32 @@
+From 0c9dacde2809aeb19d71d6b52e58fe541650b1c1 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 26 Oct 2016 15:13:15 +0200
+Subject: [PATCH 024/299] base: soc: Provide a dummy implementation of
+ soc_device_match()
+
+Provide a dummy implementation of soc_device_match(), to allow compiling
+drivers that may be used on SoCs both with and without CONFIG_SOC_BUS,
+and for compile testing.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit da65a1589dacc7ec44ea0557a14d70a39d991f32)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/linux/sys_soc.h | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/include/linux/sys_soc.h
++++ b/include/linux/sys_soc.h
+@@ -35,6 +35,12 @@ void soc_device_unregister(struct soc_de
+ */
+ struct device *soc_device_to_device(struct soc_device *soc);
+
++#ifdef CONFIG_SOC_BUS
+ const struct soc_device_attribute *soc_device_match(
+ const struct soc_device_attribute *matches);
++#else
++static inline const struct soc_device_attribute *soc_device_match(
++ const struct soc_device_attribute *matches) { return NULL; }
++#endif
++
+ #endif /* __SOC_BUS_H */
diff --git a/patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch b/patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch
new file mode 100644
index 0000000..9767fc3
--- /dev/null
+++ b/patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch
@@ -0,0 +1,43 @@
+From 72e16042d09a064fcd8173416030f9e9c9edb7bf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:07 +0100
+Subject: [PATCH 025/299] ARM: shmobile: Document DT bindings for Product
+ Register
+
+Add device tree binding documentation for the Product Register (PRR),
+which provides product and revision information on most Renesas ARM
+SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5384f45cd9714287f198771bfb057eda799af9a8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -75,3 +75,21 @@ Boards:
+ compatible = "renesas,silk", "renesas,r8a7794"
+ - Wheat
+ compatible = "renesas,wheat", "renesas,r8a7792"
++
++
++Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC
++product and revision information. If present, a device node for this register
++should be added.
++
++Required properties:
++ - compatible: Must be "renesas,prr".
++ - reg: Base address and length of the register block.
++
++
++Examples
++--------
++
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
diff --git a/patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch b/patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch
new file mode 100644
index 0000000..f7c9260
--- /dev/null
+++ b/patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch
@@ -0,0 +1,324 @@
+From a3ccc440c71bd3f53e70493098ed96475b321165 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:08 +0100
+Subject: [PATCH 026/299] soc: renesas: Identify SoC and register with the SoC
+ bus
+
+Identify the SoC type and revision, and register this information with
+the SoC bus, so it is available under /sys/devices/soc0/, and can be
+checked where needed using soc_device_match().
+
+Identification is done using the Product Register or Common Chip Code
+Register, as declared in DT (PRR only for now), or using a hardcoded
+fallback if missing.
+
+Example:
+
+ Detected Renesas R-Car Gen2 r8a7791 ES1.0
+ ...
+ # cat /sys/devices/soc0/{machine,family,soc_id,revision}
+ Koelsch
+ R-Car Gen2
+ r8a7791
+ ES1.0
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8d6799a9ba23acd675f3243580ee6f1756fb4381)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 1
+ arch/arm64/Kconfig.platforms | 1
+ drivers/soc/renesas/Makefile | 2
+ drivers/soc/renesas/renesas-soc.c | 257 ++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 261 insertions(+)
+ create mode 100644 drivers/soc/renesas/renesas-soc.c
+
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -40,6 +40,7 @@ menuconfig ARCH_RENESAS
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ select NO_IOPORT_MAP
+ select PINCTRL
++ select SOC_BUS
+ select GPIOLIB
+ select ZONE_DMA if ARM_LPAE
+
+--- a/arch/arm64/Kconfig.platforms
++++ b/arch/arm64/Kconfig.platforms
+@@ -143,6 +143,7 @@ config ARCH_RENESAS
+ select PM
+ select PM_GENERIC_DOMAINS
+ select RENESAS_IRQC
++ select SOC_BUS
+ help
+ This enables support for the ARMv8 based Renesas SoCs.
+
+--- a/drivers/soc/renesas/Makefile
++++ b/drivers/soc/renesas/Makefile
+@@ -1,3 +1,5 @@
++obj-$(CONFIG_SOC_BUS) += renesas-soc.o
++
+ obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
+ obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
+ obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
+--- /dev/null
++++ b/drivers/soc/renesas/renesas-soc.c
+@@ -0,0 +1,257 @@
++/*
++ * Renesas SoC Identification
++ *
++ * Copyright (C) 2014-2016 Glider bvba
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/io.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/string.h>
++#include <linux/sys_soc.h>
++
++
++struct renesas_family {
++ const char name[16];
++ u32 reg; /* CCCR or PRR, if not in DT */
++};
++
++static const struct renesas_family fam_rcar_gen1 __initconst __maybe_unused = {
++ .name = "R-Car Gen1",
++ .reg = 0xff000044, /* PRR (Product Register) */
++};
++
++static const struct renesas_family fam_rcar_gen2 __initconst __maybe_unused = {
++ .name = "R-Car Gen2",
++ .reg = 0xff000044, /* PRR (Product Register) */
++};
++
++static const struct renesas_family fam_rcar_gen3 __initconst __maybe_unused = {
++ .name = "R-Car Gen3",
++ .reg = 0xfff00044, /* PRR (Product Register) */
++};
++
++static const struct renesas_family fam_rmobile __initconst __maybe_unused = {
++ .name = "R-Mobile",
++ .reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
++};
++
++static const struct renesas_family fam_rza __initconst __maybe_unused = {
++ .name = "RZ/A",
++};
++
++static const struct renesas_family fam_rzg __initconst __maybe_unused = {
++ .name = "RZ/G",
++ .reg = 0xff000044, /* PRR (Product Register) */
++};
++
++static const struct renesas_family fam_shmobile __initconst __maybe_unused = {
++ .name = "SH-Mobile",
++ .reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
++};
++
++
++struct renesas_soc {
++ const struct renesas_family *family;
++ u8 id;
++};
++
++static const struct renesas_soc soc_rz_a1h __initconst __maybe_unused = {
++ .family = &fam_rza,
++};
++
++static const struct renesas_soc soc_rmobile_ape6 __initconst __maybe_unused = {
++ .family = &fam_rmobile,
++ .id = 0x3f,
++};
++
++static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
++ .family = &fam_rmobile,
++ .id = 0x40,
++};
++
++static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
++ .family = &fam_rzg,
++ .id = 0x47,
++};
++
++static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
++ .family = &fam_rzg,
++ .id = 0x4c,
++};
++
++static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
++ .family = &fam_rcar_gen1,
++};
++
++static const struct renesas_soc soc_rcar_h1 __initconst __maybe_unused = {
++ .family = &fam_rcar_gen1,
++ .id = 0x3b,
++};
++
++static const struct renesas_soc soc_rcar_h2 __initconst __maybe_unused = {
++ .family = &fam_rcar_gen2,
++ .id = 0x45,
++};
++
++static const struct renesas_soc soc_rcar_m2_w __initconst __maybe_unused = {
++ .family = &fam_rcar_gen2,
++ .id = 0x47,
++};
++
++static const struct renesas_soc soc_rcar_v2h __initconst __maybe_unused = {
++ .family = &fam_rcar_gen2,
++ .id = 0x4a,
++};
++
++static const struct renesas_soc soc_rcar_m2_n __initconst __maybe_unused = {
++ .family = &fam_rcar_gen2,
++ .id = 0x4b,
++};
++
++static const struct renesas_soc soc_rcar_e2 __initconst __maybe_unused = {
++ .family = &fam_rcar_gen2,
++ .id = 0x4c,
++};
++
++static const struct renesas_soc soc_rcar_h3 __initconst __maybe_unused = {
++ .family = &fam_rcar_gen3,
++ .id = 0x4f,
++};
++
++static const struct renesas_soc soc_rcar_m3_w __initconst __maybe_unused = {
++ .family = &fam_rcar_gen3,
++ .id = 0x52,
++};
++
++static const struct renesas_soc soc_shmobile_ag5 __initconst __maybe_unused = {
++ .family = &fam_shmobile,
++ .id = 0x37,
++};
++
++
++static const struct of_device_id renesas_socs[] __initconst = {
++#ifdef CONFIG_ARCH_R7S72100
++ { .compatible = "renesas,r7s72100", .data = &soc_rz_a1h },
++#endif
++#ifdef CONFIG_ARCH_R8A73A4
++ { .compatible = "renesas,r8a73a4", .data = &soc_rmobile_ape6 },
++#endif
++#ifdef CONFIG_ARCH_R8A7740
++ { .compatible = "renesas,r8a7740", .data = &soc_rmobile_a1 },
++#endif
++#ifdef CONFIG_ARCH_R8A7743
++ { .compatible = "renesas,r8a7743", .data = &soc_rz_g1m },
++#endif
++#ifdef CONFIG_ARCH_R8A7745
++ { .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
++#endif
++#ifdef CONFIG_ARCH_R8A7778
++ { .compatible = "renesas,r8a7778", .data = &soc_rcar_m1a },
++#endif
++#ifdef CONFIG_ARCH_R8A7779
++ { .compatible = "renesas,r8a7779", .data = &soc_rcar_h1 },
++#endif
++#ifdef CONFIG_ARCH_R8A7790
++ { .compatible = "renesas,r8a7790", .data = &soc_rcar_h2 },
++#endif
++#ifdef CONFIG_ARCH_R8A7791
++ { .compatible = "renesas,r8a7791", .data = &soc_rcar_m2_w },
++#endif
++#ifdef CONFIG_ARCH_R8A7792
++ { .compatible = "renesas,r8a7792", .data = &soc_rcar_v2h },
++#endif
++#ifdef CONFIG_ARCH_R8A7793
++ { .compatible = "renesas,r8a7793", .data = &soc_rcar_m2_n },
++#endif
++#ifdef CONFIG_ARCH_R8A7794
++ { .compatible = "renesas,r8a7794", .data = &soc_rcar_e2 },
++#endif
++#ifdef CONFIG_ARCH_R8A7795
++ { .compatible = "renesas,r8a7795", .data = &soc_rcar_h3 },
++#endif
++#ifdef CONFIG_ARCH_R8A7796
++ { .compatible = "renesas,r8a7796", .data = &soc_rcar_m3_w },
++#endif
++#ifdef CONFIG_ARCH_SH73A0
++ { .compatible = "renesas,sh73a0", .data = &soc_shmobile_ag5 },
++#endif
++ { /* sentinel */ }
++};
++
++static int __init renesas_soc_init(void)
++{
++ struct soc_device_attribute *soc_dev_attr;
++ const struct renesas_family *family;
++ const struct of_device_id *match;
++ const struct renesas_soc *soc;
++ void __iomem *chipid = NULL;
++ struct soc_device *soc_dev;
++ struct device_node *np;
++ unsigned int product;
++
++ match = of_match_node(renesas_socs, of_root);
++ if (!match)
++ return -ENODEV;
++
++ soc = match->data;
++ family = soc->family;
++
++ /* Try PRR first, then hardcoded fallback */
++ np = of_find_compatible_node(NULL, NULL, "renesas,prr");
++ if (np) {
++ chipid = of_iomap(np, 0);
++ of_node_put(np);
++ } else if (soc->id) {
++ chipid = ioremap(family->reg, 4);
++ }
++ if (chipid) {
++ product = readl(chipid);
++ iounmap(chipid);
++ if (soc->id && ((product >> 8) & 0xff) != soc->id) {
++ pr_warn("SoC mismatch (product = 0x%x)\n", product);
++ return -ENODEV;
++ }
++ }
++
++ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
++ if (!soc_dev_attr)
++ return -ENOMEM;
++
++ np = of_find_node_by_path("/");
++ of_property_read_string(np, "model", &soc_dev_attr->machine);
++ of_node_put(np);
++
++ soc_dev_attr->family = kstrdup_const(family->name, GFP_KERNEL);
++ soc_dev_attr->soc_id = kstrdup_const(strchr(match->compatible, ',') + 1,
++ GFP_KERNEL);
++ if (chipid)
++ soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u",
++ ((product >> 4) & 0x0f) + 1,
++ product & 0xf);
++
++ pr_info("Detected Renesas %s %s %s\n", soc_dev_attr->family,
++ soc_dev_attr->soc_id, soc_dev_attr->revision ?: "");
++
++ soc_dev = soc_device_register(soc_dev_attr);
++ if (IS_ERR(soc_dev)) {
++ kfree(soc_dev_attr->revision);
++ kfree_const(soc_dev_attr->soc_id);
++ kfree_const(soc_dev_attr->family);
++ kfree(soc_dev_attr);
++ return PTR_ERR(soc_dev);
++ }
++
++ return 0;
++}
++core_initcall(renesas_soc_init);
diff --git a/patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch b/patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch
new file mode 100644
index 0000000..5a2481d
--- /dev/null
+++ b/patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch
@@ -0,0 +1,49 @@
+From e09a2335c0c8c8f69aae752ac464ad8802345a51 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 6 Oct 2016 00:31:30 +0300
+Subject: [PATCH 027/299] ARM: shmobile: r8a7743: add power domain index macros
+
+Add macros usable by the device tree sources to reference R8A7743 SYSC power
+domains by index.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 538321bd97188563d739e28a2f21ad874bd28b2e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/power/r8a7743-sysc.h | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+ create mode 100644 include/dt-bindings/power/r8a7743-sysc.h
+
+--- /dev/null
++++ b/include/dt-bindings/power/r8a7743-sysc.h
+@@ -0,0 +1,25 @@
++/*
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DT_BINDINGS_POWER_R8A7743_SYSC_H__
++#define __DT_BINDINGS_POWER_R8A7743_SYSC_H__
++
++/*
++ * These power domain indices match the numbers of the interrupt bits
++ * representing the power areas in the various Interrupt Registers
++ * (e.g. SYSCISR, Interrupt Status Register)
++ */
++
++#define R8A7743_PD_CA15_CPU0 0
++#define R8A7743_PD_CA15_CPU1 1
++#define R8A7743_PD_CA15_SCU 12
++#define R8A7743_PD_SGX 20
++
++/* Always-on power area */
++#define R8A7743_PD_ALWAYS_ON 32
++
++#endif /* __DT_BINDINGS_POWER_R8A7743_SYSC_H__ */
diff --git a/patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch b/patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch
new file mode 100644
index 0000000..2f25996
--- /dev/null
+++ b/patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch
@@ -0,0 +1,112 @@
+From 301a4451dbe88b9e49f7961cd8e33b8fc84bb7d0 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 5 Oct 2016 14:35:01 -0700
+Subject: [PATCH 028/299] soc: renesas: rcar-sysc: add R8A7743 support
+
+Add support for RZ/G1M (R8A7743) SoC power areas to the R-Car SYSC driver.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 603311ba979fa5bbbf6a8961e5f7a27deafce1b4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ drivers/soc/renesas/Makefile
+---
+ Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 7 +-
+ drivers/soc/renesas/Makefile | 1
+ drivers/soc/renesas/r8a7743-sysc.c | 32 ++++++++++
+ drivers/soc/renesas/rcar-sysc.c | 3
+ drivers/soc/renesas/rcar-sysc.h | 1
+ 5 files changed, 41 insertions(+), 3 deletions(-)
+ create mode 100644 drivers/soc/renesas/r8a7743-sysc.c
+
+--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
++++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+@@ -1,12 +1,13 @@
+-DT bindings for the Renesas R-Car System Controller
++DT bindings for the Renesas R-Car (RZ/G) System Controller
+
+ == System Controller Node ==
+
+-The R-Car System Controller provides power management for the CPU cores and
+-various coprocessors.
++The R-Car (RZ/G) System Controller provides power management for the CPU cores
++and various coprocessors.
+
+ Required properties:
+ - compatible: Must contain exactly one of the following:
++ - "renesas,r8a7743-sysc" (RZ/G1M)
+ - "renesas,r8a7779-sysc" (R-Car H1)
+ - "renesas,r8a7790-sysc" (R-Car H2)
+ - "renesas,r8a7791-sysc" (R-Car M2-W)
+--- a/drivers/soc/renesas/Makefile
++++ b/drivers/soc/renesas/Makefile
+@@ -1,5 +1,6 @@
+ obj-$(CONFIG_SOC_BUS) += renesas-soc.o
+
++obj-$(CONFIG_ARCH_R8A7743) += rcar-sysc.o r8a7743-sysc.o
+ obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
+ obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
+ obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
+--- /dev/null
++++ b/drivers/soc/renesas/r8a7743-sysc.c
+@@ -0,0 +1,32 @@
++/*
++ * Renesas RZ/G1M System Controller
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation; of the License.
++ */
++
++#include <linux/bug.h>
++#include <linux/kernel.h>
++
++#include <dt-bindings/power/r8a7743-sysc.h>
++
++#include "rcar-sysc.h"
++
++static const struct rcar_sysc_area r8a7743_areas[] __initconst = {
++ { "always-on", 0, 0, R8A7743_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
++ { "ca15-scu", 0x180, 0, R8A7743_PD_CA15_SCU, R8A7743_PD_ALWAYS_ON,
++ PD_SCU },
++ { "ca15-cpu0", 0x40, 0, R8A7743_PD_CA15_CPU0, R8A7743_PD_CA15_SCU,
++ PD_CPU_NOCR },
++ { "ca15-cpu1", 0x40, 1, R8A7743_PD_CA15_CPU1, R8A7743_PD_CA15_SCU,
++ PD_CPU_NOCR },
++ { "sgx", 0xc0, 0, R8A7743_PD_SGX, R8A7743_PD_ALWAYS_ON },
++};
++
++const struct rcar_sysc_info r8a7743_sysc_info __initconst = {
++ .areas = r8a7743_areas,
++ .num_areas = ARRAY_SIZE(r8a7743_areas),
++};
+--- a/drivers/soc/renesas/rcar-sysc.c
++++ b/drivers/soc/renesas/rcar-sysc.c
+@@ -275,6 +275,9 @@ finalize:
+ }
+
+ static const struct of_device_id rcar_sysc_matches[] = {
++#ifdef CONFIG_ARCH_R8A7743
++ { .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },
++#endif
+ #ifdef CONFIG_ARCH_R8A7779
+ { .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
+ #endif
+--- a/drivers/soc/renesas/rcar-sysc.h
++++ b/drivers/soc/renesas/rcar-sysc.h
+@@ -50,6 +50,7 @@ struct rcar_sysc_info {
+ unsigned int num_areas;
+ };
+
++extern const struct rcar_sysc_info r8a7743_sysc_info;
+ extern const struct rcar_sysc_info r8a7779_sysc_info;
+ extern const struct rcar_sysc_info r8a7790_sysc_info;
+ extern const struct rcar_sysc_info r8a7791_sysc_info;
diff --git a/patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch b/patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch
new file mode 100644
index 0000000..3078947
--- /dev/null
+++ b/patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch
@@ -0,0 +1,49 @@
+From 646b8c422f6c6a8b65082de2eeed4743148cdb3b Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:44:43 +0300
+Subject: [PATCH 029/299] ARM: shmobile: r8a7745: add power domain index macros
+
+Add macros usable by the device tree sources to reference R8A7745 SYSC power
+domains by index.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 97ca8402997cd2aa6faaa9cd1e59ec3556d8948c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/power/r8a7745-sysc.h | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+ create mode 100644 include/dt-bindings/power/r8a7745-sysc.h
+
+--- /dev/null
++++ b/include/dt-bindings/power/r8a7745-sysc.h
+@@ -0,0 +1,25 @@
++/*
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DT_BINDINGS_POWER_R8A7745_SYSC_H__
++#define __DT_BINDINGS_POWER_R8A7745_SYSC_H__
++
++/*
++ * These power domain indices match the numbers of the interrupt bits
++ * representing the power areas in the various Interrupt Registers
++ * (e.g. SYSCISR, Interrupt Status Register)
++ */
++
++#define R8A7745_PD_CA7_CPU0 5
++#define R8A7745_PD_CA7_CPU1 6
++#define R8A7745_PD_SGX 20
++#define R8A7745_PD_CA7_SCU 21
++
++/* Always-on power area */
++#define R8A7745_PD_ALWAYS_ON 32
++
++#endif /* __DT_BINDINGS_POWER_R8A7745_SYSC_H__ */
diff --git a/patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch b/patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch
new file mode 100644
index 0000000..b25b75c
--- /dev/null
+++ b/patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch
@@ -0,0 +1,102 @@
+From d143434f7cd491e2b330b79d1d997481ce55387a Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:46:13 +0300
+Subject: [PATCH 030/299] soc: renesas: rcar-sysc: add R8A7745 support
+
+Add support for RZ/G1E (R8A7745) SoC power areas to the R-Car SYSC driver.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 141723e0cbdc1139410f77d8a572f17ce2de6bf5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 1
+ drivers/soc/renesas/Makefile | 1
+ drivers/soc/renesas/r8a7745-sysc.c | 32 ++++++++++
+ drivers/soc/renesas/rcar-sysc.c | 3
+ drivers/soc/renesas/rcar-sysc.h | 1
+ 5 files changed, 38 insertions(+)
+ create mode 100644 drivers/soc/renesas/r8a7745-sysc.c
+
+--- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
++++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+@@ -8,6 +8,7 @@ and various coprocessors.
+ Required properties:
+ - compatible: Must contain exactly one of the following:
+ - "renesas,r8a7743-sysc" (RZ/G1M)
++ - "renesas,r8a7745-sysc" (RZ/G1E)
+ - "renesas,r8a7779-sysc" (R-Car H1)
+ - "renesas,r8a7790-sysc" (R-Car H2)
+ - "renesas,r8a7791-sysc" (R-Car M2-W)
+--- a/drivers/soc/renesas/Makefile
++++ b/drivers/soc/renesas/Makefile
+@@ -1,6 +1,7 @@
+ obj-$(CONFIG_SOC_BUS) += renesas-soc.o
+
+ obj-$(CONFIG_ARCH_R8A7743) += rcar-sysc.o r8a7743-sysc.o
++obj-$(CONFIG_ARCH_R8A7745) += rcar-sysc.o r8a7745-sysc.o
+ obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
+ obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
+ obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
+--- /dev/null
++++ b/drivers/soc/renesas/r8a7745-sysc.c
+@@ -0,0 +1,32 @@
++/*
++ * Renesas RZ/G1E System Controller
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation; of the License.
++ */
++
++#include <linux/bug.h>
++#include <linux/kernel.h>
++
++#include <dt-bindings/power/r8a7745-sysc.h>
++
++#include "rcar-sysc.h"
++
++static const struct rcar_sysc_area r8a7745_areas[] __initconst = {
++ { "always-on", 0, 0, R8A7745_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
++ { "ca7-scu", 0x100, 0, R8A7745_PD_CA7_SCU, R8A7745_PD_ALWAYS_ON,
++ PD_SCU },
++ { "ca7-cpu0", 0x1c0, 0, R8A7745_PD_CA7_CPU0, R8A7745_PD_CA7_SCU,
++ PD_CPU_NOCR },
++ { "ca7-cpu1", 0x1c0, 1, R8A7745_PD_CA7_CPU1, R8A7745_PD_CA7_SCU,
++ PD_CPU_NOCR },
++ { "sgx", 0xc0, 0, R8A7745_PD_SGX, R8A7745_PD_ALWAYS_ON },
++};
++
++const struct rcar_sysc_info r8a7745_sysc_info __initconst = {
++ .areas = r8a7745_areas,
++ .num_areas = ARRAY_SIZE(r8a7745_areas),
++};
+--- a/drivers/soc/renesas/rcar-sysc.c
++++ b/drivers/soc/renesas/rcar-sysc.c
+@@ -278,6 +278,9 @@ static const struct of_device_id rcar_sy
+ #ifdef CONFIG_ARCH_R8A7743
+ { .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },
+ #endif
++#ifdef CONFIG_ARCH_R8A7745
++ { .compatible = "renesas,r8a7745-sysc", .data = &r8a7745_sysc_info },
++#endif
+ #ifdef CONFIG_ARCH_R8A7779
+ { .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
+ #endif
+--- a/drivers/soc/renesas/rcar-sysc.h
++++ b/drivers/soc/renesas/rcar-sysc.h
+@@ -51,6 +51,7 @@ struct rcar_sysc_info {
+ };
+
+ extern const struct rcar_sysc_info r8a7743_sysc_info;
++extern const struct rcar_sysc_info r8a7745_sysc_info;
+ extern const struct rcar_sysc_info r8a7779_sysc_info;
+ extern const struct rcar_sysc_info r8a7790_sysc_info;
+ extern const struct rcar_sysc_info r8a7791_sysc_info;
diff --git a/patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch b/patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch
new file mode 100644
index 0000000..6dbb722
--- /dev/null
+++ b/patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch
@@ -0,0 +1,33 @@
+From c2bba7499d4c150c2e0f733fa0721c55e88647c5 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 6 Dec 2016 16:51:29 +0100
+Subject: [PATCH 031/299] PCI: rcar-gen2: Use gen2 fallback compatibility last
+
+Improve readability by listing fallback compatibility strings after the
+more-specific compatibility strings they provide a fallback for.
+
+This does not affect run-time behaviour as it is the order in the DTB that
+determines which compatibility string is used.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+(cherry picked from commit 7b99d94277ba49f401b7a5c1ad8a9084cc6c34a6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pci/host/pci-rcar-gen2.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/pci/host/pci-rcar-gen2.c
++++ b/drivers/pci/host/pci-rcar-gen2.c
+@@ -430,10 +430,10 @@ static int rcar_pci_probe(struct platfor
+ }
+
+ static struct of_device_id rcar_pci_of_match[] = {
+- { .compatible = "renesas,pci-rcar-gen2", },
+ { .compatible = "renesas,pci-r8a7790", },
+ { .compatible = "renesas,pci-r8a7791", },
+ { .compatible = "renesas,pci-r8a7794", },
++ { .compatible = "renesas,pci-rcar-gen2", },
+ { },
+ };
+
diff --git a/patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch b/patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch
new file mode 100644
index 0000000..9d8feec
--- /dev/null
+++ b/patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch
@@ -0,0 +1,36 @@
+From 457e6256de183a1a872221c186752f3cbc04e5bf Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 6 Dec 2016 16:51:30 +0100
+Subject: [PATCH 032/299] PCI: rcar: Use gen2 fallback compatibility last
+
+Improve readability by listing fallback compatibility strings after the
+more-specific compatibility strings they provide a fallback for.
+
+This does not affect run-time behaviour as it is the order in the DTB that
+determines which compatibility string is used.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+(cherry picked from commit d83a328ad185b1e487a82479f840435ae297bee1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pci/host/pcie-rcar.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/host/pcie-rcar.c
++++ b/drivers/pci/host/pcie-rcar.c
+@@ -1071,12 +1071,12 @@ static int rcar_pcie_parse_map_dma_range
+
+ static const struct of_device_id rcar_pcie_of_match[] = {
+ { .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
+- { .compatible = "renesas,pcie-rcar-gen2",
+- .data = rcar_pcie_hw_init_gen2 },
+ { .compatible = "renesas,pcie-r8a7790",
+ .data = rcar_pcie_hw_init_gen2 },
+ { .compatible = "renesas,pcie-r8a7791",
+ .data = rcar_pcie_hw_init_gen2 },
++ { .compatible = "renesas,pcie-rcar-gen2",
++ .data = rcar_pcie_hw_init_gen2 },
+ { .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
+ {},
+ };
diff --git a/patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch b/patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch
new file mode 100644
index 0000000..602ff2c
--- /dev/null
+++ b/patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch
@@ -0,0 +1,40 @@
+From b3fdbc9f61d632b1a105a78e360395ec95800703 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 6 Dec 2016 16:51:31 +0100
+Subject: [PATCH 033/299] PCI: rcar: Add gen3 fallback compatibility string for
+ pcie-rcar
+
+Add fallback compatibility string for the R-Car Gen 3 family. This is in
+keeping with the both the existing fallback compatibility string for the
+R-Car Gen 2 family and the fallback scheme being adopted wherever
+appropriate for drivers for Renesas SoCs.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+(cherry picked from commit 49da21108f773b50b01b9fd0b6ca97b91b6ff216)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/pci/rcar-pci.txt | 1 +
+ drivers/pci/host/pcie-rcar.c | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
++++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
+@@ -7,6 +7,7 @@ compatible: "renesas,pcie-r8a7779" for t
+ "renesas,pcie-r8a7793" for the R8A7793 SoC;
+ "renesas,pcie-r8a7795" for the R8A7795 SoC;
+ "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.
++ "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first
+--- a/drivers/pci/host/pcie-rcar.c
++++ b/drivers/pci/host/pcie-rcar.c
+@@ -1078,6 +1078,7 @@ static const struct of_device_id rcar_pc
+ { .compatible = "renesas,pcie-rcar-gen2",
+ .data = rcar_pcie_hw_init_gen2 },
+ { .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
++ { .compatible = "renesas,pcie-rcar-gen3", .data = rcar_pcie_hw_init },
+ {},
+ };
+
diff --git a/patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch b/patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch
new file mode 100644
index 0000000..cf1c416
--- /dev/null
+++ b/patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch
@@ -0,0 +1,555 @@
+From e9122e0a81541001cc44f17a02bbfb19d8e0ded5 Mon Sep 17 00:00:00 2001
+From: Timur Tabi <timur@codeaurora.org>
+Date: Wed, 7 Dec 2016 13:20:51 -0600
+Subject: [PATCH 034/299] net: phy: phy drivers should not set
+ SUPPORTED_[Asym_]Pause
+
+Instead of having individual PHY drivers set the SUPPORTED_Pause and
+SUPPORTED_Asym_Pause flags, phylib itself should set those flags,
+unless there is a hardware erratum or other special case. During
+autonegotiation, the PHYs will determine whether to enable pause
+frame support.
+
+Pause frames are a feature that is supported by the MAC. It is the MAC
+that generates the frames and that processes them. The PHY can only be
+configured to allow them to pass through.
+
+This commit also effectively reverts the recently applied c7a61319
+("net: phy: dp83848: Support ethernet pause frames").
+
+So the new process is:
+
+1) Unless the PHY driver overrides it, phylib sets the SUPPORTED_Pause
+and SUPPORTED_AsymPause bits in phydev->supported. This indicates that
+the PHY supports pause frames.
+
+2) The MAC driver checks phydev->supported before it calls phy_start().
+If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver
+sets those bits in phydev->advertising, if it wants to enable pause
+frame support.
+
+3) When the link state changes, the MAC driver checks phydev->pause and
+phydev->asym_pause, If the bits are set, then it enables the corresponding
+features in the MAC. The algorithm is:
+
+ if (phydev->pause)
+ The MAC should be programmed to receive and honor
+ pause frames it receives, i.e. enable receive flow control.
+
+ if (phydev->pause != phydev->asym_pause)
+ The MAC should be programmed to transmit pause
+ frames when needed, i.e. enable transmit flow control.
+
+Signed-off-by: Timur Tabi <timur@codeaurora.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 529ed12752635ba8a35dc78ec70ed6f42570b4ca)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/phy/bcm-cygnus.c | 3 +--
+ drivers/net/phy/bcm7xxx.c | 6 ++----
+ drivers/net/phy/broadcom.c | 36 ++++++++++++------------------------
+ drivers/net/phy/icplus.c | 6 ++----
+ drivers/net/phy/intel-xway.c | 24 ++++++++----------------
+ drivers/net/phy/micrel.c | 30 ++++++++++++------------------
+ drivers/net/phy/microchip.c | 3 +--
+ drivers/net/phy/national.c | 2 +-
+ drivers/net/phy/phy_device.c | 19 +++++++++++++++++++
+ drivers/net/phy/smsc.c | 18 ++++++------------
+ 10 files changed, 64 insertions(+), 83 deletions(-)
+
+--- a/drivers/net/phy/bcm-cygnus.c
++++ b/drivers/net/phy/bcm-cygnus.c
+@@ -134,8 +134,7 @@ static struct phy_driver bcm_cygnus_phy_
+ .phy_id = PHY_ID_BCM_CYGNUS,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom Cygnus PHY",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .config_init = bcm_cygnus_config_init,
+ .config_aneg = genphy_config_aneg,
+ .read_status = genphy_read_status,
+--- a/drivers/net/phy/bcm7xxx.c
++++ b/drivers/net/phy/bcm7xxx.c
+@@ -308,8 +308,7 @@ static int bcm7xxx_suspend(struct phy_de
+ .phy_id = (_oui), \
+ .phy_id_mask = 0xfffffff0, \
+ .name = _name, \
+- .features = PHY_GBIT_FEATURES | \
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause, \
++ .features = PHY_GBIT_FEATURES, \
+ .flags = PHY_IS_INTERNAL, \
+ .config_init = bcm7xxx_28nm_config_init, \
+ .config_aneg = genphy_config_aneg, \
+@@ -322,8 +321,7 @@ static int bcm7xxx_suspend(struct phy_de
+ .phy_id = (_oui), \
+ .phy_id_mask = 0xfffffff0, \
+ .name = _name, \
+- .features = PHY_BASIC_FEATURES | \
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause, \
++ .features = PHY_BASIC_FEATURES, \
+ .flags = PHY_IS_INTERNAL, \
+ .config_init = bcm7xxx_config_init, \
+ .config_aneg = genphy_config_aneg, \
+--- a/drivers/net/phy/broadcom.c
++++ b/drivers/net/phy/broadcom.c
+@@ -452,8 +452,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5411,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5411",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -464,8 +463,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5421,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5421",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -476,8 +474,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5461,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5461",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -488,8 +485,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM54616S,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM54616S",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -500,8 +496,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5464,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5464",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -512,8 +507,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5481,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5481",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = bcm5481_config_aneg,
+@@ -524,8 +518,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5482,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5482",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm5482_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -536,8 +529,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM50610,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM50610",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -548,8 +540,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM50610M,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM50610M",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -560,8 +551,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM57780,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM57780",
+- .features = PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = bcm54xx_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -572,8 +562,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCMAC131,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCMAC131",
+- .features = PHY_BASIC_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = brcm_fet_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -584,8 +573,7 @@ static struct phy_driver broadcom_driver
+ .phy_id = PHY_ID_BCM5241,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM5241",
+- .features = PHY_BASIC_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = brcm_fet_config_init,
+ .config_aneg = genphy_config_aneg,
+--- a/drivers/net/phy/icplus.c
++++ b/drivers/net/phy/icplus.c
+@@ -225,8 +225,7 @@ static struct phy_driver icplus_driver[]
+ .phy_id = 0x02430d90,
+ .name = "ICPlus IP1001",
+ .phy_id_mask = 0x0ffffff0,
+- .features = PHY_GBIT_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .config_init = &ip1001_config_init,
+ .config_aneg = &genphy_config_aneg,
+ .read_status = &genphy_read_status,
+@@ -236,8 +235,7 @@ static struct phy_driver icplus_driver[]
+ .phy_id = 0x02430c54,
+ .name = "ICPlus IP101A/G",
+ .phy_id_mask = 0x0ffffff0,
+- .features = PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause,
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .ack_interrupt = ip101a_g_ack_interrupt,
+ .config_init = &ip101a_g_config_init,
+--- a/drivers/net/phy/intel-xway.c
++++ b/drivers/net/phy/intel-xway.c
+@@ -239,8 +239,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY11G_1_3,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.3",
+- .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = xway_gphy14_config_aneg,
+@@ -254,8 +253,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY22F_1_3,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY22F (PEF 7061) v1.3",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = xway_gphy14_config_aneg,
+@@ -269,8 +267,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY11G_1_4,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.4",
+- .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = xway_gphy14_config_aneg,
+@@ -284,8 +281,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY22F_1_4,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY22F (PEF 7061) v1.4",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = xway_gphy14_config_aneg,
+@@ -299,8 +295,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY11G_1_5,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.5 / v1.6",
+- .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -314,8 +309,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY22F_1_5,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY22F (PEF 7061) v1.5 / v1.6",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -329,8 +323,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY11G_VR9,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY11G (xRX integrated)",
+- .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -344,8 +337,7 @@ static struct phy_driver xway_gphy[] = {
+ .phy_id = PHY_ID_PHY22F_VR9,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY22F (xRX integrated)",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+ .config_aneg = genphy_config_aneg,
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -792,7 +792,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KS8737,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KS8737",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ks8737_type,
+ .config_init = kszphy_config_init,
+@@ -809,8 +809,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8021,
+ .phy_id_mask = 0x00ffffff,
+ .name = "Micrel KSZ8021 or KSZ8031",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8021_type,
+ .probe = kszphy_probe,
+@@ -828,8 +827,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8031,
+ .phy_id_mask = 0x00ffffff,
+ .name = "Micrel KSZ8031",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+- SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8021_type,
+ .probe = kszphy_probe,
+@@ -847,8 +845,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8041,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ8041",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8041_type,
+ .probe = kszphy_probe,
+@@ -866,8 +863,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8041RNLI,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ8041RNLI",
+- .features = PHY_BASIC_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8041_type,
+ .probe = kszphy_probe,
+@@ -885,8 +881,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8051,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ8051",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8051_type,
+ .probe = kszphy_probe,
+@@ -904,7 +899,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8001,
+ .name = "Micrel KSZ8001 or KS8721",
+ .phy_id_mask = 0x00fffffc,
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8041_type,
+ .probe = kszphy_probe,
+@@ -922,7 +917,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8081,
+ .name = "Micrel KSZ8081 or KSZ8091",
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz8081_type,
+ .probe = kszphy_probe,
+@@ -940,7 +935,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8061,
+ .name = "Micrel KSZ8061",
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = kszphy_config_init,
+ .config_aneg = genphy_config_aneg,
+@@ -956,7 +951,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ9021,
+ .phy_id_mask = 0x000ffffe,
+ .name = "Micrel KSZ9021 Gigabit PHY",
+- .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz9021_type,
+ .config_init = ksz9021_config_init,
+@@ -975,7 +970,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ9031,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ9031 Gigabit PHY",
+- .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .driver_data = &ksz9021_type,
+ .config_init = ksz9031_config_init,
+@@ -992,7 +987,6 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8873MLL,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ8873MLL Switch",
+- .features = (SUPPORTED_Pause | SUPPORTED_Asym_Pause),
+ .flags = PHY_HAS_MAGICANEG,
+ .config_init = kszphy_config_init,
+ .config_aneg = ksz8873mll_config_aneg,
+@@ -1006,7 +1000,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ886X,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ886X Switch",
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = kszphy_config_init,
+ .config_aneg = genphy_config_aneg,
+--- a/drivers/net/phy/microchip.c
++++ b/drivers/net/phy/microchip.c
+@@ -112,8 +112,7 @@ static struct phy_driver microchip_phy_d
+ .phy_id_mask = 0xfffffff0,
+ .name = "Microchip LAN88xx",
+
+- .features = (PHY_GBIT_FEATURES |
+- SUPPORTED_Pause | SUPPORTED_Asym_Pause),
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = lan88xx_probe,
+--- a/drivers/net/phy/national.c
++++ b/drivers/net/phy/national.c
+@@ -133,7 +133,7 @@ static struct phy_driver dp83865_driver[
+ .phy_id = DP83865_PHY_ID,
+ .phy_id_mask = 0xfffffff0,
+ .name = "NatSemi DP83865",
+- .features = PHY_GBIT_FEATURES | SUPPORTED_Pause | SUPPORTED_Asym_Pause,
++ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = ns_config_init,
+ .config_aneg = genphy_config_aneg,
+--- a/drivers/net/phy/phy_device.c
++++ b/drivers/net/phy/phy_device.c
+@@ -1699,6 +1699,25 @@ static int phy_probe(struct device *dev)
+ */
+ of_set_phy_eee_broken(phydev);
+
++ /* The Pause Frame bits indicate that the PHY can support passing
++ * pause frames. During autonegotiation, the PHYs will determine if
++ * they should allow pause frames to pass. The MAC driver should then
++ * use that result to determine whether to enable flow control via
++ * pause frames.
++ *
++ * Normally, PHY drivers should not set the Pause bits, and instead
++ * allow phylib to do that. However, there may be some situations
++ * (e.g. hardware erratum) where the driver wants to set only one
++ * of these bits.
++ */
++ if (phydrv->features & (SUPPORTED_Pause | SUPPORTED_Asym_Pause)) {
++ phydev->supported &= ~(SUPPORTED_Pause | SUPPORTED_Asym_Pause);
++ phydev->supported |= phydrv->features &
++ (SUPPORTED_Pause | SUPPORTED_Asym_Pause);
++ } else {
++ phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
++ }
++
+ /* Set the state to READY by default */
+ phydev->state = PHY_READY;
+
+--- a/drivers/net/phy/smsc.c
++++ b/drivers/net/phy/smsc.c
+@@ -168,8 +168,7 @@ static struct phy_driver smsc_phy_driver
+ .phy_id_mask = 0xfffffff0,
+ .name = "SMSC LAN83C185",
+
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = smsc_phy_probe,
+@@ -191,8 +190,7 @@ static struct phy_driver smsc_phy_driver
+ .phy_id_mask = 0xfffffff0,
+ .name = "SMSC LAN8187",
+
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = smsc_phy_probe,
+@@ -214,8 +212,7 @@ static struct phy_driver smsc_phy_driver
+ .phy_id_mask = 0xfffffff0,
+ .name = "SMSC LAN8700",
+
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = smsc_phy_probe,
+@@ -237,8 +234,7 @@ static struct phy_driver smsc_phy_driver
+ .phy_id_mask = 0xfffffff0,
+ .name = "SMSC LAN911x Internal PHY",
+
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = smsc_phy_probe,
+@@ -259,8 +255,7 @@ static struct phy_driver smsc_phy_driver
+ .phy_id_mask = 0xfffffff0,
+ .name = "SMSC LAN8710/LAN8720",
+
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = smsc_phy_probe,
+@@ -282,8 +277,7 @@ static struct phy_driver smsc_phy_driver
+ .phy_id_mask = 0xfffffff0,
+ .name = "SMSC LAN8740",
+
+- .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
+- | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT | PHY_HAS_MAGICANEG,
+
+ .probe = smsc_phy_probe,
diff --git a/patches.renesas/0035-net-phy-micrel-KSZ8795-do-not-set-SUPPORTED_-Asym_-P.patch b/patches.renesas/0035-net-phy-micrel-KSZ8795-do-not-set-SUPPORTED_-Asym_-P.patch
new file mode 100644
index 0000000..5e5fec8
--- /dev/null
+++ b/patches.renesas/0035-net-phy-micrel-KSZ8795-do-not-set-SUPPORTED_-Asym_-P.patch
@@ -0,0 +1,30 @@
+From fd71addd54ab0bdc778b3c0a33623b13b916121f Mon Sep 17 00:00:00 2001
+From: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
+Date: Fri, 27 Jan 2017 21:39:03 +0100
+Subject: [PATCH 035/299] net: phy: micrel: KSZ8795 do not set
+ SUPPORTED_[Asym_]Pause
+
+As pr commit "net: phy: phy drivers should not set SUPPORTED_[Asym_]Pause"
+this phy driver should not set these feature bits.
+
+Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
+Fixes: 9d162ed69f51 ("net: phy: micrel: add support for KSZ8795")
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit cf626c3b252b2c9d131be0dd66096ec3bf729e54)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/phy/micrel.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -1014,7 +1014,7 @@ static struct phy_driver ksphy_driver[]
+ .phy_id = PHY_ID_KSZ8795,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Micrel KSZ8795",
+- .features = (SUPPORTED_Pause | SUPPORTED_Asym_Pause),
++ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+ .config_init = kszphy_config_init,
+ .config_aneg = ksz8873mll_config_aneg,
diff --git a/patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch b/patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch
new file mode 100644
index 0000000..69e2d07
--- /dev/null
+++ b/patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch
@@ -0,0 +1,214 @@
+From 7499be4ae81bffdbfa654e6ec22b812d3ad201a5 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 9 Nov 2016 11:30:25 +0900
+Subject: [PATCH 036/299] phy: rcar-gen3-usb2: add sysfs for usb role swap
+
+This patch adds sysfs "role" for usb role swap. This parameter can be
+read and write. If you use this file as the following, you can swap
+the usb role.
+
+For example:
+ 1) Connect a usb cable using 2 Salvator-x boards
+ 2) On A-Device (ID pin is low), you input the following command:
+ # echo peripheral > /sys/devices/platform/soc/ee080200.usb-phy/role
+ 3) On B-Device (ID pin is high), you input the following command:
+ # echo host > /sys/devices/platform/soc/ee080200.usb-phy/role
+
+Then, the A-device acts as a peripheral and the B-device acts as a host.
+Please note that A-Device must input the following command if you
+want the board to act as a host again. (even if you disconnect the usb
+cable, since id state may be the same, the A-Device keeps to act as
+peripheral.)
+ # echo host > /sys/devices/platform/soc/ee080200.usb-phy/role
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Reviewed-by: Peter Chen <peter.chen@nxp.com>
+Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
+(cherry picked from commit 9bb86777fb71eeb7cec0c906b6a4d3432c683507)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2 | 15 +
+ drivers/phy/phy-rcar-gen3-usb2.c | 118 +++++++++++-
+ 2 files changed, 132 insertions(+), 1 deletion(-)
+ create mode 100644 Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2
+
+--- /dev/null
++++ b/Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2
+@@ -0,0 +1,15 @@
++What: /sys/devices/platform/<phy-name>/role
++Date: October 2016
++KernelVersion: 4.10
++Contact: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
++Description:
++ This file can be read and write.
++ The file can show/change the phy mode for role swap of usb.
++
++ Write the following strings to change the mode:
++ "host" - switching mode from peripheral to host.
++ "peripheral" - switching mode from host to peripheral.
++
++ Read the file, then it shows the following strings:
++ "host" - The mode is host now.
++ "peripheral" - The mode is peripheral now.
+--- a/drivers/phy/phy-rcar-gen3-usb2.c
++++ b/drivers/phy/phy-rcar-gen3-usb2.c
+@@ -70,6 +70,7 @@
+ #define USB2_LINECTRL1_DP_RPD BIT(18)
+ #define USB2_LINECTRL1_DMRPD_EN BIT(17)
+ #define USB2_LINECTRL1_DM_RPD BIT(16)
++#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
+
+ /* ADPCTRL */
+ #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
+@@ -161,6 +162,43 @@ static void rcar_gen3_init_for_peri(stru
+ schedule_work(&ch->work);
+ }
+
++static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
++{
++ void __iomem *usb2_base = ch->base;
++ u32 val;
++
++ val = readl(usb2_base + USB2_LINECTRL1);
++ writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
++
++ rcar_gen3_set_linectrl(ch, 1, 1);
++ rcar_gen3_set_host_mode(ch, 1);
++ rcar_gen3_enable_vbus_ctrl(ch, 0);
++
++ val = readl(usb2_base + USB2_LINECTRL1);
++ writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
++}
++
++static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
++{
++ rcar_gen3_set_linectrl(ch, 0, 1);
++ rcar_gen3_set_host_mode(ch, 0);
++ rcar_gen3_enable_vbus_ctrl(ch, 1);
++}
++
++static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
++{
++ void __iomem *usb2_base = ch->base;
++ u32 val;
++
++ val = readl(usb2_base + USB2_OBINTEN);
++ writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
++
++ rcar_gen3_enable_vbus_ctrl(ch, 0);
++ rcar_gen3_init_for_host(ch);
++
++ writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
++}
++
+ static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
+ {
+ return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
+@@ -174,6 +212,65 @@ static void rcar_gen3_device_recognition
+ rcar_gen3_init_for_peri(ch);
+ }
+
++static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
++{
++ return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
++}
++
++static ssize_t role_store(struct device *dev, struct device_attribute *attr,
++ const char *buf, size_t count)
++{
++ struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
++ bool is_b_device, is_host, new_mode_is_host;
++
++ if (!ch->has_otg || !ch->phy->init_count)
++ return -EIO;
++
++ /*
++ * is_b_device: true is B-Device. false is A-Device.
++ * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
++ */
++ is_b_device = rcar_gen3_check_id(ch);
++ is_host = rcar_gen3_is_host(ch);
++ if (!strncmp(buf, "host", strlen("host")))
++ new_mode_is_host = true;
++ else if (!strncmp(buf, "peripheral", strlen("peripheral")))
++ new_mode_is_host = false;
++ else
++ return -EINVAL;
++
++ /* If current and new mode is the same, this returns the error */
++ if (is_host == new_mode_is_host)
++ return -EINVAL;
++
++ if (new_mode_is_host) { /* And is_host must be false */
++ if (!is_b_device) /* A-Peripheral */
++ rcar_gen3_init_from_a_peri_to_a_host(ch);
++ else /* B-Peripheral */
++ rcar_gen3_init_for_b_host(ch);
++ } else { /* And is_host must be true */
++ if (!is_b_device) /* A-Host */
++ rcar_gen3_init_for_a_peri(ch);
++ else /* B-Host */
++ rcar_gen3_init_for_peri(ch);
++ }
++
++ return count;
++}
++
++static ssize_t role_show(struct device *dev, struct device_attribute *attr,
++ char *buf)
++{
++ struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
++
++ if (!ch->has_otg || !ch->phy->init_count)
++ return -EIO;
++
++ return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
++ "peripheral");
++}
++static DEVICE_ATTR_RW(role);
++
+ static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
+ {
+ void __iomem *usb2_base = ch->base;
+@@ -351,21 +448,40 @@ static int rcar_gen3_phy_usb2_probe(stru
+ channel->vbus = NULL;
+ }
+
++ platform_set_drvdata(pdev, channel);
+ phy_set_drvdata(channel->phy, channel);
+
+ provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+- if (IS_ERR(provider))
++ if (IS_ERR(provider)) {
+ dev_err(dev, "Failed to register PHY provider\n");
++ } else if (channel->has_otg) {
++ int ret;
++
++ ret = device_create_file(dev, &dev_attr_role);
++ if (ret < 0)
++ return ret;
++ }
+
+ return PTR_ERR_OR_ZERO(provider);
+ }
+
++static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
++{
++ struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
++
++ if (channel->has_otg)
++ device_remove_file(&pdev->dev, &dev_attr_role);
++
++ return 0;
++};
++
+ static struct platform_driver rcar_gen3_phy_usb2_driver = {
+ .driver = {
+ .name = "phy_rcar_gen3_usb2",
+ .of_match_table = rcar_gen3_phy_usb2_match_table,
+ },
+ .probe = rcar_gen3_phy_usb2_probe,
++ .remove = rcar_gen3_phy_usb2_remove,
+ };
+ module_platform_driver(rcar_gen3_phy_usb2_driver);
+
diff --git a/patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch b/patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch
new file mode 100644
index 0000000..eb7cc1d
--- /dev/null
+++ b/patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch
@@ -0,0 +1,44 @@
+From a7a48e31c9e4b81480567815edac83c56f631fbd Mon Sep 17 00:00:00 2001
+From: Chris Paterson <chris.paterson2@renesas.com>
+Date: Thu, 24 Nov 2016 16:11:56 +0000
+Subject: [PATCH 037/299] can: rcar_can: Add r8a7796 support
+
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+(cherry picked from commit 2f500e39ca96e3d2da911b79c9b63eb6134548de)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 +++++++-----
+ 1 file changed, 7 insertions(+), 5 deletions(-)
+
+--- a/Documentation/devicetree/bindings/net/can/rcar_can.txt
++++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
+@@ -10,6 +10,7 @@ Required properties:
+ "renesas,can-r8a7793" if CAN controller is a part of R8A7793 SoC.
+ "renesas,can-r8a7794" if CAN controller is a part of R8A7794 SoC.
+ "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC.
++ "renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC.
+ "renesas,rcar-gen1-can" for a generic R-Car Gen1 compatible device.
+ "renesas,rcar-gen2-can" for a generic R-Car Gen2 compatible device.
+ "renesas,rcar-gen3-can" for a generic R-Car Gen3 compatible device.
+@@ -24,11 +25,12 @@ Required properties:
+ - pinctrl-0: pin control group to be used for this controller.
+ - pinctrl-names: must be "default".
+
+-Required properties for "renesas,can-r8a7795" compatible:
+-In R8A7795 SoC, "clkp2" can be CANFD clock. This is a div6 clock and can be
+-used by both CAN and CAN FD controller at the same time. It needs to be scaled
+-to maximum frequency if any of these controllers use it. This is done using
+-the below properties.
++Required properties for "renesas,can-r8a7795" and "renesas,can-r8a7796"
++compatible:
++In R8A7795 and R8A7796 SoCs, "clkp2" can be CANFD clock. This is a div6 clock
++and can be used by both CAN and CAN FD controller at the same time. It needs to
++be scaled to maximum frequency if any of these controllers use it. This is done
++using the below properties:
+
+ - assigned-clocks: phandle of clkp2(CANFD) clock.
+ - assigned-clock-rates: maximum frequency of this clock.
diff --git a/patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch b/patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch
new file mode 100644
index 0000000..1daca37
--- /dev/null
+++ b/patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch
@@ -0,0 +1,44 @@
+From 173f9faa72078b16f0db3040cd482ba73329ffa1 Mon Sep 17 00:00:00 2001
+From: Chris Paterson <chris.paterson2@renesas.com>
+Date: Thu, 24 Nov 2016 16:11:57 +0000
+Subject: [PATCH 038/299] can: rcar_canfd: Add r8a7796 support
+
+Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+(cherry picked from commit b4e79e46936f713ca59120c68977e06be325d11c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/net/can/rcar_canfd.txt | 12 +++++++-----
+ 1 file changed, 7 insertions(+), 5 deletions(-)
+
+--- a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
++++ b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
+@@ -5,6 +5,7 @@ Required properties:
+ - compatible: Must contain one or more of the following:
+ - "renesas,rcar-gen3-canfd" for R-Car Gen3 compatible controller.
+ - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
++ - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3) compatible controller.
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first, followed by the
+@@ -23,11 +24,12 @@ The name of the child nodes are "channel
+ child node supports the "status" property only, which is used to
+ enable/disable the respective channel.
+
+-Required properties for "renesas,r8a7795-canfd" compatible:
+-In R8A7795 SoC, canfd clock is a div6 clock and can be used by both CAN
+-and CAN FD controller at the same time. It needs to be scaled to maximum
+-frequency if any of these controllers use it. This is done using the
+-below properties.
++Required properties for "renesas,r8a7795-canfd" and "renesas,r8a7796-canfd"
++compatible:
++In R8A7795 and R8A7796 SoCs, canfd clock is a div6 clock and can be used by both
++CAN and CAN FD controller at the same time. It needs to be scaled to maximum
++frequency if any of these controllers use it. This is done using the below
++properties:
+
+ - assigned-clocks: phandle of canfd clock.
+ - assigned-clock-rates: maximum frequency of this clock.
diff --git a/patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch b/patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch
new file mode 100644
index 0000000..a6fb8e8
--- /dev/null
+++ b/patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch
@@ -0,0 +1,31 @@
+From 0a8a692beaf44abdf0e4e74deec28d8a754b05f5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 23 Nov 2016 14:44:46 +0100
+Subject: [PATCH 039/299] can: rcar_canfd: Correct order of interrupt
+ specifiers
+
+According to both DTS (example and actual files), and Linux driver code,
+the first interrupt specifier should be the Channel interrupt, while the
+second interrupt specifier should be the Global interrupt.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
+(cherry picked from commit 08469bba2852da651ce7a047495685c10164c63b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/net/can/rcar_canfd.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
++++ b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt
+@@ -12,7 +12,7 @@ Required properties:
+ family-specific and/or generic versions.
+
+ - reg: physical base address and size of the R-Car CAN FD register map.
+-- interrupts: interrupt specifier for the Global & Channel interrupts
++- interrupts: interrupt specifiers for the Channel & Global interrupts
+ - clocks: phandles and clock specifiers for 3 clock inputs.
+ - clock-names: 3 clock input name strings: "fck", "canfd", "can_clk".
+ - pinctrl-0: pin control group to be used for this controller.
diff --git a/patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch b/patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch
new file mode 100644
index 0000000..41b7e06
--- /dev/null
+++ b/patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch
@@ -0,0 +1,25 @@
+From 084a43d4a5bcf147a2853e03fcae73c953c64883 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Thu, 24 Nov 2016 15:23:06 +0100
+Subject: [PATCH 040/299] dmaengine: rcar-dmac: Document R-Car M3-W bindings
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+(cherry picked from commit 942ba9dc133d82e4ce8cb006e7111aa1b3dcaec7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
++++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt
+@@ -24,6 +24,7 @@ Required Properties:
+ - "renesas,dmac-r8a7793" (R-Car M2-N)
+ - "renesas,dmac-r8a7794" (R-Car E2)
+ - "renesas,dmac-r8a7795" (R-Car H3)
++ - "renesas,dmac-r8a7796" (R-Car M3-W)
+
+ - reg: base address and length of the registers block for the DMAC
+
diff --git a/patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch b/patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch
new file mode 100644
index 0000000..26b299f
--- /dev/null
+++ b/patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch
@@ -0,0 +1,784 @@
+From c99fdb3f80589af8da49cbc090e6597ffca85c7c Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri, 14 Oct 2016 13:18:18 +0100
+Subject: [PATCH 041/299] drm: Add reference counting to drm_atomic_state
+
+drm_atomic_state has a complicated single owner model that tracks the
+single reference from allocation through to destruction on another
+thread - or perhaps on a local error path. We can simplify this tracking
+by using reference counting (at a cost of a few more atomics). This is
+even more beneficial when the lifetime of the state becomes more
+convoluted than being passed to a single worker thread for the commit.
+
+v2: Double check !intel atomic_commit functions for missing gets
+v3: Update kerneldocs
+
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
+Cc: dri-devel@lists.freedesktop.org
+Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
+Reviewed-by: Sean Paul <seanpaul@chromium.org>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Link: http://patchwork.freedesktop.org/patch/msgid/20161014121833.439-27-chris@chris-wilson.co.uk
+(cherry picked from commit 0853695c3ba46f97dfc0b5885f7b7e640ca212dd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 3
+ drivers/gpu/drm/drm_atomic.c | 25 ++----
+ drivers/gpu/drm/drm_atomic_helper.c | 98 ++++++---------------------
+ drivers/gpu/drm/drm_fb_helper.c | 9 --
+ drivers/gpu/drm/exynos/exynos_drm_drv.c | 3
+ drivers/gpu/drm/i915/i915_debugfs.c | 5 -
+ drivers/gpu/drm/i915/intel_display.c | 31 ++++----
+ drivers/gpu/drm/i915/intel_sprite.c | 4 -
+ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 3
+ drivers/gpu/drm/msm/msm_atomic.c | 3
+ drivers/gpu/drm/omapdrm/omap_drv.c | 3
+ drivers/gpu/drm/rcar-du/rcar_du_kms.c | 3
+ drivers/gpu/drm/sti/sti_drv.c | 3
+ drivers/gpu/drm/tegra/drm.c | 3
+ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2
+ drivers/gpu/drm/vc4/vc4_kms.c | 3
+ include/drm/drm_atomic.h | 31 ++++++++
+ include/drm/drm_plane.h | 1
+ 18 files changed, 102 insertions(+), 131 deletions(-)
+
+--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
++++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+@@ -464,7 +464,7 @@ atmel_hlcdc_dc_atomic_complete(struct at
+
+ drm_atomic_helper_cleanup_planes(dev, old_state);
+
+- drm_atomic_state_free(old_state);
++ drm_atomic_state_put(old_state);
+
+ /* Complete the commit, wake up any waiter. */
+ spin_lock(&dc->commit.wait.lock);
+@@ -521,6 +521,7 @@ static int atmel_hlcdc_dc_atomic_commit(
+ /* Swap the state, this is the point of no return. */
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (async)
+ queue_work(dc->wq, &commit->work);
+ else
+--- a/drivers/gpu/drm/drm_atomic.c
++++ b/drivers/gpu/drm/drm_atomic.c
+@@ -74,6 +74,8 @@ EXPORT_SYMBOL(drm_atomic_state_default_r
+ int
+ drm_atomic_state_init(struct drm_device *dev, struct drm_atomic_state *state)
+ {
++ kref_init(&state->ref);
++
+ /* TODO legacy paths should maybe do a better job about
+ * setting this appropriately?
+ */
+@@ -215,22 +217,16 @@ void drm_atomic_state_clear(struct drm_a
+ EXPORT_SYMBOL(drm_atomic_state_clear);
+
+ /**
+- * drm_atomic_state_free - free all memory for an atomic state
+- * @state: atomic state to deallocate
++ * __drm_atomic_state_free - free all memory for an atomic state
++ * @ref: This atomic state to deallocate
+ *
+ * This frees all memory associated with an atomic state, including all the
+ * per-object state for planes, crtcs and connectors.
+ */
+-void drm_atomic_state_free(struct drm_atomic_state *state)
++void __drm_atomic_state_free(struct kref *ref)
+ {
+- struct drm_device *dev;
+- struct drm_mode_config *config;
+-
+- if (!state)
+- return;
+-
+- dev = state->dev;
+- config = &dev->mode_config;
++ struct drm_atomic_state *state = container_of(ref, typeof(*state), ref);
++ struct drm_mode_config *config = &state->dev->mode_config;
+
+ drm_atomic_state_clear(state);
+
+@@ -243,7 +239,7 @@ void drm_atomic_state_free(struct drm_at
+ kfree(state);
+ }
+ }
+-EXPORT_SYMBOL(drm_atomic_state_free);
++EXPORT_SYMBOL(__drm_atomic_state_free);
+
+ /**
+ * drm_atomic_get_crtc_state - get crtc state
+@@ -1745,7 +1741,7 @@ retry:
+ if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) {
+ /*
+ * Unlike commit, check_only does not clean up state.
+- * Below we call drm_atomic_state_free for it.
++ * Below we call drm_atomic_state_put for it.
+ */
+ ret = drm_atomic_check_only(state);
+ } else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) {
+@@ -1778,8 +1774,7 @@ out:
+ goto retry;
+ }
+
+- if (ret || arg->flags & DRM_MODE_ATOMIC_TEST_ONLY)
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ drm_modeset_drop_locks(&ctx);
+ drm_modeset_acquire_fini(&ctx);
+--- a/drivers/gpu/drm/drm_atomic_helper.c
++++ b/drivers/gpu/drm/drm_atomic_helper.c
+@@ -1203,7 +1203,7 @@ static void commit_tail(struct drm_atomi
+
+ drm_atomic_helper_commit_cleanup_done(state);
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ }
+
+ static void commit_work(struct work_struct *work)
+@@ -1287,6 +1287,7 @@ int drm_atomic_helper_commit(struct drm_
+ * make sure work items don't artifically stall on each another.
+ */
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ queue_work(system_unbound_wq, &state->commit_work);
+ else
+@@ -1599,7 +1600,7 @@ EXPORT_SYMBOL(drm_atomic_helper_commit_h
+ *
+ * This signals completion of the atomic update @state, including any cleanup
+ * work. If used, it must be called right before calling
+- * drm_atomic_state_free().
++ * drm_atomic_state_put().
+ *
+ * This is part of the atomic helper support for nonblocking commits, see
+ * drm_atomic_helper_setup_commit() for an overview.
+@@ -2122,18 +2123,13 @@ retry:
+ state->legacy_cursor_update = true;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2195,18 +2191,13 @@ retry:
+ goto fail;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2335,18 +2326,13 @@ retry:
+ goto fail;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2488,11 +2474,8 @@ int drm_atomic_helper_disable_all(struct
+ }
+
+ err = drm_atomic_commit(state);
+-
+ free:
+- if (err < 0)
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return err;
+ }
+ EXPORT_SYMBOL(drm_atomic_helper_disable_all);
+@@ -2543,7 +2526,7 @@ retry:
+
+ err = drm_atomic_helper_disable_all(dev, &ctx);
+ if (err < 0) {
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ state = ERR_PTR(err);
+ goto unlock;
+ }
+@@ -2632,18 +2615,13 @@ retry:
+ goto fail;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2692,18 +2670,13 @@ retry:
+ goto fail;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2752,18 +2725,13 @@ retry:
+ goto fail;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2836,18 +2804,13 @@ retry:
+ }
+
+ ret = drm_atomic_nonblocking_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -2923,19 +2886,14 @@ retry:
+ crtc_state->active = active;
+
+ ret = drm_atomic_commit(state);
+- if (ret != 0)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+ connector->dpms = old_mode;
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+@@ -3344,7 +3302,7 @@ drm_atomic_helper_duplicate_state(struct
+
+ free:
+ if (err < 0) {
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ state = ERR_PTR(err);
+ }
+
+@@ -3459,22 +3417,14 @@ retry:
+ goto fail;
+
+ ret = drm_atomic_commit(state);
+- if (ret)
+- goto fail;
+-
+- /* Driver takes ownership of state on successful commit. */
+-
+- drm_property_unreference_blob(blob);
+-
+- return 0;
+ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ drm_property_unreference_blob(blob);
+-
+ return ret;
++
+ backoff:
+ drm_atomic_state_clear(state);
+ drm_atomic_legacy_backoff(state);
+--- a/drivers/gpu/drm/drm_fb_helper.c
++++ b/drivers/gpu/drm/drm_fb_helper.c
+@@ -372,9 +372,7 @@ fail:
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- if (ret != 0)
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
+
+ backoff:
+@@ -1391,16 +1389,13 @@ retry:
+ info->var.xoffset = var->xoffset;
+ info->var.yoffset = var->yoffset;
+
+-
+ fail:
+ drm_atomic_clean_old_fb(dev, plane_mask, ret);
+
+ if (ret == -EDEADLK)
+ goto backoff;
+
+- if (ret != 0)
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ return ret;
+
+ backoff:
+--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
++++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
+@@ -69,7 +69,7 @@ static void exynos_atomic_commit_complet
+
+ drm_atomic_helper_cleanup_planes(dev, state);
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ spin_lock(&priv->lock);
+ priv->pending &= ~commit->crtcs;
+@@ -254,6 +254,7 @@ int exynos_atomic_commit(struct drm_devi
+
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ schedule_work(&commit->work);
+ else
+--- a/drivers/gpu/drm/i915/i915_debugfs.c
++++ b/drivers/gpu/drm/i915/i915_debugfs.c
+@@ -3941,10 +3941,9 @@ static void hsw_trans_edp_pipe_A_crc_wa(
+
+ ret = drm_atomic_commit(state);
+ out:
+- drm_modeset_unlock_all(dev);
+ WARN(ret, "Toggling workaround to %i returns %i\n", enable, ret);
+- if (ret)
+- drm_atomic_state_free(state);
++ drm_modeset_unlock_all(dev);
++ drm_atomic_state_put(state);
+ }
+
+ static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -3592,7 +3592,7 @@ void intel_prepare_reset(struct drm_i915
+ return;
+
+ err:
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ }
+
+ void intel_finish_reset(struct drm_i915_private *dev_priv)
+@@ -3654,6 +3654,8 @@ void intel_finish_reset(struct drm_i915_
+ intel_hpd_init(dev_priv);
+ }
+
++ if (state)
++ drm_atomic_state_put(state);
+ drm_modeset_drop_locks(ctx);
+ drm_modeset_acquire_fini(ctx);
+ mutex_unlock(&dev->mode_config.mutex);
+@@ -6878,7 +6880,7 @@ static void intel_crtc_disable_noatomic(
+
+ dev_priv->display.crtc_disable(crtc_state, state);
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ DRM_DEBUG_KMS("[CRTC:%d:%s] hw state adjusted, was enabled, now disabled\n",
+ crtc->base.id, crtc->name);
+@@ -11286,8 +11288,8 @@ found:
+ return true;
+
+ fail:
+- drm_atomic_state_free(state);
+- drm_atomic_state_free(restore_state);
++ drm_atomic_state_put(state);
++ drm_atomic_state_put(restore_state);
+ restore_state = state = NULL;
+
+ if (ret == -EDEADLK) {
+@@ -11316,10 +11318,9 @@ void intel_release_load_detect_pipe(stru
+ return;
+
+ ret = drm_atomic_commit(state);
+- if (ret) {
++ if (ret)
+ DRM_DEBUG_KMS("Couldn't release load detect pipe: %i\n", ret);
+- drm_atomic_state_free(state);
+- }
++ drm_atomic_state_put(state);
+ }
+
+ static int i9xx_pll_refclk(struct drm_device *dev,
+@@ -12388,8 +12389,7 @@ retry:
+ goto retry;
+ }
+
+- if (ret)
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ if (ret == 0 && event) {
+ spin_lock_irq(&dev->event_lock);
+@@ -14485,7 +14485,7 @@ static void intel_atomic_commit_tail(str
+
+ drm_atomic_helper_commit_cleanup_done(state);
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ /* As one of the primary mmio accessors, KMS has a high likelihood
+ * of triggering bugs in unclaimed access. After we finish
+@@ -14568,6 +14568,7 @@ static int intel_atomic_commit(struct dr
+ intel_shared_dpll_commit(state);
+ intel_atomic_track_fbs(state);
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ queue_work(system_unbound_wq, &state->commit_work);
+ else
+@@ -14609,9 +14610,8 @@ retry:
+ goto retry;
+ }
+
+- if (ret)
+ out:
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ }
+
+ /*
+@@ -16353,8 +16353,8 @@ retry:
+ dev_priv->display.optimize_watermarks(cs);
+ }
+
+- drm_atomic_state_free(state);
+ fail:
++ drm_atomic_state_put(state);
+ drm_modeset_drop_locks(&ctx);
+ drm_modeset_acquire_fini(&ctx);
+ }
+@@ -16992,10 +16992,9 @@ void intel_display_resume(struct drm_dev
+ drm_modeset_acquire_fini(&ctx);
+ mutex_unlock(&dev->mode_config.mutex);
+
+- if (ret) {
++ if (ret)
+ DRM_ERROR("Restoring old state failed with %i\n", ret);
+- drm_atomic_state_free(state);
+- }
++ drm_atomic_state_put(state);
+ }
+
+ void intel_modeset_gem_init(struct drm_device *dev)
+--- a/drivers/gpu/drm/i915/intel_sprite.c
++++ b/drivers/gpu/drm/i915/intel_sprite.c
+@@ -1008,9 +1008,7 @@ int intel_sprite_set_colorkey(struct drm
+ drm_modeset_backoff(&ctx);
+ }
+
+- if (ret)
+- drm_atomic_state_free(state);
+-
++ drm_atomic_state_put(state);
+ out:
+ drm_modeset_drop_locks(&ctx);
+ drm_modeset_acquire_fini(&ctx);
+--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
++++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+@@ -83,7 +83,7 @@ static void mtk_atomic_complete(struct m
+ drm_atomic_helper_wait_for_vblanks(drm, state);
+
+ drm_atomic_helper_cleanup_planes(drm, state);
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ }
+
+ static void mtk_atomic_work(struct work_struct *work)
+@@ -110,6 +110,7 @@ static int mtk_atomic_commit(struct drm_
+
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (async)
+ mtk_atomic_schedule(private, state);
+ else
+--- a/drivers/gpu/drm/msm/msm_atomic.c
++++ b/drivers/gpu/drm/msm/msm_atomic.c
+@@ -141,7 +141,7 @@ static void complete_commit(struct msm_c
+
+ kms->funcs->complete_commit(kms, state);
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ commit_destroy(c);
+ }
+@@ -256,6 +256,7 @@ int msm_atomic_commit(struct drm_device
+ * current layout.
+ */
+
++ drm_atomic_state_get(state);
+ if (nonblock) {
+ queue_work(priv->atomic_wq, &c->work);
+ return 0;
+--- a/drivers/gpu/drm/omapdrm/omap_drv.c
++++ b/drivers/gpu/drm/omapdrm/omap_drv.c
+@@ -105,7 +105,7 @@ static void omap_atomic_complete(struct
+
+ dispc_runtime_put();
+
+- drm_atomic_state_free(old_state);
++ drm_atomic_state_put(old_state);
+
+ /* Complete the commit, wake up any waiter. */
+ spin_lock(&priv->commit.lock);
+@@ -176,6 +176,7 @@ static int omap_atomic_commit(struct drm
+ /* Swap the state, this is the point of no return. */
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ schedule_work(&commit->work);
+ else
+--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+@@ -272,7 +272,7 @@ static void rcar_du_atomic_complete(stru
+
+ drm_atomic_helper_cleanup_planes(dev, old_state);
+
+- drm_atomic_state_free(old_state);
++ drm_atomic_state_put(old_state);
+
+ /* Complete the commit, wake up any waiter. */
+ spin_lock(&rcdu->commit.wait.lock);
+@@ -338,6 +338,7 @@ static int rcar_du_atomic_commit(struct
+ /* Swap the state, this is the point of no return. */
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ schedule_work(&commit->work);
+ else
+--- a/drivers/gpu/drm/sti/sti_drv.c
++++ b/drivers/gpu/drm/sti/sti_drv.c
+@@ -184,7 +184,7 @@ static void sti_atomic_complete(struct s
+ drm_atomic_helper_wait_for_vblanks(drm, state);
+
+ drm_atomic_helper_cleanup_planes(drm, state);
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ }
+
+ static void sti_atomic_work(struct work_struct *work)
+@@ -237,6 +237,7 @@ static int sti_atomic_commit(struct drm_
+
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ sti_atomic_schedule(private, state);
+ else
+--- a/drivers/gpu/drm/tegra/drm.c
++++ b/drivers/gpu/drm/tegra/drm.c
+@@ -63,7 +63,7 @@ static void tegra_atomic_complete(struct
+ drm_atomic_helper_wait_for_vblanks(drm, state);
+
+ drm_atomic_helper_cleanup_planes(drm, state);
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+ }
+
+ static void tegra_atomic_work(struct work_struct *work)
+@@ -96,6 +96,7 @@ static int tegra_atomic_commit(struct dr
+
+ drm_atomic_helper_swap_state(state, true);
+
++ drm_atomic_state_get(state);
+ if (nonblock)
+ tegra_atomic_schedule(tegra, state);
+ else
+--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
++++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+@@ -143,8 +143,6 @@ static int tilcdc_commit(struct drm_devi
+
+ drm_atomic_helper_cleanup_planes(dev, state);
+
+- drm_atomic_state_free(state);
+-
+ return 0;
+ }
+
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -61,7 +61,7 @@ vc4_atomic_complete_commit(struct vc4_co
+
+ drm_atomic_helper_cleanup_planes(dev, state);
+
+- drm_atomic_state_free(state);
++ drm_atomic_state_put(state);
+
+ up(&vc4->async_modeset);
+
+@@ -190,6 +190,7 @@ static int vc4_atomic_commit(struct drm_
+ * current layout.
+ */
+
++ drm_atomic_state_get(state);
+ if (nonblock) {
+ vc4_queue_seqno_cb(dev, &c->cb, wait_seqno,
+ vc4_atomic_complete_commit_seqno_cb);
+--- a/include/drm/drm_atomic.h
++++ b/include/drm/drm_atomic.h
+@@ -153,6 +153,7 @@ struct __drm_connnectors_state {
+
+ /**
+ * struct drm_atomic_state - the global state object for atomic updates
++ * @ref: count of all references to this state (will not be freed until zero)
+ * @dev: parent DRM device
+ * @allow_modeset: allow full modeset
+ * @legacy_cursor_update: hint to enforce legacy cursor IOCTL semantics
+@@ -164,6 +165,8 @@ struct __drm_connnectors_state {
+ * @acquire_ctx: acquire context for this atomic modeset state update
+ */
+ struct drm_atomic_state {
++ struct kref ref;
++
+ struct drm_device *dev;
+ bool allow_modeset : 1;
+ bool legacy_cursor_update : 1;
+@@ -193,7 +196,33 @@ static inline void drm_crtc_commit_get(s
+ struct drm_atomic_state * __must_check
+ drm_atomic_state_alloc(struct drm_device *dev);
+ void drm_atomic_state_clear(struct drm_atomic_state *state);
+-void drm_atomic_state_free(struct drm_atomic_state *state);
++
++/**
++ * drm_atomic_state_get - acquire a reference to the atomic state
++ * @state: The atomic state
++ *
++ * Returns a new reference to the @state
++ */
++static inline struct drm_atomic_state *
++drm_atomic_state_get(struct drm_atomic_state *state)
++{
++ kref_get(&state->ref);
++ return state;
++}
++
++void __drm_atomic_state_free(struct kref *ref);
++
++/**
++ * drm_atomic_state_put - release a reference to the atomic state
++ * @state: The atomic state
++ *
++ * This releases a reference to @state which is freed after removing the
++ * final reference. No locking required and callable from any context.
++ */
++static inline void drm_atomic_state_put(struct drm_atomic_state *state)
++{
++ kref_put(&state->ref, __drm_atomic_state_free);
++}
+
+ int __must_check
+ drm_atomic_state_init(struct drm_device *dev, struct drm_atomic_state *state);
+--- a/include/drm/drm_plane.h
++++ b/include/drm/drm_plane.h
+@@ -94,7 +94,6 @@ struct drm_plane_state {
+ struct drm_atomic_state *state;
+ };
+
+-
+ /**
+ * struct drm_plane_funcs - driver plane control functions
+ */
diff --git a/patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch b/patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch
new file mode 100644
index 0000000..8d9a2c9
--- /dev/null
+++ b/patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch
@@ -0,0 +1,493 @@
+From 56b4ddd5628410f12b3d81858319b44cc31248b0 Mon Sep 17 00:00:00 2001
+From: Jani Nikula <jani.nikula@intel.com>
+Date: Tue, 1 Nov 2016 17:40:44 +0200
+Subject: [PATCH 042/299] drm: define drm_compat_ioctl NULL on CONFIG_COMPAT=n
+ and reduce #ifdefs
+
+If we define drm_compat_ioctl NULL on CONFIG_COMPAT=n, we don't have to
+check for the config everywhere.
+
+Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Sean Paul <seanpaul@chromium.org>
+Link: http://patchwork.freedesktop.org/patch/msgid/1478014844-27454-1-git-send-email-jani.nikula@intel.com
+(cherry picked from commit 55edf41b699bcb31dcf45082d99e91b7e217206e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/arc/arcpgu_drv.c | 2 --
+ drivers/gpu/drm/arm/hdlcd_drv.c | 2 --
+ drivers/gpu/drm/arm/malidp_drv.c | 2 --
+ drivers/gpu/drm/ast/ast_drv.c | 2 --
+ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 2 --
+ drivers/gpu/drm/bochs/bochs_drv.c | 2 --
+ drivers/gpu/drm/cirrus/cirrus_drv.c | 2 --
+ drivers/gpu/drm/drm_fops.c | 13 ++++++-------
+ drivers/gpu/drm/etnaviv/etnaviv_drv.c | 2 --
+ drivers/gpu/drm/exynos/exynos_drm_drv.c | 2 --
+ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 --
+ drivers/gpu/drm/gma500/psb_drv.c | 2 --
+ drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 2 --
+ drivers/gpu/drm/i810/i810_dma.c | 2 --
+ drivers/gpu/drm/i810/i810_drv.c | 2 --
+ drivers/gpu/drm/i915/i915_drv.c | 2 --
+ drivers/gpu/drm/i915/i915_drv.h | 2 ++
+ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 --
+ drivers/gpu/drm/mgag200/mgag200_drv.c | 2 --
+ drivers/gpu/drm/msm/msm_drv.c | 2 --
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 --
+ drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 --
+ drivers/gpu/drm/savage/savage_drv.c | 2 --
+ drivers/gpu/drm/shmobile/shmob_drm_drv.c | 2 --
+ drivers/gpu/drm/sis/sis_drv.c | 2 --
+ drivers/gpu/drm/sti/sti_drv.c | 2 --
+ drivers/gpu/drm/sun4i/sun4i_drv.c | 2 --
+ drivers/gpu/drm/tdfx/tdfx_drv.c | 2 --
+ drivers/gpu/drm/tegra/drm.c | 2 --
+ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 --
+ drivers/gpu/drm/udl/udl_drv.c | 2 --
+ drivers/gpu/drm/vc4/vc4_drv.c | 2 --
+ drivers/gpu/drm/via/via_drv.c | 2 --
+ drivers/gpu/drm/virtio/virtgpu_drv.c | 2 --
+ include/drm/drmP.h | 5 +++++
+ 35 files changed, 13 insertions(+), 71 deletions(-)
+
+--- a/drivers/gpu/drm/arc/arcpgu_drv.c
++++ b/drivers/gpu/drm/arc/arcpgu_drv.c
+@@ -65,9 +65,7 @@ static const struct file_operations arcp
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/arm/hdlcd_drv.c
++++ b/drivers/gpu/drm/arm/hdlcd_drv.c
+@@ -268,9 +268,7 @@ static const struct file_operations fops
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = noop_llseek,
+--- a/drivers/gpu/drm/arm/malidp_drv.c
++++ b/drivers/gpu/drm/arm/malidp_drv.c
+@@ -197,9 +197,7 @@ static const struct file_operations fops
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = noop_llseek,
+--- a/drivers/gpu/drm/ast/ast_drv.c
++++ b/drivers/gpu/drm/ast/ast_drv.c
+@@ -188,9 +188,7 @@ static const struct file_operations ast_
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = ast_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .read = drm_read,
+ };
+
+--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
++++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+@@ -749,9 +749,7 @@ static const struct file_operations fops
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/bochs/bochs_drv.c
++++ b/drivers/gpu/drm/bochs/bochs_drv.c
+@@ -70,9 +70,7 @@ static const struct file_operations boch
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/cirrus/cirrus_drv.c
++++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
+@@ -126,9 +126,7 @@ static const struct file_operations cirr
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = cirrus_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ };
+ static struct drm_driver driver = {
+ .driver_features = DRIVER_MODESET | DRIVER_GEM,
+--- a/drivers/gpu/drm/drm_fops.c
++++ b/drivers/gpu/drm/drm_fops.c
+@@ -51,10 +51,11 @@ DEFINE_MUTEX(drm_global_mutex);
+ * Drivers must define the file operations structure that forms the DRM
+ * userspace API entry point, even though most of those operations are
+ * implemented in the DRM core. The mandatory functions are drm_open(),
+- * drm_read(), drm_ioctl() and drm_compat_ioctl if CONFIG_COMPAT is enabled.
+- * Drivers which implement private ioctls that require 32/64 bit compatibility
+- * support must provided their onw .compat_ioctl() handler that processes
+- * private ioctls and calls drm_compat_ioctl() for core ioctls.
++ * drm_read(), drm_ioctl() and drm_compat_ioctl() if CONFIG_COMPAT is enabled
++ * (note that drm_compat_ioctl will be NULL if CONFIG_COMPAT=n). Drivers which
++ * implement private ioctls that require 32/64 bit compatibility support must
++ * provide their own .compat_ioctl() handler that processes private ioctls and
++ * calls drm_compat_ioctl() for core ioctls.
+ *
+ * In addition drm_read() and drm_poll() provide support for DRM events. DRM
+ * events are a generic and extensible means to send asynchronous events to
+@@ -75,9 +76,7 @@ DEFINE_MUTEX(drm_global_mutex);
+ * .open = drm_open,
+ * .release = drm_release,
+ * .unlocked_ioctl = drm_ioctl,
+- * #ifdef CONFIG_COMPAT
+- * .compat_ioctl = drm_compat_ioctl,
+- * #endif
++ * .compat_ioctl = drm_compat_ioctl, // NULL if CONFIG_COMPAT=n
+ * .poll = drm_poll,
+ * .read = drm_read,
+ * .llseek = no_llseek,
+--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
++++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+@@ -478,9 +478,7 @@ static const struct file_operations fops
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
++++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
+@@ -366,9 +366,7 @@ static const struct file_operations exyn
+ .poll = drm_poll,
+ .read = drm_read,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .release = drm_release,
+ };
+
+--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
++++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+@@ -176,9 +176,7 @@ static const struct file_operations fsl_
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/gma500/psb_drv.c
++++ b/drivers/gpu/drm/gma500/psb_drv.c
+@@ -473,9 +473,7 @@ static const struct file_operations psb_
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = psb_unlocked_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .mmap = drm_gem_mmap,
+ .poll = drm_poll,
+ .read = drm_read,
+--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
++++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
+@@ -151,9 +151,7 @@ static const struct file_operations kiri
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/i810/i810_dma.c
++++ b/drivers/gpu/drm/i810/i810_dma.c
+@@ -113,9 +113,7 @@ static const struct file_operations i810
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = i810_mmap_buffers,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/i810/i810_drv.c
++++ b/drivers/gpu/drm/i810/i810_drv.c
+@@ -49,9 +49,7 @@ static const struct file_operations i810
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = drm_legacy_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -2500,9 +2500,7 @@ static const struct file_operations i915
+ .mmap = drm_gem_mmap,
+ .poll = drm_poll,
+ .read = drm_read,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = i915_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -2880,6 +2880,8 @@ __i915_printk(struct drm_i915_private *d
+ #ifdef CONFIG_COMPAT
+ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
+ unsigned long arg);
++#else
++#define i915_compat_ioctl NULL
+ #endif
+ extern const struct dev_pm_ops i915_pm_ops;
+
+--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
++++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+@@ -248,9 +248,7 @@ static const struct file_operations mtk_
+ .mmap = mtk_drm_gem_mmap,
+ .poll = drm_poll,
+ .read = drm_read,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ };
+
+ static struct drm_driver mtk_drm_driver = {
+--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
++++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
+@@ -82,9 +82,7 @@ static const struct file_operations mgag
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = mgag200_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .read = drm_read,
+ };
+
+--- a/drivers/gpu/drm/msm/msm_drv.c
++++ b/drivers/gpu/drm/msm/msm_drv.c
+@@ -766,9 +766,7 @@ static const struct file_operations fops
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -201,9 +201,7 @@ static const struct file_operations rcar
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
++++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+@@ -274,9 +274,7 @@ static const struct file_operations rock
+ .poll = drm_poll,
+ .read = drm_read,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .release = drm_release,
+ };
+
+--- a/drivers/gpu/drm/savage/savage_drv.c
++++ b/drivers/gpu/drm/savage/savage_drv.c
+@@ -42,9 +42,7 @@ static const struct file_operations sava
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = drm_legacy_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
++++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
+@@ -245,9 +245,7 @@ static const struct file_operations shmo
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/sis/sis_drv.c
++++ b/drivers/gpu/drm/sis/sis_drv.c
+@@ -72,9 +72,7 @@ static const struct file_operations sis_
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = drm_legacy_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/sti/sti_drv.c
++++ b/drivers/gpu/drm/sti/sti_drv.c
+@@ -296,9 +296,7 @@ static const struct file_operations sti_
+ .poll = drm_poll,
+ .read = drm_read,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .release = drm_release,
+ };
+
+--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
++++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
+@@ -52,9 +52,7 @@ static const struct file_operations sun4
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/tdfx/tdfx_drv.c
++++ b/drivers/gpu/drm/tdfx/tdfx_drv.c
+@@ -49,9 +49,7 @@ static const struct file_operations tdfx
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = drm_legacy_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/tegra/drm.c
++++ b/drivers/gpu/drm/tegra/drm.c
+@@ -802,9 +802,7 @@ static const struct file_operations tegr
+ .mmap = tegra_drm_mmap,
+ .poll = drm_poll,
+ .read = drm_read,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
++++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+@@ -573,9 +573,7 @@ static const struct file_operations fops
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+--- a/drivers/gpu/drm/udl/udl_drv.c
++++ b/drivers/gpu/drm/udl/udl_drv.c
+@@ -44,9 +44,7 @@ static const struct file_operations udl_
+ .read = drm_read,
+ .unlocked_ioctl = drm_ioctl,
+ .release = drm_release,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -106,9 +106,7 @@ static const struct file_operations vc4_
+ .mmap = vc4_mmap,
+ .poll = drm_poll,
+ .read = drm_read,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/via/via_drv.c
++++ b/drivers/gpu/drm/via/via_drv.c
+@@ -64,9 +64,7 @@ static const struct file_operations via_
+ .unlocked_ioctl = drm_ioctl,
+ .mmap = drm_legacy_mmap,
+ .poll = drm_poll,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/drivers/gpu/drm/virtio/virtgpu_drv.c
++++ b/drivers/gpu/drm/virtio/virtgpu_drv.c
+@@ -108,9 +108,7 @@ static const struct file_operations virt
+ .read = drm_read,
+ .unlocked_ioctl = drm_ioctl,
+ .release = drm_release,
+-#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+-#endif
+ .llseek = noop_llseek,
+ };
+
+--- a/include/drm/drmP.h
++++ b/include/drm/drmP.h
+@@ -943,8 +943,13 @@ static inline bool drm_is_primary_client
+ extern int drm_ioctl_permit(u32 flags, struct drm_file *file_priv);
+ extern long drm_ioctl(struct file *filp,
+ unsigned int cmd, unsigned long arg);
++#ifdef CONFIG_COMPAT
+ extern long drm_compat_ioctl(struct file *filp,
+ unsigned int cmd, unsigned long arg);
++#else
++/* Let drm_compat_ioctl be assigned to .compat_ioctl unconditionally */
++#define drm_compat_ioctl NULL
++#endif
+ extern bool drm_ioctl_flags(unsigned int nr, unsigned int *flags);
+
+ /* File Operations (drm_fops.c) */
diff --git a/patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch b/patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch
new file mode 100644
index 0000000..ec54043
--- /dev/null
+++ b/patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch
@@ -0,0 +1,631 @@
+From c2d0c49598a6954c4e7f1fd2f27da02f5b01212c Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 29 Nov 2016 22:56:30 +0200
+Subject: [PATCH 043/299] drm: Make the connector .detect() callback optional
+
+Many drivers (21 to be exact) create connectors that are always
+connected (for instance to an LVDS or DSI panel). Instead of forcing
+them to implement a dummy .detect() handler, make the callback optional
+and consider the connector as always connected in that case.
+
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+Acked-by: Jyri Sarha <jsarha@ti.com>
+Acked-by: Jani Nikula <jani.nikula@intel.com>
+Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
+Acked-by: Vincent Abriou <vincent.abriou@st.com>
+Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+[seanpaul fixed small conflict in rcar-du/rcar_du_lvdscon.c]
+Signed-off-by: Sean Paul <seanpaul@chromium.org>
+
+(cherry picked from commit 949f08862d662f17b9d2929c6afb2d4e8f5d50cb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/arc/arcpgu_sim.c | 7 -------
+ drivers/gpu/drm/ast/ast_mode.c | 7 -------
+ drivers/gpu/drm/bochs/bochs_kms.c | 7 -------
+ drivers/gpu/drm/bridge/nxp-ptn3460.c | 7 -------
+ drivers/gpu/drm/bridge/parade-ps8622.c | 7 -------
+ drivers/gpu/drm/bridge/tc358767.c | 7 -------
+ drivers/gpu/drm/cirrus/cirrus_mode.c | 7 -------
+ drivers/gpu/drm/drm_probe_helper.c | 14 +++++++++++---
+ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 7 -------
+ drivers/gpu/drm/gma500/cdv_intel_lvds.c | 14 --------------
+ drivers/gpu/drm/gma500/psb_intel_lvds.c | 14 --------------
+ drivers/gpu/drm/i915/intel_dsi.c | 7 -------
+ drivers/gpu/drm/imx/imx-ldb.c | 7 -------
+ drivers/gpu/drm/imx/imx-tve.c | 7 -------
+ drivers/gpu/drm/imx/parallel-display.c | 7 -------
+ drivers/gpu/drm/mediatek/mtk_dsi.c | 7 -------
+ drivers/gpu/drm/mgag200/mgag200_mode.c | 7 -------
+ drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c | 7 -------
+ drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 7 -------
+ drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 7 -------
+ drivers/gpu/drm/sti/sti_hda.c | 7 -------
+ drivers/gpu/drm/sun4i/sun4i_rgb.c | 7 -------
+ drivers/gpu/drm/sun4i/sun4i_tv.c | 7 -------
+ drivers/gpu/drm/tilcdc/tilcdc_panel.c | 8 --------
+ include/drm/drm_connector.h | 3 +++
+ 25 files changed, 14 insertions(+), 179 deletions(-)
+
+--- a/drivers/gpu/drm/arc/arcpgu_sim.c
++++ b/drivers/gpu/drm/arc/arcpgu_sim.c
+@@ -41,12 +41,6 @@ static int arcpgu_drm_connector_get_mode
+ return count;
+ }
+
+-static enum drm_connector_status
+-arcpgu_drm_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void arcpgu_drm_connector_destroy(struct drm_connector *connector)
+ {
+ drm_connector_unregister(connector);
+@@ -61,7 +55,6 @@ arcpgu_drm_connector_helper_funcs = {
+ static const struct drm_connector_funcs arcpgu_drm_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+ .reset = drm_atomic_helper_connector_reset,
+- .detect = arcpgu_drm_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = arcpgu_drm_connector_destroy,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/ast/ast_mode.c
++++ b/drivers/gpu/drm/ast/ast_mode.c
+@@ -839,12 +839,6 @@ static void ast_connector_destroy(struct
+ kfree(connector);
+ }
+
+-static enum drm_connector_status
+-ast_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
+ .mode_valid = ast_mode_valid,
+ .get_modes = ast_get_modes,
+@@ -853,7 +847,6 @@ static const struct drm_connector_helper
+
+ static const struct drm_connector_funcs ast_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = ast_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = ast_connector_destroy,
+ };
+--- a/drivers/gpu/drm/bochs/bochs_kms.c
++++ b/drivers/gpu/drm/bochs/bochs_kms.c
+@@ -216,12 +216,6 @@ bochs_connector_best_encoder(struct drm_
+ return NULL;
+ }
+
+-static enum drm_connector_status bochs_connector_detect(struct drm_connector
+- *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_helper_funcs bochs_connector_connector_helper_funcs = {
+ .get_modes = bochs_connector_get_modes,
+ .mode_valid = bochs_connector_mode_valid,
+@@ -230,7 +224,6 @@ static const struct drm_connector_helper
+
+ static const struct drm_connector_funcs bochs_connector_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = bochs_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = drm_connector_cleanup,
+ };
+--- a/drivers/gpu/drm/bridge/nxp-ptn3460.c
++++ b/drivers/gpu/drm/bridge/nxp-ptn3460.c
+@@ -239,16 +239,9 @@ static const struct drm_connector_helper
+ .get_modes = ptn3460_get_modes,
+ };
+
+-static enum drm_connector_status ptn3460_detect(struct drm_connector *connector,
+- bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_funcs ptn3460_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = ptn3460_detect,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/bridge/parade-ps8622.c
++++ b/drivers/gpu/drm/bridge/parade-ps8622.c
+@@ -477,16 +477,9 @@ static const struct drm_connector_helper
+ .get_modes = ps8622_get_modes,
+ };
+
+-static enum drm_connector_status ps8622_detect(struct drm_connector *connector,
+- bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_funcs ps8622_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = ps8622_detect,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/bridge/tc358767.c
++++ b/drivers/gpu/drm/bridge/tc358767.c
+@@ -1038,12 +1038,6 @@ err:
+ return ret;
+ }
+
+-static enum drm_connector_status
+-tc_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void tc_bridge_pre_enable(struct drm_bridge *bridge)
+ {
+ struct tc_data *tc = bridge_to_tc(bridge);
+@@ -1168,7 +1162,6 @@ static const struct drm_connector_helper
+ static const struct drm_connector_funcs tc_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = tc_connector_detect,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
++++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
+@@ -498,12 +498,6 @@ static struct drm_encoder *cirrus_connec
+ return NULL;
+ }
+
+-static enum drm_connector_status cirrus_vga_detect(struct drm_connector
+- *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void cirrus_connector_destroy(struct drm_connector *connector)
+ {
+ drm_connector_cleanup(connector);
+@@ -517,7 +511,6 @@ static const struct drm_connector_helper
+
+ static const struct drm_connector_funcs cirrus_vga_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = cirrus_vga_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = cirrus_connector_destroy,
+ };
+--- a/drivers/gpu/drm/drm_probe_helper.c
++++ b/drivers/gpu/drm/drm_probe_helper.c
+@@ -162,6 +162,14 @@ void drm_kms_helper_poll_enable_locked(s
+ }
+ EXPORT_SYMBOL(drm_kms_helper_poll_enable_locked);
+
++static enum drm_connector_status
++drm_connector_detect(struct drm_connector *connector, bool force)
++{
++ return connector->funcs->detect ?
++ connector->funcs->detect(connector, force) :
++ connector_status_connected;
++}
++
+ /**
+ * drm_helper_probe_single_connector_modes - get complete set of display modes
+ * @connector: connector to probe
+@@ -249,7 +257,7 @@ int drm_helper_probe_single_connector_mo
+ if (connector->funcs->force)
+ connector->funcs->force(connector);
+ } else {
+- connector->status = connector->funcs->detect(connector, true);
++ connector->status = drm_connector_detect(connector, true);
+ }
+
+ /*
+@@ -415,7 +423,7 @@ static void output_poll_execute(struct w
+
+ repoll = true;
+
+- connector->status = connector->funcs->detect(connector, false);
++ connector->status = drm_connector_detect(connector, false);
+ if (old_status != connector->status) {
+ const char *old, *new;
+
+@@ -575,7 +583,7 @@ bool drm_helper_hpd_irq_event(struct drm
+
+ old_status = connector->status;
+
+- connector->status = connector->funcs->detect(connector, false);
++ connector->status = drm_connector_detect(connector, false);
+ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
+ connector->base.id,
+ connector->name,
+--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
++++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
+@@ -58,17 +58,10 @@ static void fsl_dcu_drm_connector_destro
+ drm_connector_cleanup(connector);
+ }
+
+-static enum drm_connector_status
+-fsl_dcu_drm_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_funcs fsl_dcu_drm_connector_funcs = {
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+ .destroy = fsl_dcu_drm_connector_destroy,
+- .detect = fsl_dcu_drm_connector_detect,
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .reset = drm_atomic_helper_connector_reset,
+--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
++++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+@@ -387,19 +387,6 @@ static void cdv_intel_lvds_mode_set(stru
+ }
+
+ /**
+- * Detect the LVDS connection.
+- *
+- * This always returns CONNECTOR_STATUS_CONNECTED.
+- * This connector should only have
+- * been set up if the LVDS was actually connected anyway.
+- */
+-static enum drm_connector_status cdv_intel_lvds_detect(
+- struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+-/**
+ * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
+ */
+ static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
+@@ -521,7 +508,6 @@ static const struct drm_connector_helper
+
+ static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = cdv_intel_lvds_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .set_property = cdv_intel_lvds_set_property,
+ .destroy = cdv_intel_lvds_destroy,
+--- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
++++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
+@@ -500,19 +500,6 @@ static void psb_intel_lvds_mode_set(stru
+ }
+
+ /*
+- * Detect the LVDS connection.
+- *
+- * This always returns CONNECTOR_STATUS_CONNECTED.
+- * This connector should only have
+- * been set up if the LVDS was actually connected anyway.
+- */
+-static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
+- *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+-/*
+ * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
+ */
+ static int psb_intel_lvds_get_modes(struct drm_connector *connector)
+@@ -643,7 +630,6 @@ const struct drm_connector_helper_funcs
+
+ const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = psb_intel_lvds_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .set_property = psb_intel_lvds_set_property,
+ .destroy = psb_intel_lvds_destroy,
+--- a/drivers/gpu/drm/i915/intel_dsi.c
++++ b/drivers/gpu/drm/i915/intel_dsi.c
+@@ -1299,12 +1299,6 @@ static void intel_dsi_prepare(struct int
+ }
+ }
+
+-static enum drm_connector_status
+-intel_dsi_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static int intel_dsi_get_modes(struct drm_connector *connector)
+ {
+ struct intel_connector *intel_connector = to_intel_connector(connector);
+@@ -1408,7 +1402,6 @@ static const struct drm_connector_helper
+
+ static const struct drm_connector_funcs intel_dsi_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+- .detect = intel_dsi_detect,
+ .late_register = intel_connector_register,
+ .early_unregister = intel_connector_unregister,
+ .destroy = intel_dsi_connector_destroy,
+--- a/drivers/gpu/drm/imx/imx-ldb.c
++++ b/drivers/gpu/drm/imx/imx-ldb.c
+@@ -101,12 +101,6 @@ struct imx_ldb {
+ const struct bus_mux *lvds_mux;
+ };
+
+-static enum drm_connector_status imx_ldb_connector_detect(
+- struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
+ u32 bus_format)
+ {
+@@ -409,7 +403,6 @@ static int imx_ldb_encoder_atomic_check(
+ static const struct drm_connector_funcs imx_ldb_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = imx_ldb_connector_detect,
+ .destroy = imx_drm_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/imx/imx-tve.c
++++ b/drivers/gpu/drm/imx/imx-tve.c
+@@ -229,12 +229,6 @@ static int tve_setup_vga(struct imx_tve
+ TVE_TVDAC_TEST_MODE_MASK, 1);
+ }
+
+-static enum drm_connector_status imx_tve_connector_detect(
+- struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static int imx_tve_connector_get_modes(struct drm_connector *connector)
+ {
+ struct imx_tve *tve = con_to_tve(connector);
+@@ -354,7 +348,6 @@ static int imx_tve_atomic_check(struct d
+ static const struct drm_connector_funcs imx_tve_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = imx_tve_connector_detect,
+ .destroy = imx_drm_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/imx/parallel-display.c
++++ b/drivers/gpu/drm/imx/parallel-display.c
+@@ -49,12 +49,6 @@ static inline struct imx_parallel_displa
+ return container_of(e, struct imx_parallel_display, encoder);
+ }
+
+-static enum drm_connector_status imx_pd_connector_detect(
+- struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static int imx_pd_connector_get_modes(struct drm_connector *connector)
+ {
+ struct imx_parallel_display *imxpd = con_to_imxpd(connector);
+@@ -143,7 +137,6 @@ static int imx_pd_encoder_atomic_check(s
+ static const struct drm_connector_funcs imx_pd_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = imx_pd_connector_detect,
+ .destroy = imx_drm_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
++++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
+@@ -594,12 +594,6 @@ static void mtk_dsi_encoder_enable(struc
+ mtk_output_dsi_enable(dsi);
+ }
+
+-static enum drm_connector_status mtk_dsi_connector_detect(
+- struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static int mtk_dsi_connector_get_modes(struct drm_connector *connector)
+ {
+ struct mtk_dsi *dsi = connector_to_dsi(connector);
+@@ -616,7 +610,6 @@ static const struct drm_encoder_helper_f
+
+ static const struct drm_connector_funcs mtk_dsi_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+- .detect = mtk_dsi_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
++++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
+@@ -1658,12 +1658,6 @@ static struct drm_encoder *mga_connector
+ return NULL;
+ }
+
+-static enum drm_connector_status mga_vga_detect(struct drm_connector
+- *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void mga_connector_destroy(struct drm_connector *connector)
+ {
+ struct mga_connector *mga_connector = to_mga_connector(connector);
+@@ -1680,7 +1674,6 @@ static const struct drm_connector_helper
+
+ static const struct drm_connector_funcs mga_vga_connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = mga_vga_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = mga_connector_destroy,
+ };
+--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
+@@ -61,16 +61,9 @@ static const struct drm_connector_helper
+ .get_modes = rcar_du_lvds_connector_get_modes,
+ };
+
+-static enum drm_connector_status
+-rcar_du_lvds_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_funcs connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .reset = drm_atomic_helper_connector_reset,
+- .detect = rcar_du_lvds_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = drm_connector_cleanup,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
++++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+@@ -969,12 +969,6 @@ static struct drm_connector_helper_funcs
+ .mode_valid = dw_mipi_dsi_mode_valid,
+ };
+
+-static enum drm_connector_status
+-dw_mipi_dsi_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void dw_mipi_dsi_drm_connector_destroy(struct drm_connector *connector)
+ {
+ drm_connector_unregister(connector);
+@@ -984,7 +978,6 @@ static void dw_mipi_dsi_drm_connector_de
+ static struct drm_connector_funcs dw_mipi_dsi_atomic_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = dw_mipi_dsi_detect,
+ .destroy = dw_mipi_dsi_drm_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
++++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
+@@ -669,15 +669,8 @@ static void shmob_drm_connector_destroy(
+ drm_connector_cleanup(connector);
+ }
+
+-static enum drm_connector_status
+-shmob_drm_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static const struct drm_connector_funcs connector_funcs = {
+ .dpms = drm_helper_connector_dpms,
+- .detect = shmob_drm_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = shmob_drm_connector_destroy,
+ };
+--- a/drivers/gpu/drm/sti/sti_hda.c
++++ b/drivers/gpu/drm/sti/sti_hda.c
+@@ -642,12 +642,6 @@ struct drm_connector_helper_funcs sti_hd
+ .mode_valid = sti_hda_connector_mode_valid,
+ };
+
+-static enum drm_connector_status
+-sti_hda_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static int sti_hda_late_register(struct drm_connector *connector)
+ {
+ struct sti_hda_connector *hda_connector
+@@ -665,7 +659,6 @@ static int sti_hda_late_register(struct
+ static const struct drm_connector_funcs sti_hda_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+- .detect = sti_hda_connector_detect,
+ .destroy = drm_connector_cleanup,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
++++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
+@@ -110,12 +110,6 @@ static struct drm_connector_helper_funcs
+ .mode_valid = sun4i_rgb_mode_valid,
+ };
+
+-static enum drm_connector_status
+-sun4i_rgb_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void
+ sun4i_rgb_connector_destroy(struct drm_connector *connector)
+ {
+@@ -129,7 +123,6 @@ sun4i_rgb_connector_destroy(struct drm_c
+
+ static struct drm_connector_funcs sun4i_rgb_con_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+- .detect = sun4i_rgb_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = sun4i_rgb_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
++++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
+@@ -537,12 +537,6 @@ static struct drm_connector_helper_funcs
+ .mode_valid = sun4i_tv_comp_mode_valid,
+ };
+
+-static enum drm_connector_status
+-sun4i_tv_comp_connector_detect(struct drm_connector *connector, bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static void
+ sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
+ {
+@@ -551,7 +545,6 @@ sun4i_tv_comp_connector_destroy(struct d
+
+ static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+- .detect = sun4i_tv_comp_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = sun4i_tv_comp_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+--- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
++++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
+@@ -144,13 +144,6 @@ static void panel_connector_destroy(stru
+ drm_connector_cleanup(connector);
+ }
+
+-static enum drm_connector_status panel_connector_detect(
+- struct drm_connector *connector,
+- bool force)
+-{
+- return connector_status_connected;
+-}
+-
+ static int panel_connector_get_modes(struct drm_connector *connector)
+ {
+ struct drm_device *dev = connector->dev;
+@@ -197,7 +190,6 @@ static struct drm_encoder *panel_connect
+ static const struct drm_connector_funcs panel_connector_funcs = {
+ .destroy = panel_connector_destroy,
+ .dpms = drm_atomic_helper_connector_dpms,
+- .detect = panel_connector_detect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+--- a/include/drm/drm_connector.h
++++ b/include/drm/drm_connector.h
+@@ -261,6 +261,9 @@ struct drm_connector_funcs {
+ * connector due to a user request. force can be used by the driver to
+ * avoid expensive, destructive operations during automated probing.
+ *
++ * This callback is optional, if not implemented the connector will be
++ * considered as always being attached.
++ *
+ * FIXME:
+ *
+ * Note that this hook is only called by the probe helper. It's not in
diff --git a/patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch b/patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch
new file mode 100644
index 0000000..cf9a1c7
--- /dev/null
+++ b/patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch
@@ -0,0 +1,39 @@
+From e619e85adbc0788376e50e9dc2d8f812693bbc5a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 3 Oct 2016 16:56:48 +0300
+Subject: [PATCH 044/299] drm: rcar-du: Constify node argument to
+ rcar_du_lvds_connector_init()
+
+The node passed as a pointer to the rcar_du_lvds_connector_init()
+function is never modified, make it const.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
+(cherry picked from commit 48b03494c8ae136df7806f0f467596629744000c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c | 2 +-
+ drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
+@@ -72,7 +72,7 @@ static const struct drm_connector_funcs
+
+ int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
+ struct rcar_du_encoder *renc,
+- /* TODO const */ struct device_node *np)
++ const struct device_node *np)
+ {
+ struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(renc);
+ struct rcar_du_lvds_connector *lvdscon;
+--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
++++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
+@@ -19,6 +19,6 @@ struct rcar_du_encoder;
+
+ int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
+ struct rcar_du_encoder *renc,
+- struct device_node *np);
++ const struct device_node *np);
+
+ #endif /* __RCAR_DU_LVDSCON_H__ */
diff --git a/patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch b/patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch
new file mode 100644
index 0000000..42f596a
--- /dev/null
+++ b/patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch
@@ -0,0 +1,36 @@
+From d3ea3659a69e716cad8e3febb273cc4712b938aa Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 25 Feb 2016 22:04:55 +0200
+Subject: [PATCH 045/299] drm: rcar-du: Bring HDMI encoder comments in line
+ with the driver
+
+Capitalize acronyms and use determiners and punctuation.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
+(cherry picked from commit 410fa00a96bfa33cc0f053ddf24ab76f61b88bc9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
+@@ -108,7 +108,7 @@ int rcar_du_hdmienc_init(struct rcar_du_
+ if (hdmienc == NULL)
+ return -ENOMEM;
+
+- /* Locate drm bridge from the hdmi encoder DT node */
++ /* Locate the DRM bridge from the HDMI encoder DT node. */
+ bridge = of_drm_find_bridge(np);
+ if (!bridge)
+ return -EPROBE_DEFER;
+@@ -123,7 +123,7 @@ int rcar_du_hdmienc_init(struct rcar_du_
+ renc->hdmi = hdmienc;
+ hdmienc->renc = renc;
+
+- /* Link drm_bridge to encoder */
++ /* Link the bridge to the encoder. */
+ bridge->encoder = encoder;
+ encoder->bridge = bridge;
+
diff --git a/patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch b/patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch
new file mode 100644
index 0000000..6cee59d
--- /dev/null
+++ b/patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch
@@ -0,0 +1,38 @@
+From 689f342de57d7b1d3991e38b935512768e00ab18 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 3 Oct 2016 17:40:20 +0300
+Subject: [PATCH 046/299] drm: rcar-du: Remove test for impossible error
+ condition
+
+The driver has lost platform data support a long time ago. R-Car DU
+devices can only be instantiated through DT now, making it impossible to
+have a NULL DT node pointer. Remove the error check.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
+(cherry picked from commit 0fab63c7b868a3ee8066114fabb25e108c38c3ce)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -292,17 +292,11 @@ static int rcar_du_remove(struct platfor
+
+ static int rcar_du_probe(struct platform_device *pdev)
+ {
+- struct device_node *np = pdev->dev.of_node;
+ struct rcar_du_device *rcdu;
+ struct drm_device *ddev;
+ struct resource *mem;
+ int ret;
+
+- if (np == NULL) {
+- dev_err(&pdev->dev, "no device tree node\n");
+- return -ENODEV;
+- }
+-
+ /* Allocate and initialize the DRM and R-Car device structures. */
+ rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
+ if (rcdu == NULL)
diff --git a/patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch b/patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch
new file mode 100644
index 0000000..6ec7366
--- /dev/null
+++ b/patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch
@@ -0,0 +1,30 @@
+From adce2606e3b50c07acd7b289a640adc074b91523 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 3 Oct 2016 17:42:07 +0300
+Subject: [PATCH 047/299] drm: rcar-du: Remove memory allocation error message
+
+Memory allocation failures print messages to the kernel log, there's no
+need to print an extra one. Remove the duplicate message.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
+(cherry picked from commit eb508ce6f1df09e384cbad8bccdab4ad6081f45f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
+@@ -241,10 +241,8 @@ int rcar_du_lvdsenc_init(struct rcar_du_
+
+ for (i = 0; i < rcdu->info->num_lvds; ++i) {
+ lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
+- if (lvds == NULL) {
+- dev_err(&pdev->dev, "failed to allocate private data\n");
++ if (lvds == NULL)
+ return -ENOMEM;
+- }
+
+ lvds->dev = rcdu;
+ lvds->index = i;
diff --git a/patches.renesas/0048-drm-rcar-du-Fix-crash-in-encoder-failure-error-path.patch b/patches.renesas/0048-drm-rcar-du-Fix-crash-in-encoder-failure-error-path.patch
new file mode 100644
index 0000000..a8a72b7
--- /dev/null
+++ b/patches.renesas/0048-drm-rcar-du-Fix-crash-in-encoder-failure-error-path.patch
@@ -0,0 +1,41 @@
+From 8108fdcfcf5c508848326eeb600bc232295a48a2 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 3 Oct 2016 20:03:22 +0300
+Subject: [PATCH 048/299] drm: rcar-du: Fix crash in encoder failure error path
+
+When an encoder fails to initialize the driver prints an error message
+to the kernel log. The message contains the name of the encoder's DT
+node, which is NULL for internal encoders. Use the of_node_full_name()
+macro to avoid dereferencing a NULL pointer, print the output number to
+add more context to the error, and make sure we still own a reference to
+the encoder's DT node by delaying the of_node_put() call.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
+(cherry picked from commit 05ee29e94acf0d4b3998c3f93374952de8f90176)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_kms.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+@@ -454,13 +454,13 @@ static int rcar_du_encoders_init_one(str
+ }
+
+ ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
+- of_node_put(encoder);
+- of_node_put(connector);
+-
+ if (ret && ret != -EPROBE_DEFER)
+ dev_warn(rcdu->dev,
+- "failed to initialize encoder %s (%d), skipping\n",
+- encoder->full_name, ret);
++ "failed to initialize encoder %s on output %u (%d), skipping\n",
++ of_node_full_name(encoder), output, ret);
++
++ of_node_put(encoder);
++ of_node_put(connector);
+
+ return ret;
+ }
diff --git a/patches.renesas/0049-drm-rcar-du-Simplify-and-fix-probe-error-handling.patch b/patches.renesas/0049-drm-rcar-du-Simplify-and-fix-probe-error-handling.patch
new file mode 100644
index 0000000..f40c000
--- /dev/null
+++ b/patches.renesas/0049-drm-rcar-du-Simplify-and-fix-probe-error-handling.patch
@@ -0,0 +1,102 @@
+From 37d328371b31dc50f6ee3d511c232cccc6effe97 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 19 Oct 2016 00:51:35 +0300
+Subject: [PATCH 049/299] drm: rcar-du: Simplify and fix probe error handling
+
+It isn't safe to call drm_dev_unregister() without first initializing
+mode setting with drm_mode_config_init(). This leads to a crash if
+either IO memory can't be remapped or vblank initialization fails.
+
+Fix this by reordering the initialization sequence. Move vblank
+initialization after the drm_mode_config_init() call, and move IO
+remapping before drm_dev_alloc() to avoid the need to perform clean up
+in case of failure.
+
+While at it remove the explicit drm_vblank_cleanup() call from
+rcar_du_remove() as the drm_dev_unregister() function already cleans up
+vblank.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 4f7b0d263833928e947e172eff2d2997179c5cb9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 30 ++++++++++--------------------
+ drivers/gpu/drm/rcar-du/rcar_du_kms.c | 7 +++++++
+ 2 files changed, 17 insertions(+), 20 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -283,7 +283,6 @@ static int rcar_du_remove(struct platfor
+
+ drm_kms_helper_poll_fini(ddev);
+ drm_mode_config_cleanup(ddev);
+- drm_vblank_cleanup(ddev);
+
+ drm_dev_unref(ddev);
+
+@@ -297,7 +296,7 @@ static int rcar_du_probe(struct platform
+ struct resource *mem;
+ int ret;
+
+- /* Allocate and initialize the DRM and R-Car device structures. */
++ /* Allocate and initialize the R-Car device structure. */
+ rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
+ if (rcdu == NULL)
+ return -ENOMEM;
+@@ -307,31 +306,22 @@ static int rcar_du_probe(struct platform
+ rcdu->dev = &pdev->dev;
+ rcdu->info = of_match_device(rcar_du_of_table, rcdu->dev)->data;
+
+- ddev = drm_dev_alloc(&rcar_du_driver, &pdev->dev);
+- if (IS_ERR(ddev))
+- return PTR_ERR(ddev);
+-
+- rcdu->ddev = ddev;
+- ddev->dev_private = rcdu;
+-
+ platform_set_drvdata(pdev, rcdu);
+
+ /* I/O resources */
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem);
+- if (IS_ERR(rcdu->mmio)) {
+- ret = PTR_ERR(rcdu->mmio);
+- goto error;
+- }
+-
+- /* Initialize vertical blanking interrupts handling. Start with vblank
+- * disabled for all CRTCs.
+- */
+- ret = drm_vblank_init(ddev, (1 << rcdu->info->num_crtcs) - 1);
+- if (ret < 0)
+- goto error;
++ if (IS_ERR(rcdu->mmio))
++ return PTR_ERR(rcdu->mmio);
+
+ /* DRM/KMS objects */
++ ddev = drm_dev_alloc(&rcar_du_driver, &pdev->dev);
++ if (IS_ERR(ddev))
++ return PTR_ERR(ddev);
++
++ rcdu->ddev = ddev;
++ ddev->dev_private = rcdu;
++
+ ret = rcar_du_modeset_init(rcdu);
+ if (ret < 0) {
+ if (ret != -EPROBE_DEFER)
+--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+@@ -568,6 +568,13 @@ int rcar_du_modeset_init(struct rcar_du_
+ if (ret < 0)
+ return ret;
+
++ /* Initialize vertical blanking interrupts handling. Start with vblank
++ * disabled for all CRTCs.
++ */
++ ret = drm_vblank_init(dev, (1 << rcdu->info->num_crtcs) - 1);
++ if (ret < 0)
++ return ret;
++
+ /* Initialize the groups. */
+ num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
+
diff --git a/patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch b/patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch
new file mode 100644
index 0000000..573b2be
--- /dev/null
+++ b/patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch
@@ -0,0 +1,82 @@
+From 7c559c430c0ba225e259b90f7e2ca332d367d75c Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 4 Aug 2016 15:01:02 -0700
+Subject: [PATCH 050/299] drm: rcar-du: Add R8A7792 support
+
+Add support for the R8A7792 DU; it has 2 DPAD (RGB) outputs.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 73323ddbbddf2c8aeb1b57c75bcb537142ec9599)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/display/renesas,du.txt | 4 ++
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 22 +++++++++++++++
+ 2 files changed, 25 insertions(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/display/renesas,du.txt
++++ b/Documentation/devicetree/bindings/display/renesas,du.txt
+@@ -6,6 +6,7 @@ Required Properties:
+ - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
+ - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
+ - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
++ - "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU
+ - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
+ - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
+ - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
+@@ -25,7 +26,7 @@ Required Properties:
+ - clock-names: Name of the clocks. This property is model-dependent.
+ - R8A7779 uses a single functional clock. The clock doesn't need to be
+ named.
+- - R8A779[01345] use one functional clock per channel and one clock per LVDS
++ - R8A779[012345] use one functional clock per channel and one clock per LVDS
+ encoder (if available). The functional clocks must be named "du.x" with
+ "x" being the channel numerical index. The LVDS clocks must be named
+ "lvds.x" with "x" being the LVDS encoder numerical index.
+@@ -47,6 +48,7 @@ corresponding to each DU output.
+ R8A7779 (H1) DPAD 0 DPAD 1 - -
+ R8A7790 (H2) DPAD LVDS 0 LVDS 1 -
+ R8A7791 (M2-W) DPAD LVDS 0 - -
++ R8A7792 (V2H) DPAD 0 DPAD 1 - -
+ R8A7793 (M2-N) DPAD LVDS 0 - -
+ R8A7794 (E2) DPAD 0 DPAD 1 - -
+ R8A7795 (H3) DPAD HDMI 0 HDMI 1 LVDS
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -110,6 +110,27 @@ static const struct rcar_du_device_info
+ .num_lvds = 1,
+ };
+
++static const struct rcar_du_device_info rcar_du_r8a7792_info = {
++ .gen = 2,
++ .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
++ | RCAR_DU_FEATURE_EXT_CTRL_REGS,
++ .num_crtcs = 2,
++ .routes = {
++ /* R8A7792 has two RGB outputs. */
++ [RCAR_DU_OUTPUT_DPAD0] = {
++ .possible_crtcs = BIT(0),
++ .encoder_type = DRM_MODE_ENCODER_NONE,
++ .port = 0,
++ },
++ [RCAR_DU_OUTPUT_DPAD1] = {
++ .possible_crtcs = BIT(1),
++ .encoder_type = DRM_MODE_ENCODER_NONE,
++ .port = 1,
++ },
++ },
++ .num_lvds = 0,
++};
++
+ static const struct rcar_du_device_info rcar_du_r8a7794_info = {
+ .gen = 2,
+ .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
+@@ -161,6 +182,7 @@ static const struct of_device_id rcar_du
+ { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
+ { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
+ { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
++ { .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info },
+ { .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
+ { .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
+ { .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
diff --git a/patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch b/patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch
new file mode 100644
index 0000000..a2b0a9e
--- /dev/null
+++ b/patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch
@@ -0,0 +1,90 @@
+From d69d49c0a90afb735d10dd4a4b3ce9105f075517 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 6 Sep 2016 02:11:43 +0300
+Subject: [PATCH 051/299] drm: rcar-du: Add R8A7796 support
+
+Document the R8A7796-specific DT bindings and support them in the
+driver. The HDMI output is currently not supported.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 63b5053e53a052355bbc74e814561e5e586fd866)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/display/renesas,du.txt | 10 +++---
+ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 25 +++++++++++++++
+ 2 files changed, 31 insertions(+), 4 deletions(-)
+
+--- a/Documentation/devicetree/bindings/display/renesas,du.txt
++++ b/Documentation/devicetree/bindings/display/renesas,du.txt
+@@ -10,6 +10,7 @@ Required Properties:
+ - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
+ - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
+ - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
++ - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
+
+ - reg: A list of base address and length of each memory resource, one for
+ each entry in the reg-names property.
+@@ -26,10 +27,10 @@ Required Properties:
+ - clock-names: Name of the clocks. This property is model-dependent.
+ - R8A7779 uses a single functional clock. The clock doesn't need to be
+ named.
+- - R8A779[012345] use one functional clock per channel and one clock per LVDS
+- encoder (if available). The functional clocks must be named "du.x" with
+- "x" being the channel numerical index. The LVDS clocks must be named
+- "lvds.x" with "x" being the LVDS encoder numerical index.
++ - R8A779[0123456] use one functional clock per channel and one clock per
++ LVDS encoder (if available). The functional clocks must be named "du.x"
++ with "x" being the channel numerical index. The LVDS clocks must be
++ named "lvds.x" with "x" being the LVDS encoder numerical index.
+ - In addition to the functional and encoder clocks, all DU versions also
+ support externally supplied pixel clocks. Those clocks are optional.
+ When supplied they must be named "dclkin.x" with "x" being the input
+@@ -52,6 +53,7 @@ corresponding to each DU output.
+ R8A7793 (M2-N) DPAD LVDS 0 - -
+ R8A7794 (E2) DPAD 0 DPAD 1 - -
+ R8A7795 (H3) DPAD HDMI 0 HDMI 1 LVDS
++ R8A7796 (M3-W) DPAD HDMI LVDS -
+
+
+ Example: R8A7790 (R-Car H2) DU
+--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+@@ -178,6 +178,30 @@ static const struct rcar_du_device_info
+ .num_lvds = 1,
+ };
+
++static const struct rcar_du_device_info rcar_du_r8a7796_info = {
++ .gen = 3,
++ .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
++ | RCAR_DU_FEATURE_EXT_CTRL_REGS
++ | RCAR_DU_FEATURE_VSP1_SOURCE,
++ .num_crtcs = 3,
++ .routes = {
++ /* R8A7796 has one RGB output, one LVDS output and one
++ * (currently unsupported) HDMI output.
++ */
++ [RCAR_DU_OUTPUT_DPAD0] = {
++ .possible_crtcs = BIT(2),
++ .encoder_type = DRM_MODE_ENCODER_NONE,
++ .port = 0,
++ },
++ [RCAR_DU_OUTPUT_LVDS0] = {
++ .possible_crtcs = BIT(0),
++ .encoder_type = DRM_MODE_ENCODER_LVDS,
++ .port = 2,
++ },
++ },
++ .num_lvds = 1,
++};
++
+ static const struct of_device_id rcar_du_of_table[] = {
+ { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
+ { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
+@@ -186,6 +210,7 @@ static const struct of_device_id rcar_du
+ { .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
+ { .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
+ { .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
++ { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
+ { }
+ };
+
diff --git a/patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch b/patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch
new file mode 100644
index 0000000..809a6a9
--- /dev/null
+++ b/patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch
@@ -0,0 +1,49 @@
+From d746cd33f0ee9f81e87e4b0854c118e3b95a3ee6 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 22 Oct 2016 19:05:53 +0300
+Subject: [PATCH 052/299] drm: rcar-du: Fix dot clock routing configuration
+
+Dot clock routing is setup through different registers depending on the
+DU generation. The code has been designed for Gen2 and hasn't been
+updated since. This works thanks to good reset default value, but isn't
+very safe. Fix it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit a3c477b33d6cf015fed50fe5ee23f57e2d579ef4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_group.c | 22 +++++++++++++---------
+ 1 file changed, 13 insertions(+), 9 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
+@@ -105,16 +105,20 @@ static void rcar_du_group_setup(struct r
+ if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_EXT_CTRL_REGS)) {
+ rcar_du_group_setup_defr8(rgrp);
+
+- /* Configure input dot clock routing. We currently hardcode the
+- * configuration to routing DOTCLKINn to DUn.
++ /*
++ * Configure input dot clock routing. We currently hardcode the
++ * configuration to routing DOTCLKINn to DUn. Register fields
++ * depend on the DU generation, but the resulting value is 0 in
++ * all cases.
++ *
++ * On Gen2 a single register in the first group controls dot
++ * clock selection for all channels, while on Gen3 dot clocks
++ * are setup through per-group registers, only available when
++ * the group has two channels.
+ */
+- rcar_du_group_write(rgrp, DIDSR, DIDSR_CODE |
+- DIDSR_LCDS_DCLKIN(2) |
+- DIDSR_LCDS_DCLKIN(1) |
+- DIDSR_LCDS_DCLKIN(0) |
+- DIDSR_PDCS_CLK(2, 0) |
+- DIDSR_PDCS_CLK(1, 0) |
+- DIDSR_PDCS_CLK(0, 0));
++ if ((rcdu->info->gen < 3 && rgrp->index == 0) ||
++ (rcdu->info->gen == 3 && rgrp->num_crtcs > 1))
++ rcar_du_group_write(rgrp, DIDSR, DIDSR_CODE);
+ }
+
+ if (rcdu->info->gen >= 3)
diff --git a/patches.renesas/0053-drm-rcar-du-Fix-display-timing-controller-parameter.patch b/patches.renesas/0053-drm-rcar-du-Fix-display-timing-controller-parameter.patch
new file mode 100644
index 0000000..467e4da
--- /dev/null
+++ b/patches.renesas/0053-drm-rcar-du-Fix-display-timing-controller-parameter.patch
@@ -0,0 +1,29 @@
+From 9389e8db60a5b7a71546c61d167256be9d5b9b9d Mon Sep 17 00:00:00 2001
+From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
+Date: Mon, 18 Apr 2016 16:31:30 +0900
+Subject: [PATCH 053/299] drm: rcar-du: Fix display timing controller parameter
+
+There is a bug in the setting of the DES (Display Enable Signal)
+register. This current setting occurs 1 dot left shift. The DES
+register should be set minus one value about the specifying value
+with H/W specification. This patch corrects it.
+
+Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 9cdced8a39c04cf798ddb2a27cb5952f7d39f633)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+@@ -172,7 +172,7 @@ static void rcar_du_crtc_set_display_tim
+ mode->crtc_vsync_start - 1);
+ rcar_du_crtc_write(rcrtc, VCR, mode->crtc_vtotal - 1);
+
+- rcar_du_crtc_write(rcrtc, DESR, mode->htotal - mode->hsync_start);
++ rcar_du_crtc_write(rcrtc, DESR, mode->htotal - mode->hsync_start - 1);
+ rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay);
+ }
+
diff --git a/patches.renesas/0054-drm-rcar-du-Fix-H-V-sync-signal-polarity-configurati.patch b/patches.renesas/0054-drm-rcar-du-Fix-H-V-sync-signal-polarity-configurati.patch
new file mode 100644
index 0000000..6562ea1
--- /dev/null
+++ b/patches.renesas/0054-drm-rcar-du-Fix-H-V-sync-signal-polarity-configurati.patch
@@ -0,0 +1,31 @@
+From 6f4749f01e68aac30145f473933a8c17ea072dc1 Mon Sep 17 00:00:00 2001
+From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
+Date: Mon, 16 May 2016 11:28:15 +0900
+Subject: [PATCH 054/299] drm: rcar-du: Fix H/V sync signal polarity
+ configuration
+
+The VSL and HSL bits in the DSMR register set the corresponding
+horizontal and vertical sync signal polarity to active high. The code
+got it the wrong way around, fix it.
+
+Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit fd1adef3bff0663c5ac31b45bc4a05fafd43d19b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+@@ -149,8 +149,8 @@ static void rcar_du_crtc_set_display_tim
+ rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? OTAR2 : OTAR, 0);
+
+ /* Signal polarities */
+- value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : DSMR_VSL)
+- | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : DSMR_HSL)
++ value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0)
++ | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DSMR_HSL : 0)
+ | DSMR_DIPM_DISP | DSMR_CSPM;
+ rcar_du_crtc_write(rcrtc, DSMR, value);
+
diff --git a/patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch b/patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch
new file mode 100644
index 0000000..23b0e98
--- /dev/null
+++ b/patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch
@@ -0,0 +1,47 @@
+From 218f0abdaf2249c132c3f4182b10ba3c687108b5 Mon Sep 17 00:00:00 2001
+From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
+Date: Tue, 28 Jun 2016 16:33:45 +0900
+Subject: [PATCH 055/299] drm: rcar-du: Fix LVDS start sequence on Gen3
+
+According to the latest revision of the datasheet, the LVDS I/O pins
+must be enabled before starting the PLL. Fix it.
+
+Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 85e8f8d175caa6a39f4c4e11dd4d0ab038f43324)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c | 15 ++++++++-------
+ 1 file changed, 8 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
++++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
+@@ -104,7 +104,14 @@ static void rcar_du_lvdsenc_start_gen3(s
+
+ rcar_lvds_write(lvds, LVDPLLCR, pllcr);
+
+- /* Turn the PLL on, set it to LVDS normal mode, wait for the startup
++ /* Turn all the channels on. */
++ rcar_lvds_write(lvds, LVDCR1,
++ LVDCR1_CHSTBY_GEN3(3) | LVDCR1_CHSTBY_GEN3(2) |
++ LVDCR1_CHSTBY_GEN3(1) | LVDCR1_CHSTBY_GEN3(0) |
++ LVDCR1_CLKSTBY_GEN3);
++
++ /*
++ * Turn the PLL on, set it to LVDS normal mode, wait for the startup
+ * delay and turn the output on.
+ */
+ lvdcr0 = LVDCR0_PLLON;
+@@ -117,12 +124,6 @@ static void rcar_du_lvdsenc_start_gen3(s
+
+ lvdcr0 |= LVDCR0_LVRES;
+ rcar_lvds_write(lvds, LVDCR0, lvdcr0);
+-
+- /* Turn all the channels on. */
+- rcar_lvds_write(lvds, LVDCR1,
+- LVDCR1_CHSTBY_GEN3(3) | LVDCR1_CHSTBY_GEN3(2) |
+- LVDCR1_CHSTBY_GEN3(1) | LVDCR1_CHSTBY_GEN3(0) |
+- LVDCR1_CLKSTBY_GEN3);
+ }
+
+ static int rcar_du_lvdsenc_start(struct rcar_du_lvdsenc *lvds,
diff --git a/patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch b/patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch
new file mode 100644
index 0000000..5db0cbe
--- /dev/null
+++ b/patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch
@@ -0,0 +1,46 @@
+From c8f5ae8945f831451e9b23b5b34f00cb10d90cc2 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Oct 2016 23:29:02 +0300
+Subject: [PATCH 056/299] dt-bindings: media: renesas-fcp: Remove SoC-specific
+ compatible strings
+
+The FCP IP cores include a version register that identifies which SoC
+model the IP is integrated in. SoC-specific compatible strings are not
+needed.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a733c81115da9aa501f3cd918fe5b9f3bbe03b11)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/media/renesas,fcp.txt | 8 +-------
+ 1 file changed, 1 insertion(+), 7 deletions(-)
+
+--- a/Documentation/devicetree/bindings/media/renesas,fcp.txt
++++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
+@@ -11,15 +11,9 @@ are paired with. These DT bindings curre
+
+ - compatible: Must be one or more of the following
+
+- - "renesas,r8a7795-fcpv" for R8A7795 (R-Car H3) compatible 'FCP for VSP'
+- - "renesas,r8a7795-fcpf" for R8A7795 (R-Car H3) compatible 'FCP for FDP'
+ - "renesas,fcpv" for generic compatible 'FCP for VSP'
+ - "renesas,fcpf" for generic compatible 'FCP for FDP'
+
+- When compatible with the generic version, nodes must list the
+- SoC-specific version corresponding to the platform first, followed by the
+- family-specific and/or generic versions.
+-
+ - reg: the register base and size for the device registers
+ - clocks: Reference to the functional clock
+
+@@ -32,7 +26,7 @@ Device node example
+ -------------------
+
+ fcpvd1: fcp@fea2f000 {
+- compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
++ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
diff --git a/patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch b/patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch
new file mode 100644
index 0000000..27b8d4c
--- /dev/null
+++ b/patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch
@@ -0,0 +1,46 @@
+From 985814f123c53bdbbdc4e2400a332863710460c2 Mon Sep 17 00:00:00 2001
+From: Javier Martinez Canillas <javier@osg.samsung.com>
+Date: Mon, 17 Oct 2016 13:44:09 -0200
+Subject: [PATCH 057/299] [media] v4l: rcar-fcp: Fix module autoload for OF
+ registration
+
+If the driver is built as a module, autoload won't work because the module
+alias information is not filled. So user-space can't match the registered
+device with the corresponding module.
+
+Export the module alias information using the MODULE_DEVICE_TABLE() macro.
+
+Before this patch:
+
+$ modinfo drivers/media/platform/rcar-fcp.ko | grep alias
+alias: rcar-fcp
+
+After this patch:
+
+$ modinfo drivers/media/platform/rcar-fcp.ko | grep alias
+alias: rcar-fcp
+alias: of:N*T*Crenesas,fcpvC*
+alias: of:N*T*Crenesas,fcpv
+alias: of:N*T*Crenesas,fcpfC*
+alias: of:N*T*Crenesas,fcpf
+
+Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit d6023d33a4ac9bc53975c9029a59135d71a76268)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/rcar-fcp.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/media/platform/rcar-fcp.c
++++ b/drivers/media/platform/rcar-fcp.c
+@@ -169,6 +169,7 @@ static const struct of_device_id rcar_fc
+ { .compatible = "renesas,fcpv" },
+ { },
+ };
++MODULE_DEVICE_TABLE(of, rcar_fcp_of_match);
+
+ static struct platform_driver rcar_fcp_platform_driver = {
+ .probe = rcar_fcp_probe,
diff --git a/patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch b/patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch
new file mode 100644
index 0000000..7f586ba
--- /dev/null
+++ b/patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch
@@ -0,0 +1,68 @@
+From 8957b4ecc711f9bec12abc3e3c78ebd8c837faf4 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 1 Sep 2015 16:30:12 +0200
+Subject: [PATCH 058/299] reset: Add renesas,rst DT bindings
+
+Add DT bindings for the Renesas R-Car Reset Controller (R-Car Gen1
+RESET/WDT and R-Car Gen2/Gen3 and RZ/G RST).
+
+As the features provided by the hardware module differ a lot across the
+various SoC families and members, only SoC-specific compatible values
+are defined.
+
+For now we use the RST only for providing access to the state of the
+mode pins, which is needed by the clock driver.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
+Acked-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 362922a1a5345d17a9d4ad7e3f848aa4fdf79d75)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/reset/renesas,rst.txt | 37 ++++++++++++++++
+ 1 file changed, 37 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/reset/renesas,rst.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
+@@ -0,0 +1,37 @@
++DT bindings for the Renesas R-Car and RZ/G Reset Controllers
++
++The R-Car and RZ/G Reset Controllers provide reset control, and implement the
++following functions:
++ - Latching of the levels on mode pins when PRESET# is negated,
++ - Mode monitoring register,
++ - Reset control of peripheral devices (on R-Car Gen1),
++ - Watchdog timer (on R-Car Gen1),
++ - Register-based reset control and boot address registers for the various CPU
++ cores (on R-Car Gen2 and Gen3, and on RZ/G).
++
++
++Required properties:
++ - compatible: Should be
++ - "renesas,<soctype>-reset-wdt" for R-Car Gen1,
++ - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G
++ Examples with soctypes are:
++ - "renesas,r8a7743-rst" (RZ/G1M)
++ - "renesas,r8a7745-rst" (RZ/G1E)
++ - "renesas,r8a7778-reset-wdt" (R-Car M1A)
++ - "renesas,r8a7779-reset-wdt" (R-Car H1)
++ - "renesas,r8a7790-rst" (R-Car H2)
++ - "renesas,r8a7791-rst" (R-Car M2-W)
++ - "renesas,r8a7792-rst" (R-Car V2H
++ - "renesas,r8a7793-rst" (R-Car M2-N)
++ - "renesas,r8a7794-rst" (R-Car E2)
++ - "renesas,r8a7795-rst" (R-Car H3)
++ - "renesas,r8a7796-rst" (R-Car M3-W)
++ - reg: Address start and address range for the device.
++
++
++Example:
++
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7795-rst";
++ reg = <0 0xe6160000 0 0x0200>;
++ };
diff --git a/patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch b/patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch
new file mode 100644
index 0000000..fd1f32f
--- /dev/null
+++ b/patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch
@@ -0,0 +1,151 @@
+From df1f0347e86be731d8c0d7347d98ef246c1f4ffa Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 27 May 2016 11:56:53 +0200
+Subject: [PATCH 059/299] soc: renesas: Add R-Car RST driver
+
+Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3
+and RZ/G RST module.
+
+For now this driver just provides an API to obtain the state of the mode
+pins, as latched at reset time. As this is typically called from the
+probe function of a clock driver, which can run much earlier than any
+initcall, calling rcar_rst_read_mode_pins() just forces an early
+initialization of the driver.
+
+Despite the current simple and almost identical handling for all
+supported SoCs, the driver matches against SoC-specific compatible
+values, as the features provided by the hardware module differ a lot
+across the various SoC families and members.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 527c02f66d263d2eeff237a2326c3278cfc03d3b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ drivers/soc/renesas/Makefile
+---
+ drivers/soc/renesas/Makefile | 5 +
+ drivers/soc/renesas/rcar-rst.c | 92 +++++++++++++++++++++++++++++++++++
+ include/linux/soc/renesas/rcar-rst.h | 6 ++
+ 3 files changed, 103 insertions(+)
+ create mode 100644 drivers/soc/renesas/rcar-rst.c
+ create mode 100644 include/linux/soc/renesas/rcar-rst.h
+
+--- a/drivers/soc/renesas/Makefile
++++ b/drivers/soc/renesas/Makefile
+@@ -1,5 +1,10 @@
+ obj-$(CONFIG_SOC_BUS) += renesas-soc.o
+
++obj-$(CONFIG_ARCH_RCAR_GEN1) += rcar-rst.o
++obj-$(CONFIG_ARCH_RCAR_GEN2) += rcar-rst.o
++obj-$(CONFIG_ARCH_R8A7795) += rcar-rst.o
++obj-$(CONFIG_ARCH_R8A7796) += rcar-rst.o
++
+ obj-$(CONFIG_ARCH_R8A7743) += rcar-sysc.o r8a7743-sysc.o
+ obj-$(CONFIG_ARCH_R8A7745) += rcar-sysc.o r8a7745-sysc.o
+ obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
+--- /dev/null
++++ b/drivers/soc/renesas/rcar-rst.c
+@@ -0,0 +1,92 @@
++/*
++ * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
++ *
++ * Copyright (C) 2016 Glider bvba
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ */
++
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/of_address.h>
++#include <linux/soc/renesas/rcar-rst.h>
++
++struct rst_config {
++ unsigned int modemr; /* Mode Monitoring Register Offset */
++};
++
++static const struct rst_config rcar_rst_gen1 __initconst = {
++ .modemr = 0x20,
++};
++
++static const struct rst_config rcar_rst_gen2 __initconst = {
++ .modemr = 0x60,
++};
++
++static const struct of_device_id rcar_rst_matches[] __initconst = {
++ /* RZ/G is handled like R-Car Gen2 */
++ { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
++ /* R-Car Gen1 */
++ { .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
++ { .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
++ /* R-Car Gen2 */
++ { .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
++ /* R-Car Gen3 is handled like R-Car Gen2 */
++ { .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen2 },
++ { .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen2 },
++ { /* sentinel */ }
++};
++
++static void __iomem *rcar_rst_base __initdata;
++static u32 saved_mode __initdata;
++
++static int __init rcar_rst_init(void)
++{
++ const struct of_device_id *match;
++ const struct rst_config *cfg;
++ struct device_node *np;
++ void __iomem *base;
++ int error = 0;
++
++ np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
++ if (!np)
++ return -ENODEV;
++
++ base = of_iomap(np, 0);
++ if (!base) {
++ pr_warn("%s: Cannot map regs\n", np->full_name);
++ error = -ENOMEM;
++ goto out_put;
++ }
++
++ rcar_rst_base = base;
++ cfg = match->data;
++ saved_mode = ioread32(base + cfg->modemr);
++
++ pr_debug("%s: MODE = 0x%08x\n", np->full_name, saved_mode);
++
++out_put:
++ of_node_put(np);
++ return error;
++}
++
++int __init rcar_rst_read_mode_pins(u32 *mode)
++{
++ int error;
++
++ if (!rcar_rst_base) {
++ error = rcar_rst_init();
++ if (error)
++ return error;
++ }
++
++ *mode = saved_mode;
++ return 0;
++}
+--- /dev/null
++++ b/include/linux/soc/renesas/rcar-rst.h
+@@ -0,0 +1,6 @@
++#ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__
++#define __LINUX_SOC_RENESAS_RCAR_RST_H__
++
++int rcar_rst_read_mode_pins(u32 *mode);
++
++#endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */
diff --git a/patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch b/patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch
new file mode 100644
index 0000000..581eead
--- /dev/null
+++ b/patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch
@@ -0,0 +1,25 @@
+From 6901e2bcadbd874e9e675fc798db8fa257e5c0e8 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 19 Oct 2016 03:56:07 +0000
+Subject: [PATCH 060/299] ASoC: rsnd: remove duplicate define of
+ rsnd_dvc_of_node()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 5490a109937b19464dc810389e69ff064afedf48)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/dvc.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -48,8 +48,6 @@ struct rsnd_dvc {
+
+ #define rsnd_dvc_get(priv, id) ((struct rsnd_dvc *)(priv->dvc) + id)
+ #define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
+-#define rsnd_dvc_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dvc")
+
+ #define rsnd_mod_to_dvc(_mod) \
+ container_of((_mod), struct rsnd_dvc, mod)
diff --git a/patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch b/patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch
new file mode 100644
index 0000000..eed3e1c
--- /dev/null
+++ b/patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch
@@ -0,0 +1,127 @@
+From e1719d6d8a1696f0c7bbbb30195978da484b16b5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 19 Oct 2016 03:56:26 +0000
+Subject: [PATCH 061/299] ASoC: rsnd: amend .probe/.remove call for DPCM
+
+commit 1a5658c2131 ("ASoC: rsnd: count .probe/.remove for
+rsnd_mod_call()") solved multi-resource-free issue, by putting
+.probe/.remove under count control. But,it breaks sound mixing case
+(if it was used under DPCM). In such case, it uses MIXn/DVCn/SSIn,
+and these should be always probed.
+This patch reverted above patch, and solved the same issue by
+modifing _rsnd_kctrl_remove() function.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 0af5c01a79ade438698af683511803fc11291360)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 6 +++++-
+ sound/soc/sh/rcar/dma.c | 11 +++++++++++
+ sound/soc/sh/rcar/rsnd.h | 14 +++++++-------
+ sound/soc/sh/rcar/ssi.c | 5 ++++-
+ 4 files changed, 27 insertions(+), 9 deletions(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -993,7 +993,11 @@ static int __rsnd_kctrl_new(struct rsnd_
+
+ void _rsnd_kctrl_remove(struct rsnd_kctrl_cfg *cfg)
+ {
+- snd_ctl_remove(cfg->card, cfg->kctrl);
++ if (cfg->card && cfg->kctrl)
++ snd_ctl_remove(cfg->card, cfg->kctrl);
++
++ cfg->card = NULL;
++ cfg->kctrl = NULL;
+ }
+
+ int rsnd_kctrl_new_m(struct rsnd_mod *mod,
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -707,6 +707,17 @@ int rsnd_dma_attach(struct rsnd_dai_stre
+ return 0;
+ }
+
++void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod)
++{
++ if (*dma_mod) {
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++
++ devm_kfree(dev, *dma_mod);
++ *dma_mod = NULL;
++ }
++}
++
+ int rsnd_dma_probe(struct rsnd_priv *priv)
+ {
+ struct platform_device *pdev = rsnd_priv_to_pdev(priv);
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -200,6 +200,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
+ */
+ int rsnd_dma_attach(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod, struct rsnd_mod **dma_mod, int id);
++void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
+ int rsnd_dma_probe(struct rsnd_priv *priv);
+ struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
+ struct rsnd_mod *mod, char *name);
+@@ -276,9 +277,8 @@ struct rsnd_mod {
+ /*
+ * status
+ *
+- * 0xH0000CBA
++ * 0xH0000CB0
+ *
+- * A 0: probe 1: remove
+ * B 0: init 1: quit
+ * C 0: start 1: stop
+ *
+@@ -288,19 +288,19 @@ struct rsnd_mod {
+ * H 0: fallback
+ * H 0: hw_params
+ */
+-#define __rsnd_mod_shift_probe 0
+-#define __rsnd_mod_shift_remove 0
+ #define __rsnd_mod_shift_init 4
+ #define __rsnd_mod_shift_quit 4
+ #define __rsnd_mod_shift_start 8
+ #define __rsnd_mod_shift_stop 8
++#define __rsnd_mod_shift_probe 28 /* always called */
++#define __rsnd_mod_shift_remove 28 /* always called */
+ #define __rsnd_mod_shift_irq 28 /* always called */
+ #define __rsnd_mod_shift_pcm_new 28 /* always called */
+ #define __rsnd_mod_shift_fallback 28 /* always called */
+ #define __rsnd_mod_shift_hw_params 28 /* always called */
+
+-#define __rsnd_mod_add_probe 1
+-#define __rsnd_mod_add_remove -1
++#define __rsnd_mod_add_probe 0
++#define __rsnd_mod_add_remove 0
+ #define __rsnd_mod_add_init 1
+ #define __rsnd_mod_add_quit -1
+ #define __rsnd_mod_add_start 1
+@@ -311,7 +311,7 @@ struct rsnd_mod {
+ #define __rsnd_mod_add_hw_params 0
+
+ #define __rsnd_mod_call_probe 0
+-#define __rsnd_mod_call_remove 1
++#define __rsnd_mod_call_remove 0
+ #define __rsnd_mod_call_init 0
+ #define __rsnd_mod_call_quit 1
+ #define __rsnd_mod_call_start 0
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -698,7 +698,10 @@ static int rsnd_ssi_dma_remove(struct rs
+ int irq = ssi->irq;
+
+ /* PIO will request IRQ again */
+- devm_free_irq(dev, irq, mod);
++ if (ssi->dma)
++ devm_free_irq(dev, irq, mod);
++
++ rsnd_dma_detach(mod, &ssi->dma);
+
+ return 0;
+ }
diff --git a/patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch b/patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch
new file mode 100644
index 0000000..6ff680d
--- /dev/null
+++ b/patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch
@@ -0,0 +1,72 @@
+From e4fb7b5800c227f74efa2d7ab040857e56898758 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 19 Oct 2016 03:56:46 +0000
+Subject: [PATCH 062/299] ASoC: rsnd: add rsnd_mod_next() for
+ for_each_rsnd_mod_xxx()
+
+Current rsnd driver is using too complex macro for for-loop of each mod.
+In order to simplify this issue, this patch adds new rsnd_mod_next()
+which is non-macro.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b3ca3fbeb229890e8de569d1b34cd46fcb95826c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 23 +++++++++++++++++++++++
+ sound/soc/sh/rcar/rsnd.h | 12 ++++++++++++
+ 2 files changed, 35 insertions(+)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -348,6 +348,29 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
+ /*
+ * rsnd_dai functions
+ */
++struct rsnd_mod *rsnd_mod_next(int *iterator,
++ struct rsnd_dai_stream *io,
++ enum rsnd_mod_type *array,
++ int array_size)
++{
++ struct rsnd_mod *mod;
++ enum rsnd_mod_type type;
++ int max = array ? array_size : RSND_MOD_MAX;
++
++ for (; *iterator < max; (*iterator)++) {
++ type = (array) ? array[*iterator] : *iterator;
++ mod = io->mod[type];
++ if (!mod)
++ continue;
++
++ (*iterator)++;
++
++ return mod;
++ }
++
++ return NULL;
++}
++
+ #define rsnd_mod_call(idx, io, func, param...) \
+ ({ \
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -346,6 +346,18 @@ void rsnd_mod_interrupt(struct rsnd_mod
+ u32 *rsnd_mod_get_status(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod,
+ enum rsnd_mod_type type);
++struct rsnd_mod *rsnd_mod_next(int *iterator,
++ struct rsnd_dai_stream *io,
++ enum rsnd_mod_type *array,
++ int array_size);
++#define for_each_rsnd_mod(iterator, pos, io) \
++ for (iterator = 0; \
++ (pos = rsnd_mod_next(&iterator, io, NULL, 0));)
++#define for_each_rsnd_mod_arrays(iterator, pos, io, array, size) \
++ for (iterator = 0; \
++ (pos = rsnd_mod_next(&iterator, io, array, size));)
++#define for_each_rsnd_mod_array(iterator, pos, io, array) \
++ for_each_rsnd_mod_arrays(iterator, pos, io, array, ARRAY_SIZE(array))
+
+ void rsnd_parse_connect_common(struct rsnd_dai *rdai,
+ struct rsnd_mod* (*mod_get)(struct rsnd_priv *priv, int id),
diff --git a/patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch b/patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch
new file mode 100644
index 0000000..008e5e3
--- /dev/null
+++ b/patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch
@@ -0,0 +1,118 @@
+From 493e07c0eb1db5479023876310b19aade527f185 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 19 Oct 2016 03:57:08 +0000
+Subject: [PATCH 063/299] ASoC: rsnd: use for_each_rsnd_mod_xxx() on
+ rsnd_dai_call()
+
+Current rsnd driver is using too complex macro for for-loop of each mod.
+rsnd_dai_call() is especially defined as very complex macro.
+It is easier to read just a little bit by using for_each_rsnd_mod_xxx()
+and new rsnd_status_update()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 5f222a29212cac3b64e7da8657d4404cc8201595)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 83 ++++++++++++++++++++++++-----------------------
+ 1 file changed, 43 insertions(+), 40 deletions(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -371,33 +371,6 @@ struct rsnd_mod *rsnd_mod_next(int *iter
+ return NULL;
+ }
+
+-#define rsnd_mod_call(idx, io, func, param...) \
+-({ \
+- struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
+- struct rsnd_mod *mod = (io)->mod[idx]; \
+- struct device *dev = rsnd_priv_to_dev(priv); \
+- u32 *status = mod->get_status(io, mod, idx); \
+- u32 mask = 0xF << __rsnd_mod_shift_##func; \
+- u8 val = (*status >> __rsnd_mod_shift_##func) & 0xF; \
+- u8 add = ((val + __rsnd_mod_add_##func) & 0xF); \
+- int ret = 0; \
+- int call = (val == __rsnd_mod_call_##func) && (mod)->ops->func; \
+- if (add == 0xF) \
+- call = 0; \
+- else \
+- *status = (*status & ~mask) + \
+- (add << __rsnd_mod_shift_##func); \
+- dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \
+- rsnd_mod_name(mod), rsnd_mod_id(mod), \
+- *status, call ? #func : ""); \
+- if (call) \
+- ret = (mod)->ops->func(mod, io, param); \
+- if (ret) \
+- dev_dbg(dev, "%s[%d] : rsnd_mod_call error %d\n", \
+- rsnd_mod_name(mod), rsnd_mod_id(mod), ret); \
+- ret; \
+-})
+-
+ static enum rsnd_mod_type rsnd_mod_sequence[][RSND_MOD_MAX] = {
+ {
+ /* CAPTURE */
+@@ -432,19 +405,49 @@ static enum rsnd_mod_type rsnd_mod_seque
+ },
+ };
+
+-#define rsnd_dai_call(fn, io, param...) \
+-({ \
+- struct rsnd_mod *mod; \
+- int type, is_play = rsnd_io_is_play(io); \
+- int ret = 0, i; \
+- for (i = 0; i < RSND_MOD_MAX; i++) { \
+- type = rsnd_mod_sequence[is_play][i]; \
+- mod = (io)->mod[type]; \
+- if (!mod) \
+- continue; \
+- ret |= rsnd_mod_call(type, io, fn, param); \
+- } \
+- ret; \
++static int rsnd_status_update(u32 *status,
++ int shift, int add, int timing)
++{
++ u32 mask = 0xF << shift;
++ u8 val = (*status >> shift) & 0xF;
++ u8 next_val = (val + add) & 0xF;
++ int func_call = (val == timing);
++
++ if (next_val == 0xF) /* underflow case */
++ func_call = 0;
++ else
++ *status = (*status & ~mask) + (next_val << shift);
++
++ return func_call;
++}
++
++#define rsnd_dai_call(fn, io, param...) \
++({ \
++ struct rsnd_priv *priv = rsnd_io_to_priv(io); \
++ struct device *dev = rsnd_priv_to_dev(priv); \
++ struct rsnd_mod *mod; \
++ int is_play = rsnd_io_is_play(io); \
++ int ret = 0, i; \
++ enum rsnd_mod_type *types = rsnd_mod_sequence[is_play]; \
++ for_each_rsnd_mod_arrays(i, mod, io, types, RSND_MOD_MAX) { \
++ int tmp = 0; \
++ u32 *status = mod->get_status(io, mod, types[i]); \
++ int func_call = rsnd_status_update(status, \
++ __rsnd_mod_shift_##fn, \
++ __rsnd_mod_add_##fn, \
++ __rsnd_mod_call_##fn); \
++ dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \
++ rsnd_mod_name(mod), rsnd_mod_id(mod), *status, \
++ (func_call && (mod)->ops->fn) ? #fn : ""); \
++ if (func_call && (mod)->ops->fn) \
++ tmp = (mod)->ops->fn(mod, io, param); \
++ if (tmp) \
++ dev_err(dev, "%s[%d] : %s error %d\n", \
++ rsnd_mod_name(mod), rsnd_mod_id(mod), \
++ #fn, tmp); \
++ ret |= tmp; \
++ } \
++ ret; \
+ })
+
+ int rsnd_dai_connect(struct rsnd_mod *mod,
diff --git a/patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch b/patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch
new file mode 100644
index 0000000..59dca46
--- /dev/null
+++ b/patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch
@@ -0,0 +1,37 @@
+From 2a58bd93bdc4b3f8fc7b4409ffe9a10022c74959 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 19 Oct 2016 03:57:27 +0000
+Subject: [PATCH 064/299] ASoC: rsnd: use for_each_rsnd_mod_xxx() on
+ rsnd_rdai_continuance_probe()
+
+Now, we have for_each_rsnd_mod(), let's use it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 9b87bfb2e8e1bbd685489a84f4841250cab493ca)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1122,6 +1122,7 @@ static int rsnd_rdai_continuance_probe(s
+ ret = rsnd_dai_call(probe, io, priv);
+ if (ret == -EAGAIN) {
+ struct rsnd_mod *ssi_mod = rsnd_io_to_mod_ssi(io);
++ struct rsnd_mod *mod;
+ int i;
+
+ /*
+@@ -1141,8 +1142,8 @@ static int rsnd_rdai_continuance_probe(s
+ * remove all mod from io
+ * and, re connect ssi
+ */
+- for (i = 0; i < RSND_MOD_MAX; i++)
+- rsnd_dai_disconnect((io)->mod[i], io, i);
++ for_each_rsnd_mod(i, mod, io)
++ rsnd_dai_disconnect(mod, io, i);
+ rsnd_dai_connect(ssi_mod, io, RSND_MOD_SSI);
+
+ /*
diff --git a/patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch b/patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch
new file mode 100644
index 0000000..e610a5e
--- /dev/null
+++ b/patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch
@@ -0,0 +1,95 @@
+From e17b54ca44ed8721c3205d42d987c2b962f03b96 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 19 Oct 2016 03:57:47 +0000
+Subject: [PATCH 065/299] ASoC: rsnd: add rsnd_parse_of_node() and integrate
+ rsnd_xxx_of_node
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit be78cea151afe1fc9d880bf2a3db0bd2deb8c62a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/rsnd.h | 30 ++++++++++++++++++------------
+ 1 file changed, 18 insertions(+), 12 deletions(-)
+
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -377,6 +377,18 @@ int rsnd_runtime_is_ssi_multi(struct rsn
+ int rsnd_runtime_is_ssi_tdm(struct rsnd_dai_stream *io);
+
+ /*
++ * DT
++ */
++#define rsnd_parse_of_node(priv, node) \
++ of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, node)
++#define RSND_NODE_DAI "rcar_sound,dai"
++#define RSND_NODE_SSI "rcar_sound,ssi"
++#define RSND_NODE_SRC "rcar_sound,src"
++#define RSND_NODE_CTU "rcar_sound,ctu"
++#define RSND_NODE_MIX "rcar_sound,mix"
++#define RSND_NODE_DVC "rcar_sound,dvc"
++
++/*
+ * R-Car sound DAI
+ */
+ #define RSND_DAI_NAME_SIZE 16
+@@ -440,8 +452,7 @@ int rsnd_dai_pointer_offset(struct rsnd_
+ int rsnd_dai_connect(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ enum rsnd_mod_type type);
+-#define rsnd_dai_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dai")
++#define rsnd_dai_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_DAI)
+
+ /*
+ * R-Car Gen1/Gen2
+@@ -618,8 +629,7 @@ u32 rsnd_ssi_multi_slaves_runtime(struct
+ __rsnd_ssi_is_pin_sharing(rsnd_io_to_mod_ssi(io))
+ int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
+
+-#define rsnd_ssi_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ssi")
++#define rsnd_ssi_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_SSI)
+ void rsnd_parse_connect_ssi(struct rsnd_dai *rdai,
+ struct device_node *playback,
+ struct device_node *capture);
+@@ -645,8 +655,7 @@ unsigned int rsnd_src_get_rate(struct rs
+ struct rsnd_dai_stream *io,
+ int is_in);
+
+-#define rsnd_src_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,src")
++#define rsnd_src_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_SRC)
+ #define rsnd_parse_connect_src(rdai, playback, capture) \
+ rsnd_parse_connect_common(rdai, rsnd_src_mod_get, \
+ rsnd_src_of_node(rsnd_rdai_to_priv(rdai)), \
+@@ -659,8 +668,7 @@ int rsnd_ctu_probe(struct rsnd_priv *pri
+ void rsnd_ctu_remove(struct rsnd_priv *priv);
+ int rsnd_ctu_converted_channel(struct rsnd_mod *mod);
+ struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id);
+-#define rsnd_ctu_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ctu")
++#define rsnd_ctu_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_CTU)
+ #define rsnd_parse_connect_ctu(rdai, playback, capture) \
+ rsnd_parse_connect_common(rdai, rsnd_ctu_mod_get, \
+ rsnd_ctu_of_node(rsnd_rdai_to_priv(rdai)), \
+@@ -672,8 +680,7 @@ struct rsnd_mod *rsnd_ctu_mod_get(struct
+ int rsnd_mix_probe(struct rsnd_priv *priv);
+ void rsnd_mix_remove(struct rsnd_priv *priv);
+ struct rsnd_mod *rsnd_mix_mod_get(struct rsnd_priv *priv, int id);
+-#define rsnd_mix_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,mix")
++#define rsnd_mix_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_MIX)
+ #define rsnd_parse_connect_mix(rdai, playback, capture) \
+ rsnd_parse_connect_common(rdai, rsnd_mix_mod_get, \
+ rsnd_mix_of_node(rsnd_rdai_to_priv(rdai)), \
+@@ -685,8 +692,7 @@ struct rsnd_mod *rsnd_mix_mod_get(struct
+ int rsnd_dvc_probe(struct rsnd_priv *priv);
+ void rsnd_dvc_remove(struct rsnd_priv *priv);
+ struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id);
+-#define rsnd_dvc_of_node(priv) \
+- of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,dvc")
++#define rsnd_dvc_of_node(priv) rsnd_parse_of_node(priv, RSND_NODE_DVC)
+ #define rsnd_parse_connect_dvc(rdai, playback, capture) \
+ rsnd_parse_connect_common(rdai, rsnd_dvc_mod_get, \
+ rsnd_dvc_of_node(rsnd_rdai_to_priv(rdai)), \
diff --git a/patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch b/patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch
new file mode 100644
index 0000000..b4d26e9
--- /dev/null
+++ b/patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch
@@ -0,0 +1,127 @@
+From a85c278b4e9951247432b3e32e4681298248c18d Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 25 Oct 2016 00:36:13 +0000
+Subject: [PATCH 066/299] ASoC: rsnd: remove non DT support for DMA
+
+Current Renesas Sound driver is based on DeviceTree, and no one is
+using this driver from non DT. Non-DT support is no longer needed.
+Let's remove it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b99305d20122174c9fd0469bae036f0c401999b5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/dma.c | 21 ++++++---------------
+ sound/soc/sh/rcar/rsnd.h | 2 +-
+ sound/soc/sh/rcar/src.c | 2 +-
+ sound/soc/sh/rcar/ssi.c | 3 +--
+ 4 files changed, 9 insertions(+), 19 deletions(-)
+
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -191,7 +191,7 @@ static int rsnd_dmaen_remove(struct rsnd
+ }
+
+ static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
+- struct rsnd_dma *dma, int id,
++ struct rsnd_dma *dma,
+ struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
+ {
+ struct rsnd_mod *mod = rsnd_mod_get(dma);
+@@ -208,17 +208,8 @@ static int rsnd_dmaen_attach(struct rsnd
+ return -EIO;
+ }
+
+- if (dev->of_node) {
+- dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
+- } else {
+- dma_cap_mask_t mask;
+-
+- dma_cap_zero(mask);
+- dma_cap_set(DMA_SLAVE, mask);
++ dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
+
+- dmaen->chan = dma_request_channel(mask, shdma_chan_filter,
+- (void *)(uintptr_t)id);
+- }
+ if (IS_ERR_OR_NULL(dmaen->chan)) {
+ dmaen->chan = NULL;
+ dev_err(dev, "can't get dma channel\n");
+@@ -394,7 +385,7 @@ static int rsnd_dmapp_start(struct rsnd_
+ }
+
+ static int rsnd_dmapp_attach(struct rsnd_dai_stream *io,
+- struct rsnd_dma *dma, int id,
++ struct rsnd_dma *dma,
+ struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
+ {
+ struct rsnd_dmapp *dmapp = rsnd_dma_to_dmapp(dma);
+@@ -627,7 +618,7 @@ static void rsnd_dma_of_path(struct rsnd
+ }
+
+ int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod,
+- struct rsnd_mod **dma_mod, int id)
++ struct rsnd_mod **dma_mod)
+ {
+ struct rsnd_mod *mod_from = NULL;
+ struct rsnd_mod *mod_to = NULL;
+@@ -636,7 +627,7 @@ int rsnd_dma_attach(struct rsnd_dai_stre
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct rsnd_mod_ops *ops;
+ enum rsnd_mod_type type;
+- int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma, int id,
++ int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma,
+ struct rsnd_mod *mod_from, struct rsnd_mod *mod_to);
+ int is_play = rsnd_io_is_play(io);
+ int ret, dma_id;
+@@ -695,7 +686,7 @@ int rsnd_dma_attach(struct rsnd_dai_stre
+ rsnd_mod_name(mod_from), rsnd_mod_id(mod_from),
+ rsnd_mod_name(mod_to), rsnd_mod_id(mod_to));
+
+- ret = attach(io, dma, id, mod_from, mod_to);
++ ret = attach(io, dma, mod_from, mod_to);
+ if (ret < 0)
+ return ret;
+ }
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -199,7 +199,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
+ * R-Car DMA
+ */
+ int rsnd_dma_attach(struct rsnd_dai_stream *io,
+- struct rsnd_mod *mod, struct rsnd_mod **dma_mod, int id);
++ struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
+ void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
+ int rsnd_dma_probe(struct rsnd_priv *priv);
+ struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -475,7 +475,7 @@ static int rsnd_src_probe_(struct rsnd_m
+ return ret;
+ }
+
+- ret = rsnd_dma_attach(io, mod, &src->dma, 0);
++ ret = rsnd_dma_attach(io, mod, &src->dma);
+
+ return ret;
+ }
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -669,7 +669,6 @@ static int rsnd_ssi_dma_probe(struct rsn
+ struct rsnd_priv *priv)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+- int dma_id = 0; /* not needed */
+ int ret;
+
+ /*
+@@ -684,7 +683,7 @@ static int rsnd_ssi_dma_probe(struct rsn
+ return ret;
+
+ /* SSI probe might be called many times in MUX multi path */
+- ret = rsnd_dma_attach(io, mod, &ssi->dma, dma_id);
++ ret = rsnd_dma_attach(io, mod, &ssi->dma);
+
+ return ret;
+ }
diff --git a/patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch b/patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch
new file mode 100644
index 0000000..2d1d64b
--- /dev/null
+++ b/patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch
@@ -0,0 +1,53 @@
+From bc1972c09bdc2bf1992bb1377c41d9ed745c8060 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 25 Oct 2016 00:36:34 +0000
+Subject: [PATCH 067/299] ASoC: rsnd: don't use devm_request_irq() for SSI
+
+SSI will use DMA mode, and migh be fallback to PIO mode.
+Using devm_request_irq() makes its operation more complex when
+it fallbacks to PIO mode.
+Let's use manual request_irq()/free_irq()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 701172dca15ba9860ba73d3e18082fbd2a78f2c9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/ssi.c | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -644,10 +644,14 @@ static int rsnd_ssi_common_probe(struct
+ if (ret < 0)
+ return ret;
+
+- ret = devm_request_irq(dev, ssi->irq,
+- rsnd_ssi_interrupt,
+- IRQF_SHARED,
+- dev_name(dev), mod);
++ /*
++ * SSI might be called again as PIO fallback
++ * It is easy to manual handling for IRQ request/free
++ */
++ ret = request_irq(ssi->irq,
++ rsnd_ssi_interrupt,
++ IRQF_SHARED,
++ dev_name(dev), mod);
+
+ return ret;
+ }
+@@ -693,12 +697,9 @@ static int rsnd_ssi_dma_remove(struct rs
+ struct rsnd_priv *priv)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+- struct device *dev = rsnd_priv_to_dev(priv);
+- int irq = ssi->irq;
+
+ /* PIO will request IRQ again */
+- if (ssi->dma)
+- devm_free_irq(dev, irq, mod);
++ free_irq(ssi->irq, mod);
+
+ rsnd_dma_detach(mod, &ssi->dma);
+
diff --git a/patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch b/patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch
new file mode 100644
index 0000000..4ffb598
--- /dev/null
+++ b/patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch
@@ -0,0 +1,60 @@
+From d3b13a06606ac181ba3a6dc353fa2ac0ee77c1e5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 25 Oct 2016 00:36:56 +0000
+Subject: [PATCH 068/299] ASoC: rsnd: remove rsnd_dma_detach()
+
+DMA mod is now connected to stream via rsnd_dai_connect().
+This means DMA mod can use .remove for its clearance.
+rsnd_dma_detach() is no longer needed.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit dae4b83295ae50a86b5e3c60e7b6e2c597a1b69d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/dma.c | 11 -----------
+ sound/soc/sh/rcar/rsnd.h | 1 -
+ sound/soc/sh/rcar/ssi.c | 2 --
+ 3 files changed, 14 deletions(-)
+
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -698,17 +698,6 @@ int rsnd_dma_attach(struct rsnd_dai_stre
+ return 0;
+ }
+
+-void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod)
+-{
+- if (*dma_mod) {
+- struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+- struct device *dev = rsnd_priv_to_dev(priv);
+-
+- devm_kfree(dev, *dma_mod);
+- *dma_mod = NULL;
+- }
+-}
+-
+ int rsnd_dma_probe(struct rsnd_priv *priv)
+ {
+ struct platform_device *pdev = rsnd_priv_to_pdev(priv);
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -200,7 +200,6 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
+ */
+ int rsnd_dma_attach(struct rsnd_dai_stream *io,
+ struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
+-void rsnd_dma_detach(struct rsnd_mod *mod, struct rsnd_mod **dma_mod);
+ int rsnd_dma_probe(struct rsnd_priv *priv);
+ struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
+ struct rsnd_mod *mod, char *name);
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -701,8 +701,6 @@ static int rsnd_ssi_dma_remove(struct rs
+ /* PIO will request IRQ again */
+ free_irq(ssi->irq, mod);
+
+- rsnd_dma_detach(mod, &ssi->dma);
+-
+ return 0;
+ }
+
diff --git a/patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch b/patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch
new file mode 100644
index 0000000..6ff04c3
--- /dev/null
+++ b/patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch
@@ -0,0 +1,44 @@
+From 97b9ed9c7f4f26b2dcf51e84e3533215175cb2cd Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 25 Oct 2016 00:37:18 +0000
+Subject: [PATCH 069/299] ASoC: rsnd: don't call unneeded of_node_put() on
+ dma.c
+
+Current rsnd_dmaen_start() is calling of_node_put() for np,
+but it is not needed if it goes through this loop.
+This patch tidyup it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 161ba1f1a5c99c4525eb39cc71ec984e0a39e6d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/dma.c | 10 ++++------
+ 1 file changed, 4 insertions(+), 6 deletions(-)
+
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -143,19 +143,17 @@ static int rsnd_dmaen_start(struct rsnd_
+ struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node,
+ struct rsnd_mod *mod, char *name)
+ {
+- struct dma_chan *chan;
++ struct dma_chan *chan = NULL;
+ struct device_node *np;
+ int i = 0;
+
+ for_each_child_of_node(of_node, np) {
+- if (i == rsnd_mod_id(mod))
+- break;
++ if (i == rsnd_mod_id(mod) && (!chan))
++ chan = of_dma_request_slave_channel(np, name);
+ i++;
+ }
+
+- chan = of_dma_request_slave_channel(np, name);
+-
+- of_node_put(np);
++ /* It should call of_node_put(), since, it is rsnd_xxx_of_node() */
+ of_node_put(of_node);
+
+ return chan;
diff --git a/patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch b/patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch
new file mode 100644
index 0000000..a84e19d
--- /dev/null
+++ b/patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch
@@ -0,0 +1,115 @@
+From d57fe0fdd88d7e8b51a6b855e4edc290064c542b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 25 Oct 2016 00:37:35 +0000
+Subject: [PATCH 070/299] ASoC: rsnd: add nolock_start/stop callback
+
+Current Renesas Sound driver requests DMA channel when .probe timing,
+and release it when .remove timing. And use DMA on .start/.stop
+But, Audio DMAC power ON was handled when request timing (= .probe),
+and power OFF was when release timing (= .remove).
+This means Audio DMAC power is always ON during driver was enabled.
+To fixup this issue, it should request/release DMA channel on each
+playback/recorde timing.
+But, DMA channel request/release function uses mutex lock inside.
+This means it will breaks current spinlock's interrupt protect.
+To solve this issue, DMA channel request/release function needs to
+be called from non-spinlock area. This patch adds its callback.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 10a9cca13220888c20a259abbd42ea117cddfdb0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 26 ++++++++++++++++++++++++++
+ sound/soc/sh/rcar/rsnd.h | 15 ++++++++++++++-
+ 2 files changed, 40 insertions(+), 1 deletion(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -716,7 +716,33 @@ static int rsnd_soc_set_dai_tdm_slot(str
+ return 0;
+ }
+
++static int rsnd_soc_dai_startup(struct snd_pcm_substream *substream,
++ struct snd_soc_dai *dai)
++{
++ struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
++ struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
++
++ /*
++ * call rsnd_dai_call without spinlock
++ */
++ return rsnd_dai_call(nolock_start, io, priv);
++}
++
++static void rsnd_soc_dai_shutdown(struct snd_pcm_substream *substream,
++ struct snd_soc_dai *dai)
++{
++ struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
++ struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
++
++ /*
++ * call rsnd_dai_call without spinlock
++ */
++ rsnd_dai_call(nolock_stop, io, priv);
++}
++
+ static const struct snd_soc_dai_ops rsnd_soc_dai_ops = {
++ .startup = rsnd_soc_dai_startup,
++ .shutdown = rsnd_soc_dai_shutdown,
+ .trigger = rsnd_soc_dai_trigger,
+ .set_fmt = rsnd_soc_dai_set_fmt,
+ .set_tdm_slot = rsnd_soc_set_dai_tdm_slot,
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -259,6 +259,12 @@ struct rsnd_mod_ops {
+ int (*fallback)(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv);
++ int (*nolock_start)(struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io,
++ struct rsnd_priv *priv);
++ int (*nolock_stop)(struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io,
++ struct rsnd_priv *priv);
+ };
+
+ struct rsnd_dai_stream;
+@@ -276,8 +282,9 @@ struct rsnd_mod {
+ /*
+ * status
+ *
+- * 0xH0000CB0
++ * 0xH0000CBA
+ *
++ * A 0: nolock_start 1: nolock_stop
+ * B 0: init 1: quit
+ * C 0: start 1: stop
+ *
+@@ -287,6 +294,8 @@ struct rsnd_mod {
+ * H 0: fallback
+ * H 0: hw_params
+ */
++#define __rsnd_mod_shift_nolock_start 0
++#define __rsnd_mod_shift_nolock_stop 0
+ #define __rsnd_mod_shift_init 4
+ #define __rsnd_mod_shift_quit 4
+ #define __rsnd_mod_shift_start 8
+@@ -300,6 +309,8 @@ struct rsnd_mod {
+
+ #define __rsnd_mod_add_probe 0
+ #define __rsnd_mod_add_remove 0
++#define __rsnd_mod_add_nolock_start 1
++#define __rsnd_mod_add_nolock_stop -1
+ #define __rsnd_mod_add_init 1
+ #define __rsnd_mod_add_quit -1
+ #define __rsnd_mod_add_start 1
+@@ -319,6 +330,8 @@ struct rsnd_mod {
+ #define __rsnd_mod_call_pcm_new 0
+ #define __rsnd_mod_call_fallback 0
+ #define __rsnd_mod_call_hw_params 0
++#define __rsnd_mod_call_nolock_start 0
++#define __rsnd_mod_call_nolock_stop 1
+
+ #define rsnd_mod_to_priv(mod) ((mod)->priv)
+ #define rsnd_mod_id(mod) ((mod) ? (mod)->id : -1)
diff --git a/patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch b/patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch
new file mode 100644
index 0000000..1f75026
--- /dev/null
+++ b/patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch
@@ -0,0 +1,115 @@
+From 3e7430c526cba102f076a0d69811f91611105f1b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 26 Oct 2016 04:27:22 +0000
+Subject: [PATCH 071/299] ASoC: rsnd: remove "Gen2 only" comment
+
+Gen1 support had been removed. "Gen2 only" comment is
+no longer needed.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit f0b20e7120849ea68b2d7f0ec36ea45643265b09)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/rsnd.h | 62 +++++++++++++++++++++++------------------------
+ 1 file changed, 31 insertions(+), 31 deletions(-)
+
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -44,16 +44,16 @@
+ */
+ enum rsnd_reg {
+ /* SCU (SRC/SSIU/MIX/CTU/DVC) */
+- RSND_REG_SSI_MODE, /* Gen2 only */
++ RSND_REG_SSI_MODE,
+ RSND_REG_SSI_MODE0,
+ RSND_REG_SSI_MODE1,
+ RSND_REG_SSI_MODE2,
+ RSND_REG_SSI_CONTROL,
+- RSND_REG_SSI_CTRL, /* Gen2 only */
+- RSND_REG_SSI_BUSIF_MODE, /* Gen2 only */
+- RSND_REG_SSI_BUSIF_ADINR, /* Gen2 only */
+- RSND_REG_SSI_BUSIF_DALIGN, /* Gen2 only */
+- RSND_REG_SSI_INT_ENABLE, /* Gen2 only */
++ RSND_REG_SSI_CTRL,
++ RSND_REG_SSI_BUSIF_MODE,
++ RSND_REG_SSI_BUSIF_ADINR,
++ RSND_REG_SSI_BUSIF_DALIGN,
++ RSND_REG_SSI_INT_ENABLE,
+ RSND_REG_SRC_I_BUSIF_MODE,
+ RSND_REG_SRC_O_BUSIF_MODE,
+ RSND_REG_SRC_ROUTE_MODE0,
+@@ -63,29 +63,29 @@ enum rsnd_reg {
+ RSND_REG_SRC_IFSCR,
+ RSND_REG_SRC_IFSVR,
+ RSND_REG_SRC_SRCCR,
+- RSND_REG_SRC_CTRL, /* Gen2 only */
+- RSND_REG_SRC_BSDSR, /* Gen2 only */
+- RSND_REG_SRC_BSISR, /* Gen2 only */
+- RSND_REG_SRC_INT_ENABLE0, /* Gen2 only */
+- RSND_REG_SRC_BUSIF_DALIGN, /* Gen2 only */
+- RSND_REG_SRCIN_TIMSEL0, /* Gen2 only */
+- RSND_REG_SRCIN_TIMSEL1, /* Gen2 only */
+- RSND_REG_SRCIN_TIMSEL2, /* Gen2 only */
+- RSND_REG_SRCIN_TIMSEL3, /* Gen2 only */
+- RSND_REG_SRCIN_TIMSEL4, /* Gen2 only */
+- RSND_REG_SRCOUT_TIMSEL0, /* Gen2 only */
+- RSND_REG_SRCOUT_TIMSEL1, /* Gen2 only */
+- RSND_REG_SRCOUT_TIMSEL2, /* Gen2 only */
+- RSND_REG_SRCOUT_TIMSEL3, /* Gen2 only */
+- RSND_REG_SRCOUT_TIMSEL4, /* Gen2 only */
++ RSND_REG_SRC_CTRL,
++ RSND_REG_SRC_BSDSR,
++ RSND_REG_SRC_BSISR,
++ RSND_REG_SRC_INT_ENABLE0,
++ RSND_REG_SRC_BUSIF_DALIGN,
++ RSND_REG_SRCIN_TIMSEL0,
++ RSND_REG_SRCIN_TIMSEL1,
++ RSND_REG_SRCIN_TIMSEL2,
++ RSND_REG_SRCIN_TIMSEL3,
++ RSND_REG_SRCIN_TIMSEL4,
++ RSND_REG_SRCOUT_TIMSEL0,
++ RSND_REG_SRCOUT_TIMSEL1,
++ RSND_REG_SRCOUT_TIMSEL2,
++ RSND_REG_SRCOUT_TIMSEL3,
++ RSND_REG_SRCOUT_TIMSEL4,
+ RSND_REG_SCU_SYS_STATUS0,
+- RSND_REG_SCU_SYS_STATUS1, /* Gen2 only */
++ RSND_REG_SCU_SYS_STATUS1,
+ RSND_REG_SCU_SYS_INT_EN0,
+- RSND_REG_SCU_SYS_INT_EN1, /* Gen2 only */
+- RSND_REG_CMD_CTRL, /* Gen2 only */
+- RSND_REG_CMD_BUSIF_DALIGN, /* Gen2 only */
++ RSND_REG_SCU_SYS_INT_EN1,
++ RSND_REG_CMD_CTRL,
++ RSND_REG_CMD_BUSIF_DALIGN,
+ RSND_REG_CMD_ROUTE_SLCT,
+- RSND_REG_CMDOUT_TIMSEL, /* Gen2 only */
++ RSND_REG_CMDOUT_TIMSEL,
+ RSND_REG_CTU_SWRSR,
+ RSND_REG_CTU_CTUIR,
+ RSND_REG_CTU_ADINR,
+@@ -147,18 +147,18 @@ enum rsnd_reg {
+ RSND_REG_DVC_VOL6R,
+ RSND_REG_DVC_VOL7R,
+ RSND_REG_DVC_DVUER,
+- RSND_REG_DVC_VRCTR, /* Gen2 only */
+- RSND_REG_DVC_VRPDR, /* Gen2 only */
+- RSND_REG_DVC_VRDBR, /* Gen2 only */
++ RSND_REG_DVC_VRCTR,
++ RSND_REG_DVC_VRPDR,
++ RSND_REG_DVC_VRDBR,
+
+ /* ADG */
+ RSND_REG_BRRA,
+ RSND_REG_BRRB,
+ RSND_REG_SSICKR,
+- RSND_REG_DIV_EN, /* Gen2 only */
++ RSND_REG_DIV_EN,
+ RSND_REG_AUDIO_CLK_SEL0,
+ RSND_REG_AUDIO_CLK_SEL1,
+- RSND_REG_AUDIO_CLK_SEL2, /* Gen2 only */
++ RSND_REG_AUDIO_CLK_SEL2,
+
+ /* SSI */
+ RSND_REG_SSICR,
diff --git a/patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch b/patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch
new file mode 100644
index 0000000..4832a69
--- /dev/null
+++ b/patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch
@@ -0,0 +1,58 @@
+From 168d2cdb51e9d3593fd17530bb4713ab949cd665 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 26 Oct 2016 04:28:06 +0000
+Subject: [PATCH 072/299] ASoC: rsnd: rsnd_reg cleanup for SSIU
+
+R-Car Gen1 didn't have SSIU IP, and it was part of SRU.
+In Gen2, SSIU was created and it has original register.
+Let's cleanup rsnd_reg for SSIU, because this driver
+doesn't support Gen1 SRU any more.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit bb7927c793e1036bc15f67a8fd10e803f56c6760)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/rsnd.h | 24 +++++++++++++-----------
+ 1 file changed, 13 insertions(+), 11 deletions(-)
+
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -43,17 +43,7 @@
+ * see gen1/gen2 for detail
+ */
+ enum rsnd_reg {
+- /* SCU (SRC/SSIU/MIX/CTU/DVC) */
+- RSND_REG_SSI_MODE,
+- RSND_REG_SSI_MODE0,
+- RSND_REG_SSI_MODE1,
+- RSND_REG_SSI_MODE2,
+- RSND_REG_SSI_CONTROL,
+- RSND_REG_SSI_CTRL,
+- RSND_REG_SSI_BUSIF_MODE,
+- RSND_REG_SSI_BUSIF_ADINR,
+- RSND_REG_SSI_BUSIF_DALIGN,
+- RSND_REG_SSI_INT_ENABLE,
++ /* SCU (MIX/CTU/DVC) */
+ RSND_REG_SRC_I_BUSIF_MODE,
+ RSND_REG_SRC_O_BUSIF_MODE,
+ RSND_REG_SRC_ROUTE_MODE0,
+@@ -160,6 +150,18 @@ enum rsnd_reg {
+ RSND_REG_AUDIO_CLK_SEL1,
+ RSND_REG_AUDIO_CLK_SEL2,
+
++ /* SSIU */
++ RSND_REG_SSI_MODE,
++ RSND_REG_SSI_MODE0,
++ RSND_REG_SSI_MODE1,
++ RSND_REG_SSI_MODE2,
++ RSND_REG_SSI_CONTROL,
++ RSND_REG_SSI_CTRL,
++ RSND_REG_SSI_BUSIF_MODE,
++ RSND_REG_SSI_BUSIF_ADINR,
++ RSND_REG_SSI_BUSIF_DALIGN,
++ RSND_REG_SSI_INT_ENABLE,
++
+ /* SSI */
+ RSND_REG_SSICR,
+ RSND_REG_SSISR,
diff --git a/patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch b/patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch
new file mode 100644
index 0000000..b53ac94
--- /dev/null
+++ b/patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch
@@ -0,0 +1,32 @@
+From c826e5860f1df9b65db7026d7c0b33ca9aa9e0f7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 26 Oct 2016 04:28:42 +0000
+Subject: [PATCH 073/299] ASoC: rsnd: fixup SCU_SYS_STATUSx access
+
+SCU_SYS_STATUSx is the register that writing 1 initializes the bit,
+and writing 0 is ignored. So, it should use rsnd_mod_write()
+instead of rsnd_mod_bset(), otherwise all bit will be cleared.
+Thanks Shimoda-san
+
+Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 42b197e794dbe961cbcebd9e4963252c96cc77f9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/src.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -327,8 +327,8 @@ static void rsnd_src_status_clear(struct
+ {
+ u32 val = OUF_SRC(rsnd_mod_id(mod));
+
+- rsnd_mod_bset(mod, SCU_SYS_STATUS0, val, val);
+- rsnd_mod_bset(mod, SCU_SYS_STATUS1, val, val);
++ rsnd_mod_write(mod, SCU_SYS_STATUS0, val);
++ rsnd_mod_write(mod, SCU_SYS_STATUS1, val);
+ }
+
+ static bool rsnd_src_error_occurred(struct rsnd_mod *mod)
diff --git a/patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch b/patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch
new file mode 100644
index 0000000..626415f
--- /dev/null
+++ b/patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch
@@ -0,0 +1,86 @@
+From 0c73351f2adf235407319946da8d174509ccdaa1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 26 Oct 2016 04:29:21 +0000
+Subject: [PATCH 074/299] ASoC: rsnd: clear SSI_SYS_STATUSx every time
+
+Renesas sound SSIU has SSI_SYS_STATUS register whick will
+be changed if over/under run was occurred.
+Current rsnd driver is handling over/under run error on SSI/SRC,
+but doesn't on SSIU.
+HW guys can't guarantee correct behavior if it already had error bit
+on status register when it start.
+Thus, it should be cleared every start timing. This patch do it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 814efe3ed72d1cad926e21b8d0869a1ea74bb9dd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/gen.c | 8 ++++++++
+ sound/soc/sh/rcar/rsnd.h | 8 ++++++++
+ sound/soc/sh/rcar/ssiu.c | 20 ++++++++++++++++++++
+ 3 files changed, 36 insertions(+)
+
+--- a/sound/soc/sh/rcar/gen.c
++++ b/sound/soc/sh/rcar/gen.c
+@@ -211,6 +211,14 @@ static int rsnd_gen2_probe(struct rsnd_p
+ RSND_GEN_S_REG(SSI_MODE1, 0x804),
+ RSND_GEN_S_REG(SSI_MODE2, 0x808),
+ RSND_GEN_S_REG(SSI_CONTROL, 0x810),
++ RSND_GEN_S_REG(SSI_SYS_STATUS0, 0x840),
++ RSND_GEN_S_REG(SSI_SYS_STATUS1, 0x844),
++ RSND_GEN_S_REG(SSI_SYS_STATUS2, 0x848),
++ RSND_GEN_S_REG(SSI_SYS_STATUS3, 0x84c),
++ RSND_GEN_S_REG(SSI_SYS_STATUS4, 0x880),
++ RSND_GEN_S_REG(SSI_SYS_STATUS5, 0x884),
++ RSND_GEN_S_REG(SSI_SYS_STATUS6, 0x888),
++ RSND_GEN_S_REG(SSI_SYS_STATUS7, 0x88c),
+
+ /* FIXME: it needs SSI_MODE2/3 in the future */
+ RSND_GEN_M_REG(SSI_BUSIF_MODE, 0x0, 0x80),
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -161,6 +161,14 @@ enum rsnd_reg {
+ RSND_REG_SSI_BUSIF_ADINR,
+ RSND_REG_SSI_BUSIF_DALIGN,
+ RSND_REG_SSI_INT_ENABLE,
++ RSND_REG_SSI_SYS_STATUS0,
++ RSND_REG_SSI_SYS_STATUS1,
++ RSND_REG_SSI_SYS_STATUS2,
++ RSND_REG_SSI_SYS_STATUS3,
++ RSND_REG_SSI_SYS_STATUS4,
++ RSND_REG_SSI_SYS_STATUS5,
++ RSND_REG_SSI_SYS_STATUS6,
++ RSND_REG_SSI_SYS_STATUS7,
+
+ /* SSI */
+ RSND_REG_SSICR,
+--- a/sound/soc/sh/rcar/ssiu.c
++++ b/sound/soc/sh/rcar/ssiu.c
+@@ -33,6 +33,26 @@ static int rsnd_ssiu_init(struct rsnd_mo
+ u32 mask1, val1;
+ u32 mask2, val2;
+
++ /* clear status */
++ switch (id) {
++ case 0:
++ case 1:
++ case 2:
++ case 3:
++ case 4:
++ rsnd_mod_write(mod, SSI_SYS_STATUS0, 0xf << (id * 4));
++ rsnd_mod_write(mod, SSI_SYS_STATUS2, 0xf << (id * 4));
++ rsnd_mod_write(mod, SSI_SYS_STATUS4, 0xf << (id * 4));
++ rsnd_mod_write(mod, SSI_SYS_STATUS6, 0xf << (id * 4));
++ break;
++ case 9:
++ rsnd_mod_write(mod, SSI_SYS_STATUS1, 0xf << 4);
++ rsnd_mod_write(mod, SSI_SYS_STATUS3, 0xf << 4);
++ rsnd_mod_write(mod, SSI_SYS_STATUS5, 0xf << 4);
++ rsnd_mod_write(mod, SSI_SYS_STATUS7, 0xf << 4);
++ break;
++ }
++
+ /*
+ * SSI_MODE0
+ */
diff --git a/patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch b/patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch
new file mode 100644
index 0000000..7bb6ea5
--- /dev/null
+++ b/patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch
@@ -0,0 +1,57 @@
+From 55834deb6e4694353aa7c2b8dc6abb6549acabfd Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 27 Oct 2016 01:05:21 +0000
+Subject: [PATCH 075/299] ASoC: rsnd: enable SRC sync even FIN = FOUT
+
+Current SRC (= Sampling Rate Converter) is supporting
+SYNC mode and ASYNC mode. Current src.c cares SRC if FIN != FOUT.
+Here, SYNC mode will be used for tweak, so it will be used
+even FIN = FOUT. This patch enables SRC sync in such situation
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Tested-by: Yuichi Takagi <yuichi.takagi.uh@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 67923f779b8d9d210c5ec98ffb68d9fe5a68df18)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/src.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -189,6 +189,7 @@ static void rsnd_src_set_convert_rate(st
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
++ int use_src = 0;
+ u32 fin, fout;
+ u32 ifscr, fsrate, adinr;
+ u32 cr, route;
+@@ -214,6 +215,8 @@ static void rsnd_src_set_convert_rate(st
+ return;
+ }
+
++ use_src = (fin != fout) | rsnd_src_sync_is_enabled(mod);
++
+ /*
+ * SRC_ADINR
+ */
+@@ -225,7 +228,7 @@ static void rsnd_src_set_convert_rate(st
+ */
+ ifscr = 0;
+ fsrate = 0;
+- if (fin != fout) {
++ if (use_src) {
+ u64 n;
+
+ ifscr = 1;
+@@ -239,7 +242,7 @@ static void rsnd_src_set_convert_rate(st
+ */
+ cr = 0x00011110;
+ route = 0x0;
+- if (fin != fout) {
++ if (use_src) {
+ route = 0x1;
+
+ if (rsnd_src_sync_is_enabled(mod)) {
diff --git a/patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch b/patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch
new file mode 100644
index 0000000..8f44a0b
--- /dev/null
+++ b/patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch
@@ -0,0 +1,77 @@
+From 1bc6edeffbd22ba3c61231b68d4f6f4c0100ef78 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 28 Oct 2016 04:12:40 +0000
+Subject: [PATCH 076/299] ASoC: rsnd: use BRGCKR instead of SSICKR
+
+Current register name of "SSICKR" was came from R-Car Gen1
+which is very old style. It is called as "BRGCKR" on R-Car Gen2/Gen3.
+Let's rename it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 3e58690b8dbddefb4422295b57a6f214e8aa03fd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/adg.c | 6 +++---
+ sound/soc/sh/rcar/gen.c | 4 ++--
+ sound/soc/sh/rcar/rsnd.h | 2 +-
+ 3 files changed, 6 insertions(+), 6 deletions(-)
+
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -366,7 +366,7 @@ found_clock:
+ if (0 == (rate % 8000))
+ ckr = 0x80000000;
+
+- rsnd_mod_bset(adg_mod, SSICKR, 0x80000000, ckr);
++ rsnd_mod_bset(adg_mod, BRGCKR, 0x80000000, ckr);
+ }
+
+ dev_dbg(dev, "ADG: %s[%d] selects 0x%x for %d\n",
+@@ -532,13 +532,13 @@ static void rsnd_adg_get_clkout(struct r
+ }
+ }
+
+- rsnd_mod_bset(adg_mod, SSICKR, 0x80FF0000, ckr);
++ rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, ckr);
+ rsnd_mod_write(adg_mod, BRRA, rbga);
+ rsnd_mod_write(adg_mod, BRRB, rbgb);
+
+ for_each_rsnd_clkout(clk, adg, i)
+ dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
+- dev_dbg(dev, "SSICKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
++ dev_dbg(dev, "BRGCKR = 0x%08x, BRRA/BRRB = 0x%x/0x%x\n",
+ ckr, rbga, rbgb);
+ }
+
+--- a/sound/soc/sh/rcar/gen.c
++++ b/sound/soc/sh/rcar/gen.c
+@@ -319,7 +319,7 @@ static int rsnd_gen2_probe(struct rsnd_p
+ static const struct rsnd_regmap_field_conf conf_adg[] = {
+ RSND_GEN_S_REG(BRRA, 0x00),
+ RSND_GEN_S_REG(BRRB, 0x04),
+- RSND_GEN_S_REG(SSICKR, 0x08),
++ RSND_GEN_S_REG(BRGCKR, 0x08),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL2, 0x14),
+@@ -370,7 +370,7 @@ static int rsnd_gen1_probe(struct rsnd_p
+ static const struct rsnd_regmap_field_conf conf_adg[] = {
+ RSND_GEN_S_REG(BRRA, 0x00),
+ RSND_GEN_S_REG(BRRB, 0x04),
+- RSND_GEN_S_REG(SSICKR, 0x08),
++ RSND_GEN_S_REG(BRGCKR, 0x08),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c),
+ RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10),
+ };
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -144,7 +144,7 @@ enum rsnd_reg {
+ /* ADG */
+ RSND_REG_BRRA,
+ RSND_REG_BRRB,
+- RSND_REG_SSICKR,
++ RSND_REG_BRGCKR,
+ RSND_REG_DIV_EN,
+ RSND_REG_AUDIO_CLK_SEL0,
+ RSND_REG_AUDIO_CLK_SEL1,
diff --git a/patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch b/patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch
new file mode 100644
index 0000000..c43771c
--- /dev/null
+++ b/patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch
@@ -0,0 +1,276 @@
+From ed7e63c420402c420cbc0b7e68fafa39ce857087 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 14 Nov 2016 04:20:40 +0000
+Subject: [PATCH 077/299] ASoC: rsnd: Request/Release DMA channel each time
+
+Current Renesas Sound driver requests DMA channel when .probe timing,
+and release it when .remove timing. And use DMA on .start/.stop
+But, Audio DMAC power ON was handled when request timing (= .probe),
+and power OFF was when release timing (= .remove).
+This means Audio DMAC power is always ON during driver was enabled.
+The best choice to solve this issue is that DMAEngine side handle
+this. But current DMAEngine API design can't solve atmic/non-atmic
+context issue for power ON/OFF. So next better choice is sound
+driver request/release DMA channel each time. This patch do it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit edce5c496c6af3e5ca6e1bb18f7cf4f6ef6226fa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/dma.c | 182 +++++++++++++++++++++++++++---------------------
+ 1 file changed, 106 insertions(+), 76 deletions(-)
+
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -34,6 +34,8 @@ struct rsnd_dmapp {
+
+ struct rsnd_dma {
+ struct rsnd_mod mod;
++ struct rsnd_mod *mod_from;
++ struct rsnd_mod *mod_to;
+ dma_addr_t src_addr;
+ dma_addr_t dst_addr;
+ union {
+@@ -92,6 +94,20 @@ static void rsnd_dmaen_complete(void *da
+ rsnd_mod_interrupt(mod, __rsnd_dmaen_complete);
+ }
+
++static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io,
++ struct rsnd_mod *mod_from,
++ struct rsnd_mod *mod_to)
++{
++ if ((!mod_from && !mod_to) ||
++ (mod_from && mod_to))
++ return NULL;
++
++ if (mod_from)
++ return rsnd_mod_dma_req(io, mod_from);
++ else
++ return rsnd_mod_dma_req(io, mod_to);
++}
++
+ static int rsnd_dmaen_stop(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+ struct rsnd_priv *priv)
+@@ -99,7 +115,61 @@ static int rsnd_dmaen_stop(struct rsnd_m
+ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+
+- dmaengine_terminate_all(dmaen->chan);
++ if (dmaen->chan) {
++ dmaengine_terminate_all(dmaen->chan);
++ }
++
++ return 0;
++}
++
++static int rsnd_dmaen_nolock_stop(struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io,
++ struct rsnd_priv *priv)
++{
++ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
++ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
++
++ /*
++ * DMAEngine release uses mutex lock.
++ * Thus, it shouldn't be called under spinlock.
++ * Let's call it under nolock_start
++ */
++ if (dmaen->chan)
++ dma_release_channel(dmaen->chan);
++
++ dmaen->chan = NULL;
++
++ return 0;
++}
++
++static int rsnd_dmaen_nolock_start(struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io,
++ struct rsnd_priv *priv)
++{
++ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
++ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
++ struct device *dev = rsnd_priv_to_dev(priv);
++
++ if (dmaen->chan) {
++ dev_err(dev, "it already has dma channel\n");
++ return -EIO;
++ }
++
++ /*
++ * DMAEngine request uses mutex lock.
++ * Thus, it shouldn't be called under spinlock.
++ * Let's call it under nolock_start
++ */
++ dmaen->chan = rsnd_dmaen_request_channel(io,
++ dma->mod_from,
++ dma->mod_to);
++ if (IS_ERR_OR_NULL(dmaen->chan)) {
++ int ret = PTR_ERR(dmaen->chan);
++
++ dmaen->chan = NULL;
++ dev_err(dev, "can't get dma channel\n");
++ return ret;
++ }
+
+ return 0;
+ }
+@@ -113,7 +183,23 @@ static int rsnd_dmaen_start(struct rsnd_
+ struct snd_pcm_substream *substream = io->substream;
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct dma_async_tx_descriptor *desc;
++ struct dma_slave_config cfg = {};
+ int is_play = rsnd_io_is_play(io);
++ int ret;
++
++ cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
++ cfg.src_addr = dma->src_addr;
++ cfg.dst_addr = dma->dst_addr;
++ cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
++ cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
++
++ dev_dbg(dev, "%s[%d] %pad -> %pad\n",
++ rsnd_mod_name(mod), rsnd_mod_id(mod),
++ &cfg.src_addr, &cfg.dst_addr);
++
++ ret = dmaengine_slave_config(dmaen->chan, &cfg);
++ if (ret < 0)
++ return ret;
+
+ desc = dmaengine_prep_dma_cyclic(dmaen->chan,
+ substream->runtime->dma_addr,
+@@ -159,97 +245,39 @@ struct dma_chan *rsnd_dma_request_channe
+ return chan;
+ }
+
+-static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io,
+- struct rsnd_mod *mod_from,
+- struct rsnd_mod *mod_to)
+-{
+- if ((!mod_from && !mod_to) ||
+- (mod_from && mod_to))
+- return NULL;
+-
+- if (mod_from)
+- return rsnd_mod_dma_req(io, mod_from);
+- else
+- return rsnd_mod_dma_req(io, mod_to);
+-}
+-
+-static int rsnd_dmaen_remove(struct rsnd_mod *mod,
+- struct rsnd_dai_stream *io,
+- struct rsnd_priv *priv)
+-{
+- struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
+- struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+-
+- if (dmaen->chan)
+- dma_release_channel(dmaen->chan);
+-
+- dmaen->chan = NULL;
+-
+- return 0;
+-}
+-
+ static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
+ struct rsnd_dma *dma,
+ struct rsnd_mod *mod_from, struct rsnd_mod *mod_to)
+ {
+- struct rsnd_mod *mod = rsnd_mod_get(dma);
+- struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+ struct rsnd_priv *priv = rsnd_io_to_priv(io);
+ struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv);
+- struct device *dev = rsnd_priv_to_dev(priv);
+- struct dma_slave_config cfg = {};
+- int is_play = rsnd_io_is_play(io);
+- int ret;
+-
+- if (dmaen->chan) {
+- dev_err(dev, "it already has dma channel\n");
+- return -EIO;
+- }
++ struct dma_chan *chan;
+
+- dmaen->chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
+-
+- if (IS_ERR_OR_NULL(dmaen->chan)) {
+- dmaen->chan = NULL;
+- dev_err(dev, "can't get dma channel\n");
+- goto rsnd_dma_channel_err;
++ /* try to get DMAEngine channel */
++ chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
++ if (IS_ERR_OR_NULL(chan)) {
++ /*
++ * DMA failed. try to PIO mode
++ * see
++ * rsnd_ssi_fallback()
++ * rsnd_rdai_continuance_probe()
++ */
++ return -EAGAIN;
+ }
+
+- cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
+- cfg.src_addr = dma->src_addr;
+- cfg.dst_addr = dma->dst_addr;
+- cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+- cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+-
+- dev_dbg(dev, "%s[%d] %pad -> %pad\n",
+- rsnd_mod_name(mod), rsnd_mod_id(mod),
+- &cfg.src_addr, &cfg.dst_addr);
+-
+- ret = dmaengine_slave_config(dmaen->chan, &cfg);
+- if (ret < 0)
+- goto rsnd_dma_attach_err;
++ dma_release_channel(chan);
+
+ dmac->dmaen_num++;
+
+ return 0;
+-
+-rsnd_dma_attach_err:
+- rsnd_dmaen_remove(mod, io, priv);
+-rsnd_dma_channel_err:
+-
+- /*
+- * DMA failed. try to PIO mode
+- * see
+- * rsnd_ssi_fallback()
+- * rsnd_rdai_continuance_probe()
+- */
+- return -EAGAIN;
+ }
+
+ static struct rsnd_mod_ops rsnd_dmaen_ops = {
+ .name = "audmac",
++ .nolock_start = rsnd_dmaen_nolock_start,
++ .nolock_stop = rsnd_dmaen_nolock_stop,
+ .start = rsnd_dmaen_start,
+ .stop = rsnd_dmaen_stop,
+- .remove = rsnd_dmaen_remove,
+ };
+
+ /*
+@@ -671,9 +699,6 @@ int rsnd_dma_attach(struct rsnd_dai_stre
+
+ *dma_mod = rsnd_mod_get(dma);
+
+- dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
+- dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
+-
+ ret = rsnd_mod_init(priv, *dma_mod, ops, NULL,
+ rsnd_mod_get_status, type, dma_id);
+ if (ret < 0)
+@@ -687,6 +712,11 @@ int rsnd_dma_attach(struct rsnd_dai_stre
+ ret = attach(io, dma, mod_from, mod_to);
+ if (ret < 0)
+ return ret;
++
++ dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1);
++ dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0);
++ dma->mod_from = mod_from;
++ dma->mod_to = mod_to;
+ }
+
+ ret = rsnd_dai_connect(*dma_mod, io, type);
diff --git a/patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch b/patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch
new file mode 100644
index 0000000..9befb0b
--- /dev/null
+++ b/patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch
@@ -0,0 +1,177 @@
+From 4f30fb6fdf0737472e5cef1046d0b33aa97379f7 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Mon, 14 Nov 2016 04:20:56 +0000
+Subject: [PATCH 078/299] ASoC: rsnd: use dma_sync_single_for_xxx() for IOMMU
+
+IOMMU needs DMA mapping function to use it. One solution is that
+we can use DMA mapped dev on snd_pcm_lib_preallocate_pages_for_all()
+for SNDRV_DMA_TYPE_DEV. But pcm_new and dma map timing are mismatched.
+Thus, this patch uses SNDRV_DMA_TYPE_CONTINUOUS for pcm_new,
+and use dma_sync_single_for_xxx() for each transfer.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 4821d914fe747a91453021675a74069776f0b819)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 4 +-
+ sound/soc/sh/rcar/dma.c | 84 ++++++++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 82 insertions(+), 6 deletions(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1126,8 +1126,8 @@ static int rsnd_pcm_new(struct snd_soc_p
+
+ return snd_pcm_lib_preallocate_pages_for_all(
+ rtd->pcm,
+- SNDRV_DMA_TYPE_DEV,
+- rtd->card->snd_card->dev,
++ SNDRV_DMA_TYPE_CONTINUOUS,
++ snd_dma_continuous_data(GFP_KERNEL),
+ PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
+ }
+
+--- a/sound/soc/sh/rcar/dma.c
++++ b/sound/soc/sh/rcar/dma.c
+@@ -25,6 +25,10 @@
+
+ struct rsnd_dmaen {
+ struct dma_chan *chan;
++ dma_addr_t dma_buf;
++ unsigned int dma_len;
++ unsigned int dma_period;
++ unsigned int dma_cnt;
+ };
+
+ struct rsnd_dmapp {
+@@ -58,10 +62,38 @@ struct rsnd_dma_ctrl {
+ /*
+ * Audio DMAC
+ */
++#define rsnd_dmaen_sync(dmaen, io, i) __rsnd_dmaen_sync(dmaen, io, i, 1)
++#define rsnd_dmaen_unsync(dmaen, io, i) __rsnd_dmaen_sync(dmaen, io, i, 0)
++static void __rsnd_dmaen_sync(struct rsnd_dmaen *dmaen, struct rsnd_dai_stream *io,
++ int i, int sync)
++{
++ struct device *dev = dmaen->chan->device->dev;
++ enum dma_data_direction dir;
++ int is_play = rsnd_io_is_play(io);
++ dma_addr_t buf;
++ int len, max;
++ size_t period;
++
++ len = dmaen->dma_len;
++ period = dmaen->dma_period;
++ max = len / period;
++ i = i % max;
++ buf = dmaen->dma_buf + (period * i);
++
++ dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
++
++ if (sync)
++ dma_sync_single_for_device(dev, buf, period, dir);
++ else
++ dma_sync_single_for_cpu(dev, buf, period, dir);
++}
++
+ static void __rsnd_dmaen_complete(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct rsnd_dma *dma = rsnd_mod_to_dma(mod);
++ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+ bool elapsed = false;
+ unsigned long flags;
+
+@@ -78,9 +110,22 @@ static void __rsnd_dmaen_complete(struct
+ */
+ spin_lock_irqsave(&priv->lock, flags);
+
+- if (rsnd_io_is_working(io))
++ if (rsnd_io_is_working(io)) {
++ rsnd_dmaen_unsync(dmaen, io, dmaen->dma_cnt);
++
++ /*
++ * Next period is already started.
++ * Let's sync Next Next period
++ * see
++ * rsnd_dmaen_start()
++ */
++ rsnd_dmaen_sync(dmaen, io, dmaen->dma_cnt + 2);
++
+ elapsed = rsnd_dai_pointer_update(io, io->byte_per_period);
+
++ dmaen->dma_cnt++;
++ }
++
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ if (elapsed)
+@@ -116,7 +161,12 @@ static int rsnd_dmaen_stop(struct rsnd_m
+ struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma);
+
+ if (dmaen->chan) {
++ int is_play = rsnd_io_is_play(io);
++
+ dmaengine_terminate_all(dmaen->chan);
++ dma_unmap_single(dmaen->chan->device->dev,
++ dmaen->dma_buf, dmaen->dma_len,
++ is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+ }
+
+ return 0;
+@@ -184,7 +234,11 @@ static int rsnd_dmaen_start(struct rsnd_
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct dma_async_tx_descriptor *desc;
+ struct dma_slave_config cfg = {};
++ dma_addr_t buf;
++ size_t len;
++ size_t period;
+ int is_play = rsnd_io_is_play(io);
++ int i;
+ int ret;
+
+ cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
+@@ -201,10 +255,19 @@ static int rsnd_dmaen_start(struct rsnd_
+ if (ret < 0)
+ return ret;
+
++ len = snd_pcm_lib_buffer_bytes(substream);
++ period = snd_pcm_lib_period_bytes(substream);
++ buf = dma_map_single(dmaen->chan->device->dev,
++ substream->runtime->dma_area,
++ len,
++ is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++ if (dma_mapping_error(dmaen->chan->device->dev, buf)) {
++ dev_err(dev, "dma map failed\n");
++ return -EIO;
++ }
++
+ desc = dmaengine_prep_dma_cyclic(dmaen->chan,
+- substream->runtime->dma_addr,
+- snd_pcm_lib_buffer_bytes(substream),
+- snd_pcm_lib_period_bytes(substream),
++ buf, len, period,
+ is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+
+@@ -216,6 +279,19 @@ static int rsnd_dmaen_start(struct rsnd_
+ desc->callback = rsnd_dmaen_complete;
+ desc->callback_param = rsnd_mod_get(dma);
+
++ dmaen->dma_buf = buf;
++ dmaen->dma_len = len;
++ dmaen->dma_period = period;
++ dmaen->dma_cnt = 0;
++
++ /*
++ * synchronize this and next period
++ * see
++ * __rsnd_dmaen_complete()
++ */
++ for (i = 0; i < 2; i++)
++ rsnd_dmaen_sync(dmaen, io, i);
++
+ if (dmaengine_submit(desc) < 0) {
+ dev_err(dev, "dmaengine_submit() fail\n");
+ return -EIO;
diff --git a/patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch b/patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch
new file mode 100644
index 0000000..59f3f55
--- /dev/null
+++ b/patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch
@@ -0,0 +1,61 @@
+From 12bba2f55ba10d05a92e258e359040b318bd0e91 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 2 Dec 2016 02:44:23 +0000
+Subject: [PATCH 079/299] ASoC: rsnd: rsnd_get_dalign() needs to care SSIU, not
+ SSI
+
+SSIU was controlled by SSI before, but
+commit c7f69ab53("ASoC: rsnd: use mod base common method on SSIU")
+separated it into ssiu.c
+
+But, it didn't care about rsnd_get_dalign() for judging SSI_BUSIF_DALIGN
+register value which changes the stream data order.
+This function will be called from cmd/src/ssiu now, but current code
+still cares ssi, not ssiu.
+This patch fix it up
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 3ce2959d162a8f2d69a83582df619a20ff3f6645)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 6 +++---
+ sound/soc/sh/rcar/rsnd.h | 1 +
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -306,7 +306,7 @@ u32 rsnd_get_adinr_bit(struct rsnd_mod *
+ */
+ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
+ {
+- struct rsnd_mod *ssi = rsnd_io_to_mod_ssi(io);
++ struct rsnd_mod *ssiu = rsnd_io_to_mod_ssiu(io);
+ struct rsnd_mod *target;
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ u32 val = 0x76543210;
+@@ -315,11 +315,11 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod
+ if (rsnd_io_is_play(io)) {
+ struct rsnd_mod *src = rsnd_io_to_mod_src(io);
+
+- target = src ? src : ssi;
++ target = src ? src : ssiu;
+ } else {
+ struct rsnd_mod *cmd = rsnd_io_to_mod_cmd(io);
+
+- target = cmd ? cmd : ssi;
++ target = cmd ? cmd : ssiu;
+ }
+
+ mask <<= runtime->channels * 4;
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -428,6 +428,7 @@ struct rsnd_dai_stream {
+ };
+ #define rsnd_io_to_mod(io, i) ((i) < RSND_MOD_MAX ? (io)->mod[(i)] : NULL)
+ #define rsnd_io_to_mod_ssi(io) rsnd_io_to_mod((io), RSND_MOD_SSI)
++#define rsnd_io_to_mod_ssiu(io) rsnd_io_to_mod((io), RSND_MOD_SSIU)
+ #define rsnd_io_to_mod_ssip(io) rsnd_io_to_mod((io), RSND_MOD_SSIP)
+ #define rsnd_io_to_mod_src(io) rsnd_io_to_mod((io), RSND_MOD_SRC)
+ #define rsnd_io_to_mod_ctu(io) rsnd_io_to_mod((io), RSND_MOD_CTU)
diff --git a/patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch b/patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch
new file mode 100644
index 0000000..d78127d
--- /dev/null
+++ b/patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch
@@ -0,0 +1,41 @@
+From 759d45bc106a2893d09473b28490572eca053354 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 7 Dec 2016 02:05:22 +0000
+Subject: [PATCH 080/299] ASoC: rsnd: tidyup ssi->usrcnt counter check in
+ hw_params
+
+ssi->usrcnt will be updated on snd_soc_dai_ops::trigger,
+but snd_pcm_ops::hw_params will be called *before* it.
+Thus, ssi->usrcnt is still 0 when 1st call.
+rsnd_ssi_hw_params() needs to check its called count, this means
+trigger should be if (ssi->usrcnt) instead of if (ssi->usrcnt > 1).
+
+Reported-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 6bf66b1c35870e08359cb03c49a94e7fef529ef5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/ssi.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -417,11 +417,14 @@ static int rsnd_ssi_hw_params(struct rsn
+ int chan = params_channels(params);
+
+ /*
+- * Already working.
+- * It will happen if SSI has parent/child connection.
++ * snd_pcm_ops::hw_params will be called *before*
++ * snd_soc_dai_ops::trigger. Thus, ssi->usrcnt is 0
++ * in 1st call.
+ */
+- if (ssi->usrcnt > 1) {
++ if (ssi->usrcnt) {
+ /*
++ * Already working.
++ * It will happen if SSI has parent/child connection.
+ * it is error if child <-> parent SSI uses
+ * different channels.
+ */
diff --git a/patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch b/patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch
new file mode 100644
index 0000000..3d63bd4
--- /dev/null
+++ b/patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch
@@ -0,0 +1,141 @@
+From 6d3c7273a9e9d73bbd7a90c6d3bc6a8ca63bf4dd Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 7 Dec 2016 00:29:02 +0000
+Subject: [PATCH 081/299] ASoC: rsnd: enable/disable ADG when suspend/resume
+ timing
+
+Current rsnd driver enables ADG clock when .probe timing,
+but it breaks sound after Suspend/Resume. These should be setups
+every suspend/resume timing too.
+This patch is tested on R-Car Gen3 Salvator-X board
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit c2d3171847611e8a33d3e10a9942f6c065d05c1f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/adg.c | 38 ++++++++++++++++++++++++--------------
+ sound/soc/sh/rcar/core.c | 24 ++++++++++++++++++++++++
+ sound/soc/sh/rcar/rsnd.h | 3 +++
+ 3 files changed, 51 insertions(+), 14 deletions(-)
+
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -376,6 +376,25 @@ found_clock:
+ return 0;
+ }
+
++void rsnd_adg_clk_control(struct rsnd_priv *priv, int enable)
++{
++ struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct clk *clk;
++ int i, ret;
++
++ for_each_rsnd_clk(clk, adg, i) {
++ ret = 0;
++ if (enable)
++ ret = clk_prepare_enable(clk);
++ else
++ clk_disable_unprepare(clk);
++
++ if (ret < 0)
++ dev_warn(dev, "can't use clk %d\n", i);
++ }
++}
++
+ static void rsnd_adg_get_clkin(struct rsnd_priv *priv,
+ struct rsnd_adg *adg)
+ {
+@@ -387,20 +406,15 @@ static void rsnd_adg_get_clkin(struct rs
+ [CLKC] = "clk_c",
+ [CLKI] = "clk_i",
+ };
+- int i, ret;
++ int i;
+
+ for (i = 0; i < CLKMAX; i++) {
+ clk = devm_clk_get(dev, clk_name[i]);
+ adg->clk[i] = IS_ERR(clk) ? NULL : clk;
+ }
+
+- for_each_rsnd_clk(clk, adg, i) {
+- ret = clk_prepare_enable(clk);
+- if (ret < 0)
+- dev_warn(dev, "can't use clk %d\n", i);
+-
++ for_each_rsnd_clk(clk, adg, i)
+ dev_dbg(dev, "clk %d : %p : %ld\n", i, clk, clk_get_rate(clk));
+- }
+ }
+
+ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
+@@ -565,16 +579,12 @@ int rsnd_adg_probe(struct rsnd_priv *pri
+
+ priv->adg = adg;
+
++ rsnd_adg_clk_enable(priv);
++
+ return 0;
+ }
+
+ void rsnd_adg_remove(struct rsnd_priv *priv)
+ {
+- struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
+- struct clk *clk;
+- int i;
+-
+- for_each_rsnd_clk(clk, adg, i) {
+- clk_disable_unprepare(clk);
+- }
++ rsnd_adg_clk_disable(priv);
+ }
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1308,9 +1308,33 @@ static int rsnd_remove(struct platform_d
+ return ret;
+ }
+
++static int rsnd_suspend(struct device *dev)
++{
++ struct rsnd_priv *priv = dev_get_drvdata(dev);
++
++ rsnd_adg_clk_disable(priv);
++
++ return 0;
++}
++
++static int rsnd_resume(struct device *dev)
++{
++ struct rsnd_priv *priv = dev_get_drvdata(dev);
++
++ rsnd_adg_clk_enable(priv);
++
++ return 0;
++}
++
++static struct dev_pm_ops rsnd_pm_ops = {
++ .suspend = rsnd_suspend,
++ .resume = rsnd_resume,
++};
++
+ static struct platform_driver rsnd_driver = {
+ .driver = {
+ .name = "rcar_sound",
++ .pm = &rsnd_pm_ops,
+ .of_match_table = rsnd_of_match,
+ },
+ .probe = rsnd_probe,
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -499,6 +499,9 @@ int rsnd_adg_set_src_timesel_gen2(struct
+ unsigned int out_rate);
+ int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io);
++#define rsnd_adg_clk_enable(priv) rsnd_adg_clk_control(priv, 1)
++#define rsnd_adg_clk_disable(priv) rsnd_adg_clk_control(priv, 0)
++void rsnd_adg_clk_control(struct rsnd_priv *priv, int enable);
+
+ /*
+ * R-Car sound priv
diff --git a/patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch b/patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch
new file mode 100644
index 0000000..edfe604
--- /dev/null
+++ b/patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch
@@ -0,0 +1,84 @@
+From b7636b5265b4dd5ff5ed03601ea8c1f44ac5648a Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 7 Dec 2016 00:28:11 +0000
+Subject: [PATCH 082/299] ASoC: rsnd: setup BRGCKR/BRRA/BRRB when starting
+
+Current rsnd driver setups BRGCKR/BRRA/BRRB when .probe timing.
+But it breaks sound after Suspend/Resume. These should be setups
+every start timing.
+This patch is tested on R-Car Gen3 Salvator-X board
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Tested-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit b99258a3151a70da9b4125f940c4dcc091df84c1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/adg.c | 21 ++++++++++++---------
+ 1 file changed, 12 insertions(+), 9 deletions(-)
+
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -34,6 +34,9 @@ struct rsnd_adg {
+ struct clk_onecell_data onecell;
+ struct rsnd_mod mod;
+ u32 flags;
++ u32 ckr;
++ u32 rbga;
++ u32 rbgb;
+
+ int rbga_rate_for_441khz; /* RBGA */
+ int rbgb_rate_for_48khz; /* RBGB */
+@@ -316,9 +319,11 @@ int rsnd_adg_ssi_clk_try_start(struct rs
+ struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);
+ struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
+ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
+ struct clk *clk;
+ int i;
+ u32 data;
++ u32 ckr = 0;
+ int sel_table[] = {
+ [CLKA] = 0x1,
+ [CLKB] = 0x2,
+@@ -360,15 +365,14 @@ found_clock:
+ rsnd_adg_set_ssi_clk(ssi_mod, data);
+
+ if (!(adg_mode_flags(adg) & LRCLK_ASYNC)) {
+- struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
+- u32 ckr = 0;
+-
+ if (0 == (rate % 8000))
+ ckr = 0x80000000;
+-
+- rsnd_mod_bset(adg_mod, BRGCKR, 0x80000000, ckr);
+ }
+
++ rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, adg->ckr | ckr);
++ rsnd_mod_write(adg_mod, BRRA, adg->rbga);
++ rsnd_mod_write(adg_mod, BRRB, adg->rbgb);
++
+ dev_dbg(dev, "ADG: %s[%d] selects 0x%x for %d\n",
+ rsnd_mod_name(ssi_mod), rsnd_mod_id(ssi_mod),
+ data, rate);
+@@ -421,7 +425,6 @@ static void rsnd_adg_get_clkout(struct r
+ struct rsnd_adg *adg)
+ {
+ struct clk *clk;
+- struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct device_node *np = dev->of_node;
+ u32 ckr, rbgx, rbga, rbgb;
+@@ -546,9 +549,9 @@ static void rsnd_adg_get_clkout(struct r
+ }
+ }
+
+- rsnd_mod_bset(adg_mod, BRGCKR, 0x80FF0000, ckr);
+- rsnd_mod_write(adg_mod, BRRA, rbga);
+- rsnd_mod_write(adg_mod, BRRB, rbgb);
++ adg->ckr = ckr;
++ adg->rbga = rbga;
++ adg->rbgb = rbgb;
+
+ for_each_rsnd_clkout(clk, adg, i)
+ dev_dbg(dev, "clkout %d : %p : %ld\n", i, clk, clk_get_rate(clk));
diff --git a/patches.renesas/0083-ASoC-rsnd-don-t-double-free-kctrl.patch b/patches.renesas/0083-ASoC-rsnd-don-t-double-free-kctrl.patch
new file mode 100644
index 0000000..9b026ec
--- /dev/null
+++ b/patches.renesas/0083-ASoC-rsnd-don-t-double-free-kctrl.patch
@@ -0,0 +1,34 @@
+From 293c6c0fa278e77f17b81bf4b2dda2adcbbd141f Mon Sep 17 00:00:00 2001
+From: Colin Ian King <colin.king@canonical.com>
+Date: Thu, 8 Dec 2016 13:05:43 +0000
+Subject: [PATCH 083/299] ASoC: rsnd: don't double free kctrl
+
+On an error, snd_ctl_add already free's kctrl, so calling snd_ctl_free_one
+to free it again leads to a double free error. Fix this by removing
+the extraneous snd_ctl_free_one call.
+
+Issue found using static analysis with CoverityScan, CID 1372908
+
+Signed-off-by: Colin Ian King <colin.king@canonical.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 0ea617a298dcdc2251b4e10f83ac3f3e627b66e3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -1030,10 +1030,8 @@ static int __rsnd_kctrl_new(struct rsnd_
+ return -ENOMEM;
+
+ ret = snd_ctl_add(card, kctrl);
+- if (ret < 0) {
+- snd_ctl_free_one(kctrl);
++ if (ret < 0)
+ return ret;
+- }
+
+ cfg->update = update;
+ cfg->card = card;
diff --git a/patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch b/patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch
new file mode 100644
index 0000000..e32dc34
--- /dev/null
+++ b/patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch
@@ -0,0 +1,108 @@
+From ff475225d3a9b8f14a7d33cce32517d75e2ccaa0 Mon Sep 17 00:00:00 2001
+From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Date: Fri, 4 Nov 2016 17:38:54 +0900
+Subject: [PATCH 084/299] spi: rspi: supports 32bytes buffer for DUAL and QUAD
+
+This patch supports 32bytes of buffer for DUAL and QUAD in QSPI by
+Using Transmit/Receive Buffer Data Triggering Number.
+In order to improve the DUAL and QUAD's performance of SPI
+while transferring data in PIO mode, it sends/receives each 32bytes
+data instead of each byte data as current situation.
+
+Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 3be09bec42a800d4f8ead8119c462f3eb4fad435)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++---
+ 1 file changed, 49 insertions(+), 3 deletions(-)
+
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -413,7 +413,7 @@ static unsigned int qspi_set_send_trigge
+ return n;
+ }
+
+-static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
++static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
+ {
+ unsigned int n;
+
+@@ -428,6 +428,7 @@ static void qspi_set_receive_trigger(str
+ qspi_update(rspi, SPBFCR_RXTRG_MASK,
+ SPBFCR_RXTRG_1B, QSPI_SPBFCR);
+ }
++ return n;
+ }
+
+ #define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
+@@ -514,6 +515,51 @@ static int rspi_pio_transfer(struct rspi
+ return 0;
+ }
+
++static int rspi_pio_transfer_in_or_our(struct rspi_data *rspi, const u8 *tx,
++ u8 *rx, unsigned int n)
++{
++ unsigned int i, len;
++ int ret;
++
++ while (n > 0) {
++ if (tx) {
++ len = qspi_set_send_trigger(rspi, n);
++ if (len == QSPI_BUFFER_SIZE) {
++ ret = rspi_wait_for_tx_empty(rspi);
++ if (ret < 0) {
++ dev_err(&rspi->master->dev, "transmit timeout\n");
++ return ret;
++ }
++ for (i = 0; i < len; i++)
++ rspi_write_data(rspi, *tx++);
++ } else {
++ ret = rspi_pio_transfer(rspi, tx, NULL, n);
++ if (ret < 0)
++ return ret;
++ }
++ }
++ if (rx) {
++ len = qspi_set_receive_trigger(rspi, n);
++ if (len == QSPI_BUFFER_SIZE) {
++ ret = rspi_wait_for_rx_full(rspi);
++ if (ret < 0) {
++ dev_err(&rspi->master->dev, "receive timeout\n");
++ return ret;
++ }
++ for (i = 0; i < len; i++)
++ *rx++ = rspi_read_data(rspi);
++ } else {
++ ret = rspi_pio_transfer(rspi, NULL, rx, n);
++ if (ret < 0)
++ return ret;
++ *rx++ = ret;
++ }
++ }
++ n -= len;
++ }
++ return 0;
++}
++
+ static void rspi_dma_complete(void *arg)
+ {
+ struct rspi_data *rspi = arg;
+@@ -793,7 +839,7 @@ static int qspi_transfer_out(struct rspi
+ return ret;
+ }
+
+- ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len);
++ ret = rspi_pio_transfer_in_or_our(rspi, xfer->tx_buf, NULL, xfer->len);
+ if (ret < 0)
+ return ret;
+
+@@ -811,7 +857,7 @@ static int qspi_transfer_in(struct rspi_
+ return ret;
+ }
+
+- return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len);
++ return rspi_pio_transfer_in_or_our(rspi, NULL, xfer->rx_buf, xfer->len);
+ }
+
+ static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
diff --git a/patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch b/patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch
new file mode 100644
index 0000000..256a4bf
--- /dev/null
+++ b/patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch
@@ -0,0 +1,160 @@
+From 5b0c2772f585fe93e1043f5576dcc25048319459 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Tue, 8 Nov 2016 14:46:12 +0100
+Subject: [PATCH 085/299] spi: rspi: avoid uninitialized variable access
+
+The newly introduced rspi_pio_transfer_in_or_our() function must
+take either a valid 'rx' or 'tx' pointer, and has undefined behavior
+if both are NULL, as found by 'gcc -Wmaybe-unintialized':
+
+drivers/spi/spi-rspi.c: In function 'rspi_pio_transfer_in_or_our':
+drivers/spi/spi-rspi.c:558:5: error: 'len' may be used uninitialized in this function [-Werror=maybe-uninitialized]
+
+The analysis of the function is correct in principle, but the code
+is currently safe because both callers always pass exactly one
+of the two pointers.
+
+Looking closer at this function shows that having a combined
+method for rx and tx here actually increases the complexity
+and the size of the file. This simplifies it again by keeping
+the two separate, which then ends up avoiding that warning.
+
+Fixes: 3be09bec42a8 ("spi: rspi: supports 32bytes buffer for DUAL and QUAD")
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit db30083813b559e98e10ae26bd09d3dc69be7fb7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 94 +++++++++++++++++++++++--------------------------
+ 1 file changed, 45 insertions(+), 49 deletions(-)
+
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -515,51 +515,6 @@ static int rspi_pio_transfer(struct rspi
+ return 0;
+ }
+
+-static int rspi_pio_transfer_in_or_our(struct rspi_data *rspi, const u8 *tx,
+- u8 *rx, unsigned int n)
+-{
+- unsigned int i, len;
+- int ret;
+-
+- while (n > 0) {
+- if (tx) {
+- len = qspi_set_send_trigger(rspi, n);
+- if (len == QSPI_BUFFER_SIZE) {
+- ret = rspi_wait_for_tx_empty(rspi);
+- if (ret < 0) {
+- dev_err(&rspi->master->dev, "transmit timeout\n");
+- return ret;
+- }
+- for (i = 0; i < len; i++)
+- rspi_write_data(rspi, *tx++);
+- } else {
+- ret = rspi_pio_transfer(rspi, tx, NULL, n);
+- if (ret < 0)
+- return ret;
+- }
+- }
+- if (rx) {
+- len = qspi_set_receive_trigger(rspi, n);
+- if (len == QSPI_BUFFER_SIZE) {
+- ret = rspi_wait_for_rx_full(rspi);
+- if (ret < 0) {
+- dev_err(&rspi->master->dev, "receive timeout\n");
+- return ret;
+- }
+- for (i = 0; i < len; i++)
+- *rx++ = rspi_read_data(rspi);
+- } else {
+- ret = rspi_pio_transfer(rspi, NULL, rx, n);
+- if (ret < 0)
+- return ret;
+- *rx++ = ret;
+- }
+- }
+- n -= len;
+- }
+- return 0;
+-}
+-
+ static void rspi_dma_complete(void *arg)
+ {
+ struct rspi_data *rspi = arg;
+@@ -831,6 +786,9 @@ static int qspi_transfer_out_in(struct r
+
+ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+ {
++ const u8 *tx = xfer->tx_buf;
++ unsigned int n = xfer->len;
++ unsigned int i, len;
+ int ret;
+
+ if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) {
+@@ -839,9 +797,23 @@ static int qspi_transfer_out(struct rspi
+ return ret;
+ }
+
+- ret = rspi_pio_transfer_in_or_our(rspi, xfer->tx_buf, NULL, xfer->len);
+- if (ret < 0)
+- return ret;
++ while (n > 0) {
++ len = qspi_set_send_trigger(rspi, n);
++ if (len == QSPI_BUFFER_SIZE) {
++ ret = rspi_wait_for_tx_empty(rspi);
++ if (ret < 0) {
++ dev_err(&rspi->master->dev, "transmit timeout\n");
++ return ret;
++ }
++ for (i = 0; i < len; i++)
++ rspi_write_data(rspi, *tx++);
++ } else {
++ ret = rspi_pio_transfer(rspi, tx, NULL, n);
++ if (ret < 0)
++ return ret;
++ }
++ n -= len;
++ }
+
+ /* Wait for the last transmission */
+ rspi_wait_for_tx_empty(rspi);
+@@ -851,13 +823,37 @@ static int qspi_transfer_out(struct rspi
+
+ static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer)
+ {
++ u8 *rx = xfer->rx_buf;
++ unsigned int n = xfer->len;
++ unsigned int i, len;
++ int ret;
++
+ if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) {
+ int ret = rspi_dma_transfer(rspi, NULL, &xfer->rx_sg);
+ if (ret != -EAGAIN)
+ return ret;
+ }
+
+- return rspi_pio_transfer_in_or_our(rspi, NULL, xfer->rx_buf, xfer->len);
++ while (n > 0) {
++ len = qspi_set_receive_trigger(rspi, n);
++ if (len == QSPI_BUFFER_SIZE) {
++ ret = rspi_wait_for_rx_full(rspi);
++ if (ret < 0) {
++ dev_err(&rspi->master->dev, "receive timeout\n");
++ return ret;
++ }
++ for (i = 0; i < len; i++)
++ *rx++ = rspi_read_data(rspi);
++ } else {
++ ret = rspi_pio_transfer(rspi, NULL, rx, n);
++ if (ret < 0)
++ return ret;
++ *rx++ = ret;
++ }
++ n -= len;
++ }
++
++ return 0;
+ }
+
+ static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
diff --git a/patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch b/patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch
new file mode 100644
index 0000000..909d776
--- /dev/null
+++ b/patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch
@@ -0,0 +1,38 @@
+From b0c74bd8be6652874bdb5e692358fd208b682b5b Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 25 Nov 2016 08:56:14 +0100
+Subject: [PATCH 086/299] mmc: sh_mmcif: Document r8a73a4, r8a7778 and sh73a0
+ DT bindings
+
+Simply document new compatibility strings as the driver is already
+activated using a fallback compatibility string.
+
+These compat strings are in keeping with those for all other
+Renesas ARM based SoCs with sh_mmcif enabled in mainline.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit fb3470f795ab4fea7bb9abd01b6055453b737832)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/mmc/renesas,mmcif.txt | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
++++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
+@@ -8,11 +8,14 @@ Required properties:
+
+ - compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a
+ fallback. Examples with <soctype> are:
++ - "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs
+ - "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
++ - "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs
+ - "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs
+ - "renesas,mmcif-r8a7791" for the MMCIF found in r8a7791 SoCs
+ - "renesas,mmcif-r8a7793" for the MMCIF found in r8a7793 SoCs
+ - "renesas,mmcif-r8a7794" for the MMCIF found in r8a7794 SoCs
++ - "renesas,mmcif-sh73a0" for the MMCIF found in sh73a0 SoCs
+
+ - clocks: reference to the functional clock
+
diff --git a/patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch b/patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch
new file mode 100644
index 0000000..6103137
--- /dev/null
+++ b/patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch
@@ -0,0 +1,39 @@
+From 2075076c197cf793b193f26a87df772cfad29a10 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Mon, 12 Sep 2016 10:15:05 -0400
+Subject: [PATCH 087/299] mmc: sh_mobile_sdhi: add ocr_mask option
+
+In moving platforms from board files to DT, there still needs to be a way
+to set the ocr_mask setting for the tmio driver during probe. Without this
+setting, the probe will fail because the supported voltages are not known.
+
+This patch will also traditional platform registration platforms to
+migrate to DT.
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit f19417f38264f9a2f7b4627aa4060133c237b211)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/sh_mobile_sdhi.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/mmc/host/sh_mobile_sdhi.c
++++ b/drivers/mmc/host/sh_mobile_sdhi.c
+@@ -49,6 +49,7 @@
+
+ struct sh_mobile_sdhi_of_data {
+ unsigned long tmio_flags;
++ u32 tmio_ocr_mask;
+ unsigned long capabilities;
+ unsigned long capabilities2;
+ enum dma_slave_buswidth dma_buswidth;
+@@ -364,6 +365,7 @@ static int sh_mobile_sdhi_probe(struct p
+ const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
+
+ mmc_data->flags |= of_data->tmio_flags;
++ mmc_data->ocr_mask = of_data->tmio_ocr_mask;
+ mmc_data->capabilities |= of_data->capabilities;
+ mmc_data->capabilities2 |= of_data->capabilities2;
+ mmc_data->dma_rx_offset = of_data->dma_rx_offset;
diff --git a/patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch b/patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch
new file mode 100644
index 0000000..ea18ad3
--- /dev/null
+++ b/patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch
@@ -0,0 +1,100 @@
+From d74835ce22d1293cdd58bab101f8ce72ba1c9808 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Mon, 12 Sep 2016 10:15:06 -0400
+Subject: [PATCH 088/299] mmc: tmio-mmc: add support for 32bit data port
+
+For the r7s72100 SOC, the DATA_PORT register was changed to 32-bits wide.
+Therefore a new flag has been created that will allow 32-bit reads/writes
+to the DATA_PORT register instead of 16-bit (because 16-bits accesses are
+not supported).
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 8185e51f358a8dd4801b67e8c66f03eb9eeaba75)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc.h | 12 ++++++++++++
+ drivers/mmc/host/tmio_mmc_pio.c | 30 ++++++++++++++++++++++++++++++
+ include/linux/mfd/tmio.h | 5 +++++
+ 3 files changed, 47 insertions(+)
+
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -245,6 +245,12 @@ static inline u32 sd_ctrl_read16_and_16_
+ readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
+ }
+
++static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
++ u32 *buf, int count)
++{
++ readsl(host->ctl + (addr << host->bus_shift), buf, count);
++}
++
+ static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
+ {
+ /* If there is a hook and it returns non-zero then there
+@@ -267,4 +273,10 @@ static inline void sd_ctrl_write32_as_16
+ writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
+ }
+
++static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
++ const u32 *buf, int count)
++{
++ writesl(host->ctl + (addr << host->bus_shift), buf, count);
++}
++
+ #endif
+--- a/drivers/mmc/host/tmio_mmc_pio.c
++++ b/drivers/mmc/host/tmio_mmc_pio.c
+@@ -393,6 +393,36 @@ static void tmio_mmc_transfer_data(struc
+ /*
+ * Transfer the data
+ */
++ if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
++ u8 data[4] = { };
++
++ if (is_read)
++ sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
++ count >> 2);
++ else
++ sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
++ count >> 2);
++
++ /* if count was multiple of 4 */
++ if (!(count & 0x3))
++ return;
++
++ buf8 = (u8 *)(buf + (count >> 2));
++ count %= 4;
++
++ if (is_read) {
++ sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
++ (u32 *)data, 1);
++ memcpy(buf8, data, count);
++ } else {
++ memcpy(data, buf8, count);
++ sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
++ (u32 *)data, 1);
++ }
++
++ return;
++ }
++
+ if (is_read)
+ sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
+ else
+--- a/include/linux/mfd/tmio.h
++++ b/include/linux/mfd/tmio.h
+@@ -100,6 +100,11 @@
+ #define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8)
+
+ /*
++ * Some controllers have a 32-bit wide data port register
++ */
++#define TMIO_MMC_32BIT_DATA_PORT (1 << 9)
++
++/*
+ * Some controllers allows to set SDx actual clock
+ */
+ #define TMIO_MMC_CLK_ACTUAL (1 << 10)
diff --git a/patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch b/patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch
new file mode 100644
index 0000000..354a4fd
--- /dev/null
+++ b/patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch
@@ -0,0 +1,50 @@
+From c9918cb65013eb48d51bb2ae11661e8ac3b70424 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Mon, 12 Sep 2016 10:15:07 -0400
+Subject: [PATCH 089/299] mmc: sh_mobile_sdhi: Add r7s72100 support
+
+Add support for r7s72100 SoC.
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 0963dd56b1cf2ad2ad8553cb07e438c31e98e1af)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 +
+ drivers/mmc/host/sh_mobile_sdhi.c | 7 +++++++
+ 2 files changed, 8 insertions(+)
+
+--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
++++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+@@ -13,6 +13,7 @@ Required properties:
+ - compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
+ "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
+ "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
++ "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
+ "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
+ "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
+ "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
+--- a/drivers/mmc/host/sh_mobile_sdhi.c
++++ b/drivers/mmc/host/sh_mobile_sdhi.c
+@@ -61,6 +61,12 @@ static const struct sh_mobile_sdhi_of_da
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
+ };
+
++static const struct sh_mobile_sdhi_of_data of_rz_compatible = {
++ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
++ .tmio_ocr_mask = MMC_VDD_32_33,
++ .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
++};
++
+ static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
+ TMIO_MMC_CLK_ACTUAL,
+@@ -87,6 +93,7 @@ static const struct of_device_id sh_mobi
+ { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
+ { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
+ { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
++ { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
+ { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
+ { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
+ { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
diff --git a/patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch b/patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch
new file mode 100644
index 0000000..cadc34a
--- /dev/null
+++ b/patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch
@@ -0,0 +1,36 @@
+From f6a9f258b5f8d73fb11ff1cde12aaa8a91a14d98 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 21 Nov 2016 18:24:55 +0100
+Subject: [PATCH 090/299] spi: sh-msiof: Add support for R-Car M3-W
+
+MSIOF in R-Car M3-W (r8a7796) is handled fine by the existing driver.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit eb51cffa743de5c78cfbf44f576b0f1eccc784f4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/spi/sh-msiof.txt | 1 +
+ drivers/spi/spi-sh-msiof.c | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
++++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
+@@ -10,6 +10,7 @@ Required properties:
+ "renesas,msiof-r8a7792" (R-Car V2H)
+ "renesas,msiof-r8a7793" (R-Car M2-N)
+ "renesas,msiof-r8a7794" (R-Car E2)
++ "renesas,msiof-r8a7796" (R-Car M3-W)
+ "renesas,msiof-sh73a0" (SH-Mobile AG5)
+ - reg : A list of offsets and lengths of the register sets for
+ the device.
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -980,6 +980,7 @@ static const struct of_device_id sh_msio
+ { .compatible = "renesas,msiof-r8a7792", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7793", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7794", .data = &r8a779x_data },
++ { .compatible = "renesas,msiof-r8a7796", .data = &r8a779x_data },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, sh_msiof_match);
diff --git a/patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch b/patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch
new file mode 100644
index 0000000..4dcc82e
--- /dev/null
+++ b/patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch
@@ -0,0 +1,95 @@
+From 79424266f7ace0f0972d66393fe0bb55abae6ceb Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Mon, 12 Dec 2016 10:49:35 +0100
+Subject: [PATCH 091/299] spi: sh-msiof: Add R-Car Gen 2 and 3 fallback
+ bindings
+
+In the case of Renesas R-Car hardware we know that there are generations of
+SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the
+relationship between IP blocks might be. For example, I believe that
+r8a7790 is older than r8a7791 but that doesn't imply that the latter is a
+descendant of the former or vice versa.
+
+We can, however, by examining the documentation and behaviour of the
+hardware at run-time observe that the current driver implementation appears
+to be compatible with the IP blocks on SoCs within a given generation.
+
+For the above reasons and convenience when enabling new SoCs a
+per-generation fallback compatibility string scheme is being adopted for
+drivers for Renesas SoCs.
+
+Also:
+* Deprecate renesas,sh-msiof. It seems poorly named as it is only
+ compatible with SH-Mobile. It also appears unused in mainline.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 4286db8456f4fa0c6af2b6b9abc5991a7e7da69c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/spi/sh-msiof.txt | 19 +++++++++++++------
+ drivers/spi/spi-sh-msiof.c | 4 +++-
+ 2 files changed, 16 insertions(+), 7 deletions(-)
+
+--- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
++++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
+@@ -1,17 +1,23 @@
+ Renesas MSIOF spi controller
+
+ Required properties:
+-- compatible : "renesas,msiof-<soctype>" for SoCs,
+- "renesas,sh-msiof" for SuperH, or
+- "renesas,sh-mobile-msiof" for SH Mobile series.
+- Examples with soctypes are:
+- "renesas,msiof-r8a7790" (R-Car H2)
++- compatible : "renesas,msiof-r8a7790" (R-Car H2)
+ "renesas,msiof-r8a7791" (R-Car M2-W)
+ "renesas,msiof-r8a7792" (R-Car V2H)
+ "renesas,msiof-r8a7793" (R-Car M2-N)
+ "renesas,msiof-r8a7794" (R-Car E2)
+ "renesas,msiof-r8a7796" (R-Car M3-W)
+ "renesas,msiof-sh73a0" (SH-Mobile AG5)
++ "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
++ "renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)
++ "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
++ "renesas,sh-msiof" (deprecated)
++
++ When compatible with the generic version, nodes
++ must list the SoC-specific version corresponding
++ to the platform first followed by the generic
++ version.
++
+ - reg : A list of offsets and lengths of the register sets for
+ the device.
+ If only one register set is present, it is to be used
+@@ -61,7 +67,8 @@ Documentation/devicetree/bindings/pinctr
+ Example:
+
+ msiof0: spi@e6e20000 {
+- compatible = "renesas,msiof-r8a7791";
++ compatible = "renesas,msiof-r8a7791",
++ "renesas,rcar-gen2-msiof";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -973,14 +973,16 @@ static const struct sh_msiof_chipdata r8
+ };
+
+ static const struct of_device_id sh_msiof_match[] = {
+- { .compatible = "renesas,sh-msiof", .data = &sh_data },
+ { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
+ { .compatible = "renesas,msiof-r8a7790", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7791", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7792", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7793", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7794", .data = &r8a779x_data },
++ { .compatible = "renesas,rcar-gen2-msiof", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7796", .data = &r8a779x_data },
++ { .compatible = "renesas,rcar-gen3-msiof", .data = &r8a779x_data },
++ { .compatible = "renesas,sh-msiof", .data = &sh_data }, // Deprecated
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, sh_msiof_match);
diff --git a/patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch b/patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch
new file mode 100644
index 0000000..609e7eb
--- /dev/null
+++ b/patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch
@@ -0,0 +1,28 @@
+From 8f418b9a8f03f29ef24185fc1639255f8673b807 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 20 Dec 2016 11:21:16 +0100
+Subject: [PATCH 092/299] spi: sh-msiof: Do not use C++ style comment
+
+4286db8456f4 ("spi: sh-msiof: Add R-Car Gen 2 and 3 fallback bindings")
+added a C++ style comment. This is not in keeping with the style used
+for comments elsewhere in this fine. Update it accordingly.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 264c3e8de4fbda1d1342213c78fb3788a43cfd41)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-sh-msiof.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -982,7 +982,7 @@ static const struct of_device_id sh_msio
+ { .compatible = "renesas,rcar-gen2-msiof", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7796", .data = &r8a779x_data },
+ { .compatible = "renesas,rcar-gen3-msiof", .data = &r8a779x_data },
+- { .compatible = "renesas,sh-msiof", .data = &sh_data }, // Deprecated
++ { .compatible = "renesas,sh-msiof", .data = &sh_data }, /* Deprecated */
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, sh_msiof_match);
diff --git a/patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch b/patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch
new file mode 100644
index 0000000..39015f3
--- /dev/null
+++ b/patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch
@@ -0,0 +1,120 @@
+From 20f2d83a6f6ff587465f047f114a4b102616f64a Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 14 Sep 2016 18:46:08 +0200
+Subject: [PATCH 093/299] pinctrl: sh-pfc: r8a7796: Add I2C pin support
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 02609a2335fd21c34288ef2ab532a0c2e9f20b6a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 77 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 77 insertions(+)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -1490,6 +1490,57 @@ static const struct sh_pfc_pin pinmux_pi
+ PINMUX_GPIO_GP_ALL(),
+ };
+
++/* - I2C -------------------------------------------------------------------- */
++static const unsigned int i2c1_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
++};
++static const unsigned int i2c1_a_mux[] = {
++ SDA1_A_MARK, SCL1_A_MARK,
++};
++static const unsigned int i2c1_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
++};
++static const unsigned int i2c1_b_mux[] = {
++ SDA1_B_MARK, SCL1_B_MARK,
++};
++static const unsigned int i2c2_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
++};
++static const unsigned int i2c2_a_mux[] = {
++ SDA2_A_MARK, SCL2_A_MARK,
++};
++static const unsigned int i2c2_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
++};
++static const unsigned int i2c2_b_mux[] = {
++ SDA2_B_MARK, SCL2_B_MARK,
++};
++static const unsigned int i2c6_a_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11),
++};
++static const unsigned int i2c6_a_mux[] = {
++ SDA6_A_MARK, SCL6_A_MARK,
++};
++static const unsigned int i2c6_b_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
++};
++static const unsigned int i2c6_b_mux[] = {
++ SDA6_B_MARK, SCL6_B_MARK,
++};
++static const unsigned int i2c6_c_pins[] = {
++ /* SDA, SCL */
++ RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14),
++};
++static const unsigned int i2c6_c_mux[] = {
++ SDA6_C_MARK, SCL6_C_MARK,
++};
++
+ /* - SCIF0 ------------------------------------------------------------------ */
+ static const unsigned int scif0_data_pins[] = {
+ /* RX, TX */
+@@ -1912,6 +1963,13 @@ static const unsigned int sdhi3_ds_mux[]
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(i2c1_a),
++ SH_PFC_PIN_GROUP(i2c1_b),
++ SH_PFC_PIN_GROUP(i2c2_a),
++ SH_PFC_PIN_GROUP(i2c2_b),
++ SH_PFC_PIN_GROUP(i2c6_a),
++ SH_PFC_PIN_GROUP(i2c6_b),
++ SH_PFC_PIN_GROUP(i2c6_c),
+ SH_PFC_PIN_GROUP(scif0_data),
+ SH_PFC_PIN_GROUP(scif0_clk),
+ SH_PFC_PIN_GROUP(scif0_ctrl),
+@@ -1969,6 +2027,22 @@ static const struct sh_pfc_pin_group pin
+ SH_PFC_PIN_GROUP(sdhi3_ds),
+ };
+
++static const char * const i2c1_groups[] = {
++ "i2c1_a",
++ "i2c1_b",
++};
++
++static const char * const i2c2_groups[] = {
++ "i2c2_a",
++ "i2c2_b",
++};
++
++static const char * const i2c6_groups[] = {
++ "i2c6_a",
++ "i2c6_b",
++ "i2c6_c",
++};
++
+ static const char * const scif0_groups[] = {
+ "scif0_data",
+ "scif0_clk",
+@@ -2058,6 +2132,9 @@ static const char * const sdhi3_groups[]
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(i2c1),
++ SH_PFC_FUNCTION(i2c2),
++ SH_PFC_FUNCTION(i2c6),
+ SH_PFC_FUNCTION(scif0),
+ SH_PFC_FUNCTION(scif1),
+ SH_PFC_FUNCTION(scif2),
diff --git a/patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch b/patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch
new file mode 100644
index 0000000..02129e4
--- /dev/null
+++ b/patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch
@@ -0,0 +1,336 @@
+From 83fae191e06ed9623195939adbe40a2cde6fd9cb Mon Sep 17 00:00:00 2001
+From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Date: Thu, 13 Oct 2016 10:29:14 +0100
+Subject: [PATCH 094/299] pinctrl: sh-pfc: r8a7796: Add DRIF support
+
+This patch adds DRIF[0-3] pinmux support for r8a7796 SoC.
+
+Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit fb0828316bf655d26c74321240bbf83b2a1d89ad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 291 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 291 insertions(+)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -1490,6 +1490,221 @@ static const struct sh_pfc_pin pinmux_pi
+ PINMUX_GPIO_GP_ALL(),
+ };
+
++/* - DRIF0 --------------------------------------------------------------- */
++static const unsigned int drif0_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
++};
++static const unsigned int drif0_ctrl_a_mux[] = {
++ RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
++};
++static const unsigned int drif0_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 10),
++};
++static const unsigned int drif0_data0_a_mux[] = {
++ RIF0_D0_A_MARK,
++};
++static const unsigned int drif0_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 7),
++};
++static const unsigned int drif0_data1_a_mux[] = {
++ RIF0_D1_A_MARK,
++};
++static const unsigned int drif0_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
++};
++static const unsigned int drif0_ctrl_b_mux[] = {
++ RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
++};
++static const unsigned int drif0_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 1),
++};
++static const unsigned int drif0_data0_b_mux[] = {
++ RIF0_D0_B_MARK,
++};
++static const unsigned int drif0_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 2),
++};
++static const unsigned int drif0_data1_b_mux[] = {
++ RIF0_D1_B_MARK,
++};
++static const unsigned int drif0_ctrl_c_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
++};
++static const unsigned int drif0_ctrl_c_mux[] = {
++ RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
++};
++static const unsigned int drif0_data0_c_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 13),
++};
++static const unsigned int drif0_data0_c_mux[] = {
++ RIF0_D0_C_MARK,
++};
++static const unsigned int drif0_data1_c_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 14),
++};
++static const unsigned int drif0_data1_c_mux[] = {
++ RIF0_D1_C_MARK,
++};
++/* - DRIF1 --------------------------------------------------------------- */
++static const unsigned int drif1_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
++};
++static const unsigned int drif1_ctrl_a_mux[] = {
++ RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
++};
++static const unsigned int drif1_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 19),
++};
++static const unsigned int drif1_data0_a_mux[] = {
++ RIF1_D0_A_MARK,
++};
++static const unsigned int drif1_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 20),
++};
++static const unsigned int drif1_data1_a_mux[] = {
++ RIF1_D1_A_MARK,
++};
++static const unsigned int drif1_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
++};
++static const unsigned int drif1_ctrl_b_mux[] = {
++ RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
++};
++static const unsigned int drif1_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 7),
++};
++static const unsigned int drif1_data0_b_mux[] = {
++ RIF1_D0_B_MARK,
++};
++static const unsigned int drif1_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 8),
++};
++static const unsigned int drif1_data1_b_mux[] = {
++ RIF1_D1_B_MARK,
++};
++static const unsigned int drif1_ctrl_c_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
++};
++static const unsigned int drif1_ctrl_c_mux[] = {
++ RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
++};
++static const unsigned int drif1_data0_c_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(5, 6),
++};
++static const unsigned int drif1_data0_c_mux[] = {
++ RIF1_D0_C_MARK,
++};
++static const unsigned int drif1_data1_c_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(5, 10),
++};
++static const unsigned int drif1_data1_c_mux[] = {
++ RIF1_D1_C_MARK,
++};
++/* - DRIF2 --------------------------------------------------------------- */
++static const unsigned int drif2_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
++};
++static const unsigned int drif2_ctrl_a_mux[] = {
++ RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
++};
++static const unsigned int drif2_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 7),
++};
++static const unsigned int drif2_data0_a_mux[] = {
++ RIF2_D0_A_MARK,
++};
++static const unsigned int drif2_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 10),
++};
++static const unsigned int drif2_data1_a_mux[] = {
++ RIF2_D1_A_MARK,
++};
++static const unsigned int drif2_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
++};
++static const unsigned int drif2_ctrl_b_mux[] = {
++ RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
++};
++static const unsigned int drif2_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 30),
++};
++static const unsigned int drif2_data0_b_mux[] = {
++ RIF2_D0_B_MARK,
++};
++static const unsigned int drif2_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 31),
++};
++static const unsigned int drif2_data1_b_mux[] = {
++ RIF2_D1_B_MARK,
++};
++/* - DRIF3 --------------------------------------------------------------- */
++static const unsigned int drif3_ctrl_a_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
++};
++static const unsigned int drif3_ctrl_a_mux[] = {
++ RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
++};
++static const unsigned int drif3_data0_a_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 19),
++};
++static const unsigned int drif3_data0_a_mux[] = {
++ RIF3_D0_A_MARK,
++};
++static const unsigned int drif3_data1_a_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 20),
++};
++static const unsigned int drif3_data1_a_mux[] = {
++ RIF3_D1_A_MARK,
++};
++static const unsigned int drif3_ctrl_b_pins[] = {
++ /* CLK, SYNC */
++ RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
++};
++static const unsigned int drif3_ctrl_b_mux[] = {
++ RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
++};
++static const unsigned int drif3_data0_b_pins[] = {
++ /* D0 */
++ RCAR_GP_PIN(6, 28),
++};
++static const unsigned int drif3_data0_b_mux[] = {
++ RIF3_D0_B_MARK,
++};
++static const unsigned int drif3_data1_b_pins[] = {
++ /* D1 */
++ RCAR_GP_PIN(6, 29),
++};
++static const unsigned int drif3_data1_b_mux[] = {
++ RIF3_D1_B_MARK,
++};
++
+ /* - I2C -------------------------------------------------------------------- */
+ static const unsigned int i2c1_a_pins[] = {
+ /* SDA, SCL */
+@@ -1963,6 +2178,36 @@ static const unsigned int sdhi3_ds_mux[]
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(drif0_ctrl_a),
++ SH_PFC_PIN_GROUP(drif0_data0_a),
++ SH_PFC_PIN_GROUP(drif0_data1_a),
++ SH_PFC_PIN_GROUP(drif0_ctrl_b),
++ SH_PFC_PIN_GROUP(drif0_data0_b),
++ SH_PFC_PIN_GROUP(drif0_data1_b),
++ SH_PFC_PIN_GROUP(drif0_ctrl_c),
++ SH_PFC_PIN_GROUP(drif0_data0_c),
++ SH_PFC_PIN_GROUP(drif0_data1_c),
++ SH_PFC_PIN_GROUP(drif1_ctrl_a),
++ SH_PFC_PIN_GROUP(drif1_data0_a),
++ SH_PFC_PIN_GROUP(drif1_data1_a),
++ SH_PFC_PIN_GROUP(drif1_ctrl_b),
++ SH_PFC_PIN_GROUP(drif1_data0_b),
++ SH_PFC_PIN_GROUP(drif1_data1_b),
++ SH_PFC_PIN_GROUP(drif1_ctrl_c),
++ SH_PFC_PIN_GROUP(drif1_data0_c),
++ SH_PFC_PIN_GROUP(drif1_data1_c),
++ SH_PFC_PIN_GROUP(drif2_ctrl_a),
++ SH_PFC_PIN_GROUP(drif2_data0_a),
++ SH_PFC_PIN_GROUP(drif2_data1_a),
++ SH_PFC_PIN_GROUP(drif2_ctrl_b),
++ SH_PFC_PIN_GROUP(drif2_data0_b),
++ SH_PFC_PIN_GROUP(drif2_data1_b),
++ SH_PFC_PIN_GROUP(drif3_ctrl_a),
++ SH_PFC_PIN_GROUP(drif3_data0_a),
++ SH_PFC_PIN_GROUP(drif3_data1_a),
++ SH_PFC_PIN_GROUP(drif3_ctrl_b),
++ SH_PFC_PIN_GROUP(drif3_data0_b),
++ SH_PFC_PIN_GROUP(drif3_data1_b),
+ SH_PFC_PIN_GROUP(i2c1_a),
+ SH_PFC_PIN_GROUP(i2c1_b),
+ SH_PFC_PIN_GROUP(i2c2_a),
+@@ -2027,6 +2272,48 @@ static const struct sh_pfc_pin_group pin
+ SH_PFC_PIN_GROUP(sdhi3_ds),
+ };
+
++static const char * const drif0_groups[] = {
++ "drif0_ctrl_a",
++ "drif0_data0_a",
++ "drif0_data1_a",
++ "drif0_ctrl_b",
++ "drif0_data0_b",
++ "drif0_data1_b",
++ "drif0_ctrl_c",
++ "drif0_data0_c",
++ "drif0_data1_c",
++};
++
++static const char * const drif1_groups[] = {
++ "drif1_ctrl_a",
++ "drif1_data0_a",
++ "drif1_data1_a",
++ "drif1_ctrl_b",
++ "drif1_data0_b",
++ "drif1_data1_b",
++ "drif1_ctrl_c",
++ "drif1_data0_c",
++ "drif1_data1_c",
++};
++
++static const char * const drif2_groups[] = {
++ "drif2_ctrl_a",
++ "drif2_data0_a",
++ "drif2_data1_a",
++ "drif2_ctrl_b",
++ "drif2_data0_b",
++ "drif2_data1_b",
++};
++
++static const char * const drif3_groups[] = {
++ "drif3_ctrl_a",
++ "drif3_data0_a",
++ "drif3_data1_a",
++ "drif3_ctrl_b",
++ "drif3_data0_b",
++ "drif3_data1_b",
++};
++
+ static const char * const i2c1_groups[] = {
+ "i2c1_a",
+ "i2c1_b",
+@@ -2132,6 +2419,10 @@ static const char * const sdhi3_groups[]
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(drif0),
++ SH_PFC_FUNCTION(drif1),
++ SH_PFC_FUNCTION(drif2),
++ SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c6),
diff --git a/patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch b/patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch
new file mode 100644
index 0000000..00fd760
--- /dev/null
+++ b/patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch
@@ -0,0 +1,55 @@
+From 95d78a928262ee5868334f40fb233cea28a8a62f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 17:30:59 +0200
+Subject: [PATCH 095/299] pinctrl: sh-pfc: r8a7796: Fix GPSR definitions for
+ SDHI2/3
+
+Fix off-by-one (row and/or register) errors in links to Peripheral
+Function Select Register bitfields from GPIO/Peripheral Function Select
+Register 4 macros for SDHI2 and SDHI3 pins.
+
+Based on rev. 0.52E of the R-Car Gen3 User's Manual.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0f866a9679215838328e1c0ed1892224672bb396)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -122,22 +122,22 @@
+ #define GPSR3_0 F_(SD0_CLK, IP7_19_16)
+
+ /* GPSR4 */
+-#define GPSR4_17 F_(SD3_DS, IP11_11_8)
+-#define GPSR4_16 F_(SD3_DAT7, IP10_7_4)
+-#define GPSR4_15 F_(SD3_DAT6, IP10_3_0)
+-#define GPSR4_14 F_(SD3_DAT5, IP9_31_28)
+-#define GPSR4_13 F_(SD3_DAT4, IP9_27_24)
++#define GPSR4_17 F_(SD3_DS, IP11_7_4)
++#define GPSR4_16 F_(SD3_DAT7, IP11_3_0)
++#define GPSR4_15 F_(SD3_DAT6, IP10_31_28)
++#define GPSR4_14 F_(SD3_DAT5, IP10_27_24)
++#define GPSR4_13 F_(SD3_DAT4, IP10_23_20)
+ #define GPSR4_12 F_(SD3_DAT3, IP10_19_16)
+ #define GPSR4_11 F_(SD3_DAT2, IP10_15_12)
+ #define GPSR4_10 F_(SD3_DAT1, IP10_11_8)
+ #define GPSR4_9 F_(SD3_DAT0, IP10_7_4)
+ #define GPSR4_8 F_(SD3_CMD, IP10_3_0)
+ #define GPSR4_7 F_(SD3_CLK, IP9_31_28)
+-#define GPSR4_6 F_(SD2_DS, IP9_23_20)
+-#define GPSR4_5 F_(SD2_DAT3, IP9_19_16)
+-#define GPSR4_4 F_(SD2_DAT2, IP9_15_12)
+-#define GPSR4_3 F_(SD2_DAT1, IP9_11_8)
+-#define GPSR4_2 F_(SD2_DAT0, IP9_7_4)
++#define GPSR4_6 F_(SD2_DS, IP9_27_24)
++#define GPSR4_5 F_(SD2_DAT3, IP9_23_20)
++#define GPSR4_4 F_(SD2_DAT2, IP9_19_16)
++#define GPSR4_3 F_(SD2_DAT1, IP9_15_12)
++#define GPSR4_2 F_(SD2_DAT0, IP9_11_8)
+ #define GPSR4_1 F_(SD2_CMD, IP9_7_4)
+ #define GPSR4_0 F_(SD2_CLK, IP9_3_0)
+
diff --git a/patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch b/patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch
new file mode 100644
index 0000000..930d859
--- /dev/null
+++ b/patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch
@@ -0,0 +1,135 @@
+From faae9b03b7da87c425cbbf00e5d78f1ba613a8ca Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Wed, 16 Mar 2016 11:44:19 +0900
+Subject: [PATCH 096/299] pinctrl: sh-pfc: r8a7796: Add EtherAVB pins, groups
+ and functions
+
+This patch adds AVB_LINK, AVB_MAGIC, AVB_PHY_INT, AVB_MDC, AVB_AVTP_PPS,
+AVB_AVTP_MATCH, AVB_AVTP_CAPTURE pins, groups and functions to R8A7796
+SoC.
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 9c99a63ec74f34f7afef6a475a89062caf14bd86)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 87 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 87 insertions(+)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -1490,6 +1490,71 @@ static const struct sh_pfc_pin pinmux_pi
+ PINMUX_GPIO_GP_ALL(),
+ };
+
++/* - EtherAVB --------------------------------------------------------------- */
++static const unsigned int avb_link_pins[] = {
++ /* AVB_LINK */
++ RCAR_GP_PIN(2, 12),
++};
++static const unsigned int avb_link_mux[] = {
++ AVB_LINK_MARK,
++};
++static const unsigned int avb_magic_pins[] = {
++ /* AVB_MAGIC_ */
++ RCAR_GP_PIN(2, 10),
++};
++static const unsigned int avb_magic_mux[] = {
++ AVB_MAGIC_MARK,
++};
++static const unsigned int avb_phy_int_pins[] = {
++ /* AVB_PHY_INT */
++ RCAR_GP_PIN(2, 11),
++};
++static const unsigned int avb_phy_int_mux[] = {
++ AVB_PHY_INT_MARK,
++};
++static const unsigned int avb_mdc_pins[] = {
++ /* AVB_MDC */
++ RCAR_GP_PIN(2, 9),
++};
++static const unsigned int avb_mdc_mux[] = {
++ AVB_MDC_MARK,
++};
++static const unsigned int avb_avtp_pps_pins[] = {
++ /* AVB_AVTP_PPS */
++ RCAR_GP_PIN(2, 6),
++};
++static const unsigned int avb_avtp_pps_mux[] = {
++ AVB_AVTP_PPS_MARK,
++};
++static const unsigned int avb_avtp_match_a_pins[] = {
++ /* AVB_AVTP_MATCH_A */
++ RCAR_GP_PIN(2, 13),
++};
++static const unsigned int avb_avtp_match_a_mux[] = {
++ AVB_AVTP_MATCH_A_MARK,
++};
++static const unsigned int avb_avtp_capture_a_pins[] = {
++ /* AVB_AVTP_CAPTURE_A */
++ RCAR_GP_PIN(2, 14),
++};
++static const unsigned int avb_avtp_capture_a_mux[] = {
++ AVB_AVTP_CAPTURE_A_MARK,
++};
++static const unsigned int avb_avtp_match_b_pins[] = {
++ /* AVB_AVTP_MATCH_B */
++ RCAR_GP_PIN(1, 8),
++};
++static const unsigned int avb_avtp_match_b_mux[] = {
++ AVB_AVTP_MATCH_B_MARK,
++};
++static const unsigned int avb_avtp_capture_b_pins[] = {
++ /* AVB_AVTP_CAPTURE_B */
++ RCAR_GP_PIN(1, 11),
++};
++static const unsigned int avb_avtp_capture_b_mux[] = {
++ AVB_AVTP_CAPTURE_B_MARK,
++};
++
+ /* - DRIF0 --------------------------------------------------------------- */
+ static const unsigned int drif0_ctrl_a_pins[] = {
+ /* CLK, SYNC */
+@@ -2178,6 +2243,15 @@ static const unsigned int sdhi3_ds_mux[]
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(avb_link),
++ SH_PFC_PIN_GROUP(avb_magic),
++ SH_PFC_PIN_GROUP(avb_phy_int),
++ SH_PFC_PIN_GROUP(avb_mdc),
++ SH_PFC_PIN_GROUP(avb_avtp_pps),
++ SH_PFC_PIN_GROUP(avb_avtp_match_a),
++ SH_PFC_PIN_GROUP(avb_avtp_capture_a),
++ SH_PFC_PIN_GROUP(avb_avtp_match_b),
++ SH_PFC_PIN_GROUP(avb_avtp_capture_b),
+ SH_PFC_PIN_GROUP(drif0_ctrl_a),
+ SH_PFC_PIN_GROUP(drif0_data0_a),
+ SH_PFC_PIN_GROUP(drif0_data1_a),
+@@ -2272,6 +2346,18 @@ static const struct sh_pfc_pin_group pin
+ SH_PFC_PIN_GROUP(sdhi3_ds),
+ };
+
++static const char * const avb_groups[] = {
++ "avb_link",
++ "avb_magic",
++ "avb_phy_int",
++ "avb_mdc",
++ "avb_avtp_pps",
++ "avb_avtp_match_a",
++ "avb_avtp_capture_a",
++ "avb_avtp_match_b",
++ "avb_avtp_capture_b",
++};
++
+ static const char * const drif0_groups[] = {
+ "drif0_ctrl_a",
+ "drif0_data0_a",
+@@ -2419,6 +2505,7 @@ static const char * const sdhi3_groups[]
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(avb),
+ SH_PFC_FUNCTION(drif0),
+ SH_PFC_FUNCTION(drif1),
+ SH_PFC_FUNCTION(drif2),
diff --git a/patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch b/patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch
new file mode 100644
index 0000000..b48a1ee
--- /dev/null
+++ b/patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch
@@ -0,0 +1,153 @@
+From 005ffe875025652452adfbf2fe27497950d9e994 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Fri, 11 Nov 2016 21:40:03 +0100
+Subject: [PATCH 097/299] pinctrl: sh-pfc: r8a7796: Add DU support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Only the DU parallel RGB output signals are included, HDMI and TCON pins
+will be added in separate groups. Based on a similar patch from Laurent
+Pinchart for the r8a7795 PFC driver.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit cccc618a0b74867efb2211be6573ecf729a56ed0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 101 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 101 insertions(+)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+@@ -1770,6 +1770,87 @@ static const unsigned int drif3_data1_b_
+ RIF3_D1_B_MARK,
+ };
+
++/* - DU --------------------------------------------------------------------- */
++static const unsigned int du_rgb666_pins[] = {
++ /* R[7:2], G[7:2], B[7:2] */
++ RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
++ RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
++ RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
++ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
++ RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5),
++ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2),
++};
++static const unsigned int du_rgb666_mux[] = {
++ DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
++ DU_DR3_MARK, DU_DR2_MARK,
++ DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
++ DU_DG3_MARK, DU_DG2_MARK,
++ DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
++ DU_DB3_MARK, DU_DB2_MARK,
++};
++static const unsigned int du_rgb888_pins[] = {
++ /* R[7:0], G[7:0], B[7:0] */
++ RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
++ RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
++ RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 8),
++ RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
++ RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
++ RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16),
++ RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5),
++ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2),
++ RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0),
++};
++static const unsigned int du_rgb888_mux[] = {
++ DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK,
++ DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK,
++ DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK,
++ DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK,
++ DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK,
++ DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK,
++};
++static const unsigned int du_clk_out_0_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(1, 27),
++};
++static const unsigned int du_clk_out_0_mux[] = {
++ DU_DOTCLKOUT0_MARK
++};
++static const unsigned int du_clk_out_1_pins[] = {
++ /* CLKOUT */
++ RCAR_GP_PIN(2, 3),
++};
++static const unsigned int du_clk_out_1_mux[] = {
++ DU_DOTCLKOUT1_MARK
++};
++static const unsigned int du_sync_pins[] = {
++ /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
++ RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
++};
++static const unsigned int du_sync_mux[] = {
++ DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK
++};
++static const unsigned int du_oddf_pins[] = {
++ /* EXDISP/EXODDF/EXCDE */
++ RCAR_GP_PIN(2, 2),
++};
++static const unsigned int du_oddf_mux[] = {
++ DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
++};
++static const unsigned int du_cde_pins[] = {
++ /* CDE */
++ RCAR_GP_PIN(2, 0),
++};
++static const unsigned int du_cde_mux[] = {
++ DU_CDE_MARK,
++};
++static const unsigned int du_disp_pins[] = {
++ /* DISP */
++ RCAR_GP_PIN(2, 1),
++};
++static const unsigned int du_disp_mux[] = {
++ DU_DISP_MARK,
++};
++
+ /* - I2C -------------------------------------------------------------------- */
+ static const unsigned int i2c1_a_pins[] = {
+ /* SDA, SCL */
+@@ -2282,6 +2363,14 @@ static const struct sh_pfc_pin_group pin
+ SH_PFC_PIN_GROUP(drif3_ctrl_b),
+ SH_PFC_PIN_GROUP(drif3_data0_b),
+ SH_PFC_PIN_GROUP(drif3_data1_b),
++ SH_PFC_PIN_GROUP(du_rgb666),
++ SH_PFC_PIN_GROUP(du_rgb888),
++ SH_PFC_PIN_GROUP(du_clk_out_0),
++ SH_PFC_PIN_GROUP(du_clk_out_1),
++ SH_PFC_PIN_GROUP(du_sync),
++ SH_PFC_PIN_GROUP(du_oddf),
++ SH_PFC_PIN_GROUP(du_cde),
++ SH_PFC_PIN_GROUP(du_disp),
+ SH_PFC_PIN_GROUP(i2c1_a),
+ SH_PFC_PIN_GROUP(i2c1_b),
+ SH_PFC_PIN_GROUP(i2c2_a),
+@@ -2400,6 +2489,17 @@ static const char * const drif3_groups[]
+ "drif3_data1_b",
+ };
+
++static const char * const du_groups[] = {
++ "du_rgb666",
++ "du_rgb888",
++ "du_clk_out_0",
++ "du_clk_out_1",
++ "du_sync",
++ "du_oddf",
++ "du_cde",
++ "du_disp",
++};
++
+ static const char * const i2c1_groups[] = {
+ "i2c1_a",
+ "i2c1_b",
+@@ -2510,6 +2610,7 @@ static const struct sh_pfc_function pinm
+ SH_PFC_FUNCTION(drif1),
+ SH_PFC_FUNCTION(drif2),
+ SH_PFC_FUNCTION(drif3),
++ SH_PFC_FUNCTION(du),
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c6),
diff --git a/patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch b/patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch
new file mode 100644
index 0000000..9812d96
--- /dev/null
+++ b/patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch
@@ -0,0 +1,43 @@
+From fb2e5c612b9977b359e110eb3b82671b33a2dd83 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Sat, 12 Nov 2016 17:04:26 +0100
+Subject: [PATCH 098/299] pinctrl: sh-pfc: r8a7795: Simplify get bias logic
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The last else statement is missing braces, and the indentation level can
+be reduced.
+
+Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 42831cf96531bf4dd9035fb8a94afe8e1fc235b3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 11 +++++------
+ 1 file changed, 5 insertions(+), 6 deletions(-)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -5366,13 +5366,12 @@ static unsigned int r8a7795_pinmux_get_b
+ reg = info->reg;
+ bit = BIT(info->bit);
+
+- if (sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit) {
+- if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
+- return PIN_CONFIG_BIAS_PULL_UP;
+- else
+- return PIN_CONFIG_BIAS_PULL_DOWN;
+- } else
++ if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit))
+ return PIN_CONFIG_BIAS_DISABLE;
++ else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit)
++ return PIN_CONFIG_BIAS_PULL_UP;
++ else
++ return PIN_CONFIG_BIAS_PULL_DOWN;
+ }
+
+ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
diff --git a/patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch b/patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch
new file mode 100644
index 0000000..8f6ee54
--- /dev/null
+++ b/patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch
@@ -0,0 +1,404 @@
+From 2b28d9df2de0c95ba90ea67f1d3d48d593e9a255 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Sat, 12 Nov 2016 17:04:28 +0100
+Subject: [PATCH 099/299] pinctrl: sh-pfc: r8a7778: Use lookup function for
+ bias data
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Change the data structure and use the generic sh_pfc_pin_to_bias_info()
+function to get the register offset and bit information.
+
+Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 5c296f69ab71c9a91bc7992b549eda824dfc4a43)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 342 +++++++++++++++++------------------
+ 1 file changed, 172 insertions(+), 170 deletions(-)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+@@ -24,6 +24,7 @@
+ #include <linux/kernel.h>
+ #include <linux/pinctrl/pinconf-generic.h>
+
++#include "core.h"
+ #include "sh_pfc.h"
+
+ #define PORT_GP_PUP_1(bank, pin, fn, sfx) \
+@@ -2918,183 +2919,182 @@ static const struct pinmux_cfg_reg pinmu
+ #define PUPR4 0x110
+ #define PUPR5 0x114
+
+-static const struct {
+- u16 reg : 11;
+- u16 bit : 5;
+-} pullups[] = {
+- [RCAR_GP_PIN(0, 6)] = { PUPR0, 0 }, /* A0 */
+- [RCAR_GP_PIN(0, 7)] = { PUPR0, 1 }, /* A1 */
+- [RCAR_GP_PIN(0, 8)] = { PUPR0, 2 }, /* A2 */
+- [RCAR_GP_PIN(0, 9)] = { PUPR0, 3 }, /* A3 */
+- [RCAR_GP_PIN(0, 10)] = { PUPR0, 4 }, /* A4 */
+- [RCAR_GP_PIN(0, 11)] = { PUPR0, 5 }, /* A5 */
+- [RCAR_GP_PIN(0, 12)] = { PUPR0, 6 }, /* A6 */
+- [RCAR_GP_PIN(0, 13)] = { PUPR0, 7 }, /* A7 */
+- [RCAR_GP_PIN(0, 14)] = { PUPR0, 8 }, /* A8 */
+- [RCAR_GP_PIN(0, 15)] = { PUPR0, 9 }, /* A9 */
+- [RCAR_GP_PIN(0, 16)] = { PUPR0, 10 }, /* A10 */
+- [RCAR_GP_PIN(0, 17)] = { PUPR0, 11 }, /* A11 */
+- [RCAR_GP_PIN(0, 18)] = { PUPR0, 12 }, /* A12 */
+- [RCAR_GP_PIN(0, 19)] = { PUPR0, 13 }, /* A13 */
+- [RCAR_GP_PIN(0, 20)] = { PUPR0, 14 }, /* A14 */
+- [RCAR_GP_PIN(0, 21)] = { PUPR0, 15 }, /* A15 */
+- [RCAR_GP_PIN(0, 22)] = { PUPR0, 16 }, /* A16 */
+- [RCAR_GP_PIN(0, 23)] = { PUPR0, 17 }, /* A17 */
+- [RCAR_GP_PIN(0, 24)] = { PUPR0, 18 }, /* A18 */
+- [RCAR_GP_PIN(0, 25)] = { PUPR0, 19 }, /* A19 */
+- [RCAR_GP_PIN(0, 26)] = { PUPR0, 20 }, /* A20 */
+- [RCAR_GP_PIN(0, 27)] = { PUPR0, 21 }, /* A21 */
+- [RCAR_GP_PIN(0, 28)] = { PUPR0, 22 }, /* A22 */
+- [RCAR_GP_PIN(0, 29)] = { PUPR0, 23 }, /* A23 */
+- [RCAR_GP_PIN(0, 30)] = { PUPR0, 24 }, /* A24 */
+- [RCAR_GP_PIN(0, 31)] = { PUPR0, 25 }, /* A25 */
+- [RCAR_GP_PIN(1, 3)] = { PUPR0, 26 }, /* /EX_CS0 */
+- [RCAR_GP_PIN(1, 4)] = { PUPR0, 27 }, /* /EX_CS1 */
+- [RCAR_GP_PIN(1, 5)] = { PUPR0, 28 }, /* /EX_CS2 */
+- [RCAR_GP_PIN(1, 6)] = { PUPR0, 29 }, /* /EX_CS3 */
+- [RCAR_GP_PIN(1, 7)] = { PUPR0, 30 }, /* /EX_CS4 */
+- [RCAR_GP_PIN(1, 8)] = { PUPR0, 31 }, /* /EX_CS5 */
+-
+- [RCAR_GP_PIN(0, 0)] = { PUPR1, 0 }, /* /PRESETOUT */
+- [RCAR_GP_PIN(0, 5)] = { PUPR1, 1 }, /* /BS */
+- [RCAR_GP_PIN(1, 0)] = { PUPR1, 2 }, /* RD//WR */
+- [RCAR_GP_PIN(1, 1)] = { PUPR1, 3 }, /* /WE0 */
+- [RCAR_GP_PIN(1, 2)] = { PUPR1, 4 }, /* /WE1 */
+- [RCAR_GP_PIN(1, 11)] = { PUPR1, 5 }, /* EX_WAIT0 */
+- [RCAR_GP_PIN(1, 9)] = { PUPR1, 6 }, /* DREQ0 */
+- [RCAR_GP_PIN(1, 10)] = { PUPR1, 7 }, /* DACK0 */
+- [RCAR_GP_PIN(1, 12)] = { PUPR1, 8 }, /* IRQ0 */
+- [RCAR_GP_PIN(1, 13)] = { PUPR1, 9 }, /* IRQ1 */
+-
+- [RCAR_GP_PIN(1, 22)] = { PUPR2, 0 }, /* DU0_DR0 */
+- [RCAR_GP_PIN(1, 23)] = { PUPR2, 1 }, /* DU0_DR1 */
+- [RCAR_GP_PIN(1, 24)] = { PUPR2, 2 }, /* DU0_DR2 */
+- [RCAR_GP_PIN(1, 25)] = { PUPR2, 3 }, /* DU0_DR3 */
+- [RCAR_GP_PIN(1, 26)] = { PUPR2, 4 }, /* DU0_DR4 */
+- [RCAR_GP_PIN(1, 27)] = { PUPR2, 5 }, /* DU0_DR5 */
+- [RCAR_GP_PIN(1, 28)] = { PUPR2, 6 }, /* DU0_DR6 */
+- [RCAR_GP_PIN(1, 29)] = { PUPR2, 7 }, /* DU0_DR7 */
+- [RCAR_GP_PIN(1, 30)] = { PUPR2, 8 }, /* DU0_DG0 */
+- [RCAR_GP_PIN(1, 31)] = { PUPR2, 9 }, /* DU0_DG1 */
+- [RCAR_GP_PIN(2, 0)] = { PUPR2, 10 }, /* DU0_DG2 */
+- [RCAR_GP_PIN(2, 1)] = { PUPR2, 11 }, /* DU0_DG3 */
+- [RCAR_GP_PIN(2, 2)] = { PUPR2, 12 }, /* DU0_DG4 */
+- [RCAR_GP_PIN(2, 3)] = { PUPR2, 13 }, /* DU0_DG5 */
+- [RCAR_GP_PIN(2, 4)] = { PUPR2, 14 }, /* DU0_DG6 */
+- [RCAR_GP_PIN(2, 5)] = { PUPR2, 15 }, /* DU0_DG7 */
+- [RCAR_GP_PIN(2, 6)] = { PUPR2, 16 }, /* DU0_DB0 */
+- [RCAR_GP_PIN(2, 7)] = { PUPR2, 17 }, /* DU0_DB1 */
+- [RCAR_GP_PIN(2, 8)] = { PUPR2, 18 }, /* DU0_DB2 */
+- [RCAR_GP_PIN(2, 9)] = { PUPR2, 19 }, /* DU0_DB3 */
+- [RCAR_GP_PIN(2, 10)] = { PUPR2, 20 }, /* DU0_DB4 */
+- [RCAR_GP_PIN(2, 11)] = { PUPR2, 21 }, /* DU0_DB5 */
+- [RCAR_GP_PIN(2, 12)] = { PUPR2, 22 }, /* DU0_DB6 */
+- [RCAR_GP_PIN(2, 13)] = { PUPR2, 23 }, /* DU0_DB7 */
+- [RCAR_GP_PIN(2, 14)] = { PUPR2, 24 }, /* DU0_DOTCLKIN */
+- [RCAR_GP_PIN(2, 15)] = { PUPR2, 25 }, /* DU0_DOTCLKOUT0 */
+- [RCAR_GP_PIN(2, 17)] = { PUPR2, 26 }, /* DU0_HSYNC */
+- [RCAR_GP_PIN(2, 18)] = { PUPR2, 27 }, /* DU0_VSYNC */
+- [RCAR_GP_PIN(2, 19)] = { PUPR2, 28 }, /* DU0_EXODDF */
+- [RCAR_GP_PIN(2, 20)] = { PUPR2, 29 }, /* DU0_DISP */
+- [RCAR_GP_PIN(2, 21)] = { PUPR2, 30 }, /* DU0_CDE */
+- [RCAR_GP_PIN(2, 16)] = { PUPR2, 31 }, /* DU0_DOTCLKOUT1 */
+-
+- [RCAR_GP_PIN(3, 24)] = { PUPR3, 0 }, /* VI0_CLK */
+- [RCAR_GP_PIN(3, 25)] = { PUPR3, 1 }, /* VI0_CLKENB */
+- [RCAR_GP_PIN(3, 26)] = { PUPR3, 2 }, /* VI0_FIELD */
+- [RCAR_GP_PIN(3, 27)] = { PUPR3, 3 }, /* /VI0_HSYNC */
+- [RCAR_GP_PIN(3, 28)] = { PUPR3, 4 }, /* /VI0_VSYNC */
+- [RCAR_GP_PIN(3, 29)] = { PUPR3, 5 }, /* VI0_DATA0 */
+- [RCAR_GP_PIN(3, 30)] = { PUPR3, 6 }, /* VI0_DATA1 */
+- [RCAR_GP_PIN(3, 31)] = { PUPR3, 7 }, /* VI0_DATA2 */
+- [RCAR_GP_PIN(4, 0)] = { PUPR3, 8 }, /* VI0_DATA3 */
+- [RCAR_GP_PIN(4, 1)] = { PUPR3, 9 }, /* VI0_DATA4 */
+- [RCAR_GP_PIN(4, 2)] = { PUPR3, 10 }, /* VI0_DATA5 */
+- [RCAR_GP_PIN(4, 3)] = { PUPR3, 11 }, /* VI0_DATA6 */
+- [RCAR_GP_PIN(4, 4)] = { PUPR3, 12 }, /* VI0_DATA7 */
+- [RCAR_GP_PIN(4, 5)] = { PUPR3, 13 }, /* VI0_G2 */
+- [RCAR_GP_PIN(4, 6)] = { PUPR3, 14 }, /* VI0_G3 */
+- [RCAR_GP_PIN(4, 7)] = { PUPR3, 15 }, /* VI0_G4 */
+- [RCAR_GP_PIN(4, 8)] = { PUPR3, 16 }, /* VI0_G5 */
+- [RCAR_GP_PIN(4, 21)] = { PUPR3, 17 }, /* VI1_DATA12 */
+- [RCAR_GP_PIN(4, 22)] = { PUPR3, 18 }, /* VI1_DATA13 */
+- [RCAR_GP_PIN(4, 23)] = { PUPR3, 19 }, /* VI1_DATA14 */
+- [RCAR_GP_PIN(4, 24)] = { PUPR3, 20 }, /* VI1_DATA15 */
+- [RCAR_GP_PIN(4, 9)] = { PUPR3, 21 }, /* ETH_REF_CLK */
+- [RCAR_GP_PIN(4, 10)] = { PUPR3, 22 }, /* ETH_TXD0 */
+- [RCAR_GP_PIN(4, 11)] = { PUPR3, 23 }, /* ETH_TXD1 */
+- [RCAR_GP_PIN(4, 12)] = { PUPR3, 24 }, /* ETH_CRS_DV */
+- [RCAR_GP_PIN(4, 13)] = { PUPR3, 25 }, /* ETH_TX_EN */
+- [RCAR_GP_PIN(4, 14)] = { PUPR3, 26 }, /* ETH_RX_ER */
+- [RCAR_GP_PIN(4, 15)] = { PUPR3, 27 }, /* ETH_RXD0 */
+- [RCAR_GP_PIN(4, 16)] = { PUPR3, 28 }, /* ETH_RXD1 */
+- [RCAR_GP_PIN(4, 17)] = { PUPR3, 29 }, /* ETH_MDC */
+- [RCAR_GP_PIN(4, 18)] = { PUPR3, 30 }, /* ETH_MDIO */
+- [RCAR_GP_PIN(4, 19)] = { PUPR3, 31 }, /* ETH_LINK */
+-
+- [RCAR_GP_PIN(3, 6)] = { PUPR4, 0 }, /* SSI_SCK012 */
+- [RCAR_GP_PIN(3, 7)] = { PUPR4, 1 }, /* SSI_WS012 */
+- [RCAR_GP_PIN(3, 10)] = { PUPR4, 2 }, /* SSI_SDATA0 */
+- [RCAR_GP_PIN(3, 9)] = { PUPR4, 3 }, /* SSI_SDATA1 */
+- [RCAR_GP_PIN(3, 8)] = { PUPR4, 4 }, /* SSI_SDATA2 */
+- [RCAR_GP_PIN(3, 2)] = { PUPR4, 5 }, /* SSI_SCK34 */
+- [RCAR_GP_PIN(3, 3)] = { PUPR4, 6 }, /* SSI_WS34 */
+- [RCAR_GP_PIN(3, 5)] = { PUPR4, 7 }, /* SSI_SDATA3 */
+- [RCAR_GP_PIN(3, 4)] = { PUPR4, 8 }, /* SSI_SDATA4 */
+- [RCAR_GP_PIN(2, 31)] = { PUPR4, 9 }, /* SSI_SCK5 */
+- [RCAR_GP_PIN(3, 0)] = { PUPR4, 10 }, /* SSI_WS5 */
+- [RCAR_GP_PIN(3, 1)] = { PUPR4, 11 }, /* SSI_SDATA5 */
+- [RCAR_GP_PIN(2, 28)] = { PUPR4, 12 }, /* SSI_SCK6 */
+- [RCAR_GP_PIN(2, 29)] = { PUPR4, 13 }, /* SSI_WS6 */
+- [RCAR_GP_PIN(2, 30)] = { PUPR4, 14 }, /* SSI_SDATA6 */
+- [RCAR_GP_PIN(2, 24)] = { PUPR4, 15 }, /* SSI_SCK78 */
+- [RCAR_GP_PIN(2, 25)] = { PUPR4, 16 }, /* SSI_WS78 */
+- [RCAR_GP_PIN(2, 27)] = { PUPR4, 17 }, /* SSI_SDATA7 */
+- [RCAR_GP_PIN(2, 26)] = { PUPR4, 18 }, /* SSI_SDATA8 */
+- [RCAR_GP_PIN(3, 23)] = { PUPR4, 19 }, /* TCLK0 */
+- [RCAR_GP_PIN(3, 11)] = { PUPR4, 20 }, /* SD0_CLK */
+- [RCAR_GP_PIN(3, 12)] = { PUPR4, 21 }, /* SD0_CMD */
+- [RCAR_GP_PIN(3, 13)] = { PUPR4, 22 }, /* SD0_DAT0 */
+- [RCAR_GP_PIN(3, 14)] = { PUPR4, 23 }, /* SD0_DAT1 */
+- [RCAR_GP_PIN(3, 15)] = { PUPR4, 24 }, /* SD0_DAT2 */
+- [RCAR_GP_PIN(3, 16)] = { PUPR4, 25 }, /* SD0_DAT3 */
+- [RCAR_GP_PIN(3, 17)] = { PUPR4, 26 }, /* SD0_CD */
+- [RCAR_GP_PIN(3, 18)] = { PUPR4, 27 }, /* SD0_WP */
+- [RCAR_GP_PIN(2, 22)] = { PUPR4, 28 }, /* AUDIO_CLKA */
+- [RCAR_GP_PIN(2, 23)] = { PUPR4, 29 }, /* AUDIO_CLKB */
+- [RCAR_GP_PIN(1, 14)] = { PUPR4, 30 }, /* IRQ2 */
+- [RCAR_GP_PIN(1, 15)] = { PUPR4, 31 }, /* IRQ3 */
+-
+- [RCAR_GP_PIN(0, 1)] = { PUPR5, 0 }, /* PENC0 */
+- [RCAR_GP_PIN(0, 2)] = { PUPR5, 1 }, /* PENC1 */
+- [RCAR_GP_PIN(0, 3)] = { PUPR5, 2 }, /* USB_OVC0 */
+- [RCAR_GP_PIN(0, 4)] = { PUPR5, 3 }, /* USB_OVC1 */
+- [RCAR_GP_PIN(1, 16)] = { PUPR5, 4 }, /* SCIF_CLK */
+- [RCAR_GP_PIN(1, 17)] = { PUPR5, 5 }, /* TX0 */
+- [RCAR_GP_PIN(1, 18)] = { PUPR5, 6 }, /* RX0 */
+- [RCAR_GP_PIN(1, 19)] = { PUPR5, 7 }, /* SCK0 */
+- [RCAR_GP_PIN(1, 20)] = { PUPR5, 8 }, /* /CTS0 */
+- [RCAR_GP_PIN(1, 21)] = { PUPR5, 9 }, /* /RTS0 */
+- [RCAR_GP_PIN(3, 19)] = { PUPR5, 10 }, /* HSPI_CLK0 */
+- [RCAR_GP_PIN(3, 20)] = { PUPR5, 11 }, /* /HSPI_CS0 */
+- [RCAR_GP_PIN(3, 21)] = { PUPR5, 12 }, /* HSPI_RX0 */
+- [RCAR_GP_PIN(3, 22)] = { PUPR5, 13 }, /* HSPI_TX0 */
+- [RCAR_GP_PIN(4, 20)] = { PUPR5, 14 }, /* ETH_MAGIC */
+- [RCAR_GP_PIN(4, 25)] = { PUPR5, 15 }, /* AVS1 */
+- [RCAR_GP_PIN(4, 26)] = { PUPR5, 16 }, /* AVS2 */
++static const struct sh_pfc_bias_info bias_info[] = {
++ { RCAR_GP_PIN(0, 6), PUPR0, 0 }, /* A0 */
++ { RCAR_GP_PIN(0, 7), PUPR0, 1 }, /* A1 */
++ { RCAR_GP_PIN(0, 8), PUPR0, 2 }, /* A2 */
++ { RCAR_GP_PIN(0, 9), PUPR0, 3 }, /* A3 */
++ { RCAR_GP_PIN(0, 10), PUPR0, 4 }, /* A4 */
++ { RCAR_GP_PIN(0, 11), PUPR0, 5 }, /* A5 */
++ { RCAR_GP_PIN(0, 12), PUPR0, 6 }, /* A6 */
++ { RCAR_GP_PIN(0, 13), PUPR0, 7 }, /* A7 */
++ { RCAR_GP_PIN(0, 14), PUPR0, 8 }, /* A8 */
++ { RCAR_GP_PIN(0, 15), PUPR0, 9 }, /* A9 */
++ { RCAR_GP_PIN(0, 16), PUPR0, 10 }, /* A10 */
++ { RCAR_GP_PIN(0, 17), PUPR0, 11 }, /* A11 */
++ { RCAR_GP_PIN(0, 18), PUPR0, 12 }, /* A12 */
++ { RCAR_GP_PIN(0, 19), PUPR0, 13 }, /* A13 */
++ { RCAR_GP_PIN(0, 20), PUPR0, 14 }, /* A14 */
++ { RCAR_GP_PIN(0, 21), PUPR0, 15 }, /* A15 */
++ { RCAR_GP_PIN(0, 22), PUPR0, 16 }, /* A16 */
++ { RCAR_GP_PIN(0, 23), PUPR0, 17 }, /* A17 */
++ { RCAR_GP_PIN(0, 24), PUPR0, 18 }, /* A18 */
++ { RCAR_GP_PIN(0, 25), PUPR0, 19 }, /* A19 */
++ { RCAR_GP_PIN(0, 26), PUPR0, 20 }, /* A20 */
++ { RCAR_GP_PIN(0, 27), PUPR0, 21 }, /* A21 */
++ { RCAR_GP_PIN(0, 28), PUPR0, 22 }, /* A22 */
++ { RCAR_GP_PIN(0, 29), PUPR0, 23 }, /* A23 */
++ { RCAR_GP_PIN(0, 30), PUPR0, 24 }, /* A24 */
++ { RCAR_GP_PIN(0, 31), PUPR0, 25 }, /* A25 */
++ { RCAR_GP_PIN(1, 3), PUPR0, 26 }, /* /EX_CS0 */
++ { RCAR_GP_PIN(1, 4), PUPR0, 27 }, /* /EX_CS1 */
++ { RCAR_GP_PIN(1, 5), PUPR0, 28 }, /* /EX_CS2 */
++ { RCAR_GP_PIN(1, 6), PUPR0, 29 }, /* /EX_CS3 */
++ { RCAR_GP_PIN(1, 7), PUPR0, 30 }, /* /EX_CS4 */
++ { RCAR_GP_PIN(1, 8), PUPR0, 31 }, /* /EX_CS5 */
++
++ { RCAR_GP_PIN(0, 0), PUPR1, 0 }, /* /PRESETOUT */
++ { RCAR_GP_PIN(0, 5), PUPR1, 1 }, /* /BS */
++ { RCAR_GP_PIN(1, 0), PUPR1, 2 }, /* RD//WR */
++ { RCAR_GP_PIN(1, 1), PUPR1, 3 }, /* /WE0 */
++ { RCAR_GP_PIN(1, 2), PUPR1, 4 }, /* /WE1 */
++ { RCAR_GP_PIN(1, 11), PUPR1, 5 }, /* EX_WAIT0 */
++ { RCAR_GP_PIN(1, 9), PUPR1, 6 }, /* DREQ0 */
++ { RCAR_GP_PIN(1, 10), PUPR1, 7 }, /* DACK0 */
++ { RCAR_GP_PIN(1, 12), PUPR1, 8 }, /* IRQ0 */
++ { RCAR_GP_PIN(1, 13), PUPR1, 9 }, /* IRQ1 */
++
++ { RCAR_GP_PIN(1, 22), PUPR2, 0 }, /* DU0_DR0 */
++ { RCAR_GP_PIN(1, 23), PUPR2, 1 }, /* DU0_DR1 */
++ { RCAR_GP_PIN(1, 24), PUPR2, 2 }, /* DU0_DR2 */
++ { RCAR_GP_PIN(1, 25), PUPR2, 3 }, /* DU0_DR3 */
++ { RCAR_GP_PIN(1, 26), PUPR2, 4 }, /* DU0_DR4 */
++ { RCAR_GP_PIN(1, 27), PUPR2, 5 }, /* DU0_DR5 */
++ { RCAR_GP_PIN(1, 28), PUPR2, 6 }, /* DU0_DR6 */
++ { RCAR_GP_PIN(1, 29), PUPR2, 7 }, /* DU0_DR7 */
++ { RCAR_GP_PIN(1, 30), PUPR2, 8 }, /* DU0_DG0 */
++ { RCAR_GP_PIN(1, 31), PUPR2, 9 }, /* DU0_DG1 */
++ { RCAR_GP_PIN(2, 0), PUPR2, 10 }, /* DU0_DG2 */
++ { RCAR_GP_PIN(2, 1), PUPR2, 11 }, /* DU0_DG3 */
++ { RCAR_GP_PIN(2, 2), PUPR2, 12 }, /* DU0_DG4 */
++ { RCAR_GP_PIN(2, 3), PUPR2, 13 }, /* DU0_DG5 */
++ { RCAR_GP_PIN(2, 4), PUPR2, 14 }, /* DU0_DG6 */
++ { RCAR_GP_PIN(2, 5), PUPR2, 15 }, /* DU0_DG7 */
++ { RCAR_GP_PIN(2, 6), PUPR2, 16 }, /* DU0_DB0 */
++ { RCAR_GP_PIN(2, 7), PUPR2, 17 }, /* DU0_DB1 */
++ { RCAR_GP_PIN(2, 8), PUPR2, 18 }, /* DU0_DB2 */
++ { RCAR_GP_PIN(2, 9), PUPR2, 19 }, /* DU0_DB3 */
++ { RCAR_GP_PIN(2, 10), PUPR2, 20 }, /* DU0_DB4 */
++ { RCAR_GP_PIN(2, 11), PUPR2, 21 }, /* DU0_DB5 */
++ { RCAR_GP_PIN(2, 12), PUPR2, 22 }, /* DU0_DB6 */
++ { RCAR_GP_PIN(2, 13), PUPR2, 23 }, /* DU0_DB7 */
++ { RCAR_GP_PIN(2, 14), PUPR2, 24 }, /* DU0_DOTCLKIN */
++ { RCAR_GP_PIN(2, 15), PUPR2, 25 }, /* DU0_DOTCLKOUT0 */
++ { RCAR_GP_PIN(2, 17), PUPR2, 26 }, /* DU0_HSYNC */
++ { RCAR_GP_PIN(2, 18), PUPR2, 27 }, /* DU0_VSYNC */
++ { RCAR_GP_PIN(2, 19), PUPR2, 28 }, /* DU0_EXODDF */
++ { RCAR_GP_PIN(2, 20), PUPR2, 29 }, /* DU0_DISP */
++ { RCAR_GP_PIN(2, 21), PUPR2, 30 }, /* DU0_CDE */
++ { RCAR_GP_PIN(2, 16), PUPR2, 31 }, /* DU0_DOTCLKOUT1 */
++
++ { RCAR_GP_PIN(3, 24), PUPR3, 0 }, /* VI0_CLK */
++ { RCAR_GP_PIN(3, 25), PUPR3, 1 }, /* VI0_CLKENB */
++ { RCAR_GP_PIN(3, 26), PUPR3, 2 }, /* VI0_FIELD */
++ { RCAR_GP_PIN(3, 27), PUPR3, 3 }, /* /VI0_HSYNC */
++ { RCAR_GP_PIN(3, 28), PUPR3, 4 }, /* /VI0_VSYNC */
++ { RCAR_GP_PIN(3, 29), PUPR3, 5 }, /* VI0_DATA0 */
++ { RCAR_GP_PIN(3, 30), PUPR3, 6 }, /* VI0_DATA1 */
++ { RCAR_GP_PIN(3, 31), PUPR3, 7 }, /* VI0_DATA2 */
++ { RCAR_GP_PIN(4, 0), PUPR3, 8 }, /* VI0_DATA3 */
++ { RCAR_GP_PIN(4, 1), PUPR3, 9 }, /* VI0_DATA4 */
++ { RCAR_GP_PIN(4, 2), PUPR3, 10 }, /* VI0_DATA5 */
++ { RCAR_GP_PIN(4, 3), PUPR3, 11 }, /* VI0_DATA6 */
++ { RCAR_GP_PIN(4, 4), PUPR3, 12 }, /* VI0_DATA7 */
++ { RCAR_GP_PIN(4, 5), PUPR3, 13 }, /* VI0_G2 */
++ { RCAR_GP_PIN(4, 6), PUPR3, 14 }, /* VI0_G3 */
++ { RCAR_GP_PIN(4, 7), PUPR3, 15 }, /* VI0_G4 */
++ { RCAR_GP_PIN(4, 8), PUPR3, 16 }, /* VI0_G5 */
++ { RCAR_GP_PIN(4, 21), PUPR3, 17 }, /* VI1_DATA12 */
++ { RCAR_GP_PIN(4, 22), PUPR3, 18 }, /* VI1_DATA13 */
++ { RCAR_GP_PIN(4, 23), PUPR3, 19 }, /* VI1_DATA14 */
++ { RCAR_GP_PIN(4, 24), PUPR3, 20 }, /* VI1_DATA15 */
++ { RCAR_GP_PIN(4, 9), PUPR3, 21 }, /* ETH_REF_CLK */
++ { RCAR_GP_PIN(4, 10), PUPR3, 22 }, /* ETH_TXD0 */
++ { RCAR_GP_PIN(4, 11), PUPR3, 23 }, /* ETH_TXD1 */
++ { RCAR_GP_PIN(4, 12), PUPR3, 24 }, /* ETH_CRS_DV */
++ { RCAR_GP_PIN(4, 13), PUPR3, 25 }, /* ETH_TX_EN */
++ { RCAR_GP_PIN(4, 14), PUPR3, 26 }, /* ETH_RX_ER */
++ { RCAR_GP_PIN(4, 15), PUPR3, 27 }, /* ETH_RXD0 */
++ { RCAR_GP_PIN(4, 16), PUPR3, 28 }, /* ETH_RXD1 */
++ { RCAR_GP_PIN(4, 17), PUPR3, 29 }, /* ETH_MDC */
++ { RCAR_GP_PIN(4, 18), PUPR3, 30 }, /* ETH_MDIO */
++ { RCAR_GP_PIN(4, 19), PUPR3, 31 }, /* ETH_LINK */
++
++ { RCAR_GP_PIN(3, 6), PUPR4, 0 }, /* SSI_SCK012 */
++ { RCAR_GP_PIN(3, 7), PUPR4, 1 }, /* SSI_WS012 */
++ { RCAR_GP_PIN(3, 10), PUPR4, 2 }, /* SSI_SDATA0 */
++ { RCAR_GP_PIN(3, 9), PUPR4, 3 }, /* SSI_SDATA1 */
++ { RCAR_GP_PIN(3, 8), PUPR4, 4 }, /* SSI_SDATA2 */
++ { RCAR_GP_PIN(3, 2), PUPR4, 5 }, /* SSI_SCK34 */
++ { RCAR_GP_PIN(3, 3), PUPR4, 6 }, /* SSI_WS34 */
++ { RCAR_GP_PIN(3, 5), PUPR4, 7 }, /* SSI_SDATA3 */
++ { RCAR_GP_PIN(3, 4), PUPR4, 8 }, /* SSI_SDATA4 */
++ { RCAR_GP_PIN(2, 31), PUPR4, 9 }, /* SSI_SCK5 */
++ { RCAR_GP_PIN(3, 0), PUPR4, 10 }, /* SSI_WS5 */
++ { RCAR_GP_PIN(3, 1), PUPR4, 11 }, /* SSI_SDATA5 */
++ { RCAR_GP_PIN(2, 28), PUPR4, 12 }, /* SSI_SCK6 */
++ { RCAR_GP_PIN(2, 29), PUPR4, 13 }, /* SSI_WS6 */
++ { RCAR_GP_PIN(2, 30), PUPR4, 14 }, /* SSI_SDATA6 */
++ { RCAR_GP_PIN(2, 24), PUPR4, 15 }, /* SSI_SCK78 */
++ { RCAR_GP_PIN(2, 25), PUPR4, 16 }, /* SSI_WS78 */
++ { RCAR_GP_PIN(2, 27), PUPR4, 17 }, /* SSI_SDATA7 */
++ { RCAR_GP_PIN(2, 26), PUPR4, 18 }, /* SSI_SDATA8 */
++ { RCAR_GP_PIN(3, 23), PUPR4, 19 }, /* TCLK0 */
++ { RCAR_GP_PIN(3, 11), PUPR4, 20 }, /* SD0_CLK */
++ { RCAR_GP_PIN(3, 12), PUPR4, 21 }, /* SD0_CMD */
++ { RCAR_GP_PIN(3, 13), PUPR4, 22 }, /* SD0_DAT0 */
++ { RCAR_GP_PIN(3, 14), PUPR4, 23 }, /* SD0_DAT1 */
++ { RCAR_GP_PIN(3, 15), PUPR4, 24 }, /* SD0_DAT2 */
++ { RCAR_GP_PIN(3, 16), PUPR4, 25 }, /* SD0_DAT3 */
++ { RCAR_GP_PIN(3, 17), PUPR4, 26 }, /* SD0_CD */
++ { RCAR_GP_PIN(3, 18), PUPR4, 27 }, /* SD0_WP */
++ { RCAR_GP_PIN(2, 22), PUPR4, 28 }, /* AUDIO_CLKA */
++ { RCAR_GP_PIN(2, 23), PUPR4, 29 }, /* AUDIO_CLKB */
++ { RCAR_GP_PIN(1, 14), PUPR4, 30 }, /* IRQ2 */
++ { RCAR_GP_PIN(1, 15), PUPR4, 31 }, /* IRQ3 */
++
++ { RCAR_GP_PIN(0, 1), PUPR5, 0 }, /* PENC0 */
++ { RCAR_GP_PIN(0, 2), PUPR5, 1 }, /* PENC1 */
++ { RCAR_GP_PIN(0, 3), PUPR5, 2 }, /* USB_OVC0 */
++ { RCAR_GP_PIN(0, 4), PUPR5, 3 }, /* USB_OVC1 */
++ { RCAR_GP_PIN(1, 16), PUPR5, 4 }, /* SCIF_CLK */
++ { RCAR_GP_PIN(1, 17), PUPR5, 5 }, /* TX0 */
++ { RCAR_GP_PIN(1, 18), PUPR5, 6 }, /* RX0 */
++ { RCAR_GP_PIN(1, 19), PUPR5, 7 }, /* SCK0 */
++ { RCAR_GP_PIN(1, 20), PUPR5, 8 }, /* /CTS0 */
++ { RCAR_GP_PIN(1, 21), PUPR5, 9 }, /* /RTS0 */
++ { RCAR_GP_PIN(3, 19), PUPR5, 10 }, /* HSPI_CLK0 */
++ { RCAR_GP_PIN(3, 20), PUPR5, 11 }, /* /HSPI_CS0 */
++ { RCAR_GP_PIN(3, 21), PUPR5, 12 }, /* HSPI_RX0 */
++ { RCAR_GP_PIN(3, 22), PUPR5, 13 }, /* HSPI_TX0 */
++ { RCAR_GP_PIN(4, 20), PUPR5, 14 }, /* ETH_MAGIC */
++ { RCAR_GP_PIN(4, 25), PUPR5, 15 }, /* AVS1 */
++ { RCAR_GP_PIN(4, 26), PUPR5, 16 }, /* AVS2 */
+ };
+
+ static unsigned int r8a7778_pinmux_get_bias(struct sh_pfc *pfc,
+ unsigned int pin)
+ {
++ const struct sh_pfc_bias_info *info;
+ void __iomem *addr;
+
+- if (WARN_ON_ONCE(!pullups[pin].reg))
++ info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
++ if (!info)
+ return PIN_CONFIG_BIAS_DISABLE;
+
+- addr = pfc->windows->virt + pullups[pin].reg;
++ addr = pfc->windows->virt + info->reg;
+
+- if (ioread32(addr) & BIT(pullups[pin].bit))
++ if (ioread32(addr) & BIT(info->bit))
+ return PIN_CONFIG_BIAS_PULL_UP;
+ else
+ return PIN_CONFIG_BIAS_DISABLE;
+@@ -3103,15 +3103,17 @@ static unsigned int r8a7778_pinmux_get_b
+ static void r8a7778_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
+ unsigned int bias)
+ {
++ const struct sh_pfc_bias_info *info;
+ void __iomem *addr;
+ u32 value;
+ u32 bit;
+
+- if (WARN_ON_ONCE(!pullups[pin].reg))
++ info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin);
++ if (!info)
+ return;
+
+- addr = pfc->windows->virt + pullups[pin].reg;
+- bit = BIT(pullups[pin].bit);
++ addr = pfc->windows->virt + info->reg;
++ bit = BIT(info->bit);
+
+ value = ioread32(addr) & ~bit;
+ if (bias == PIN_CONFIG_BIAS_PULL_UP)
diff --git a/patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch b/patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch
new file mode 100644
index 0000000..f5df06c
--- /dev/null
+++ b/patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch
@@ -0,0 +1,45 @@
+From aaeb7b39c71c6e29094a96925d51d07eb3144804 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Sat, 12 Nov 2016 17:04:29 +0100
+Subject: [PATCH 100/299] pinctrl: sh-pfc: Support named pins with custom
+ configuration
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Pins not associated with a GPIO port can still have other configuration
+parameters. Add a new macro SH_PFC_PIN_NAMED_CFG which allows for named
+pins to be declared with a set of configurations. The new macro is an
+modification of SH_PFC_PIN_NAMED to allow for optional configuration to
+be assigned.
+
+The flag SH_PFC_PIN_CFG_NO_GPIO is still enforced as this should only be
+used to define pins not associated with a GPIO port.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 1ce56aea7cf4002f77891808ca4e06aa4e2b4ca6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -546,6 +546,14 @@ extern const struct sh_pfc_soc_info shx3
+ .configs = SH_PFC_PIN_CFG_NO_GPIO, \
+ }
+
++/* SH_PFC_PIN_NAMED_CFG - Expand to a sh_pfc_pin entry with the given name */
++#define SH_PFC_PIN_NAMED_CFG(row, col, _name, cfgs) \
++ { \
++ .pin = PIN_NUMBER(row, col), \
++ .name = __stringify(PIN_##_name), \
++ .configs = SH_PFC_PIN_CFG_NO_GPIO | cfgs, \
++ }
++
+ /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
+ * PORT_name_OUT, PORT_name_IN marks
+ */
diff --git a/patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch b/patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch
new file mode 100644
index 0000000..c024d21
--- /dev/null
+++ b/patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch
@@ -0,0 +1,254 @@
+From f20cde4ac5df717efff0bd8f0939c144c66e3977 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Fri, 11 Nov 2016 21:33:39 +0100
+Subject: [PATCH 101/299] pinctrl: sh-pfc: r8a7795: Support none GPIO pins with
+ configurable drive-strength
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+There are pins on the r8a7795 which are not part of a GPIO bank nor
+can be muxed between different functions. They do however allow for the
+drive-strength to be configured. Add those pins to the list of pins and
+to the drive-strength configuration registers.
+
+The pins can now be referred to in DT by function names and their
+drive-strength modified.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit ea9c740583c6857b07ffc310eca967bc39ff6a21)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 163 +++++++++++++++++++++++++++++++----
+ 1 file changed, 148 insertions(+), 15 deletions(-)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -523,6 +523,22 @@ MOD_SEL0_2_1 MOD_SEL1_2 \
+ MOD_SEL1_1 \
+ MOD_SEL1_0 MOD_SEL2_0
+
++/*
++ * These pins are not able to be muxed but have other properties
++ * that can be set, such as drive-strength or pull-up/pull-down enable.
++ */
++#define PINMUX_STATIC \
++ FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \
++ FM(QSPI0_IO2) FM(QSPI0_IO3) \
++ FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \
++ FM(QSPI1_IO2) FM(QSPI1_IO3) \
++ FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \
++ FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \
++ FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \
++ FM(AVB_TXCREFCLK) FM(AVB_MDIO) \
++ FM(CLKOUT) FM(PRESETOUT) \
++ FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) FM(DU_DOTCLKIN3) \
++ FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF)
+
+ enum {
+ PINMUX_RESERVED = 0,
+@@ -548,6 +564,7 @@ enum {
+ PINMUX_GPSR
+ PINMUX_IPSR
+ PINMUX_MOD_SELS
++ PINMUX_STATIC
+ PINMUX_MARK_END,
+ #undef F_
+ #undef FM
+@@ -1412,10 +1429,78 @@ static const u16 pinmux_data[] = {
+ PINMUX_IPSR_MSEL(IP17_7_4, STP_ISSYNC_0_E, SEL_SSP1_0_4),
+ PINMUX_IPSR_MSEL(IP17_7_4, RIF2_D1_B, SEL_DRIF2_1),
+ PINMUX_IPSR_GPSR(IP17_7_4, TPU0TO3),
++
++/*
++ * Static pins can not be muxed between different functions but
++ * still needs a mark entry in the pinmux list. Add each static
++ * pin to the list without an associated function. The sh-pfc
++ * core will do the right thing and skip trying to mux then pin
++ * while still applying configuration to it
++ */
++#define FM(x) PINMUX_DATA(x##_MARK, 0),
++ PINMUX_STATIC
++#undef FM
+ };
+
++/*
++ * R8A7795 has 8 banks with 32 PGIOS in each => 256 GPIOs.
++ * Physical layout rows: A - AW, cols: 1 - 39.
++ */
++#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
++#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300)
++#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
++
+ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
++
++ /*
++ * Pins not associated with a GPIO port.
++ *
++ * The pin positions are different between different r8a7795
++ * packages, all that is needed for the pfc driver is a unique
++ * number for each pin. To this end use the pin layout from
++ * R-Car H3SiP to calculate a unique number for each pin.
++ */
++ SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('F', 1, CLKOUT, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 7, DU_DOTCLKIN2, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN3, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
++ SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, SH_PFC_PIN_CFG_DRIVE_STRENGTH),
+ };
+
+ /* - AUDIO CLOCK ------------------------------------------------------------ */
+@@ -4962,10 +5047,45 @@ static const struct pinmux_cfg_reg pinmu
+ };
+
+ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
++ { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) {
++ { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */
++ { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */
++ { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */
++ { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */
++ { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */
++ { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */
++ { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */
++ { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */
++ } },
++ { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) {
++ { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */
++ { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */
++ { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */
++ { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */
++ { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */
++ { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */
++ { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */
++ { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */
++ } },
++ { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) {
++ { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */
++ { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */
++ { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */
++ { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */
++ { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */
++ { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */
++ { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */
++ { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */
++ } },
+ { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) {
+- { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */
+- { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */
+- { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */
++ { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */
++ { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */
++ { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */
++ { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */
++ { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */
++ { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */
++ { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */
++ { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) {
+ { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */
+@@ -5008,6 +5128,7 @@ static const struct pinmux_drive_reg pin
+ { RCAR_GP_PIN(1, 19), 0, 3 }, /* A19 */
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) {
++ { PIN_NUMBER('F', 1), 28, 3 }, /* CLKOUT */
+ { RCAR_GP_PIN(1, 20), 24, 3 }, /* CS0 */
+ { RCAR_GP_PIN(1, 21), 20, 3 }, /* CS1_A26 */
+ { RCAR_GP_PIN(1, 22), 16, 3 }, /* BS */
+@@ -5018,6 +5139,7 @@ static const struct pinmux_drive_reg pin
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) {
+ { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */
++ { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */
+ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */
+ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */
+ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */
+@@ -5036,20 +5158,30 @@ static const struct pinmux_drive_reg pin
+ { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) {
+- { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */
+- { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
+- { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
+- { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
+- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
+- { RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
++ { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */
++ { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
++ { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
++ { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
++ { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
++ { RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
++ { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
++ { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
++ } },
++ { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) {
++ { PIN_A_NUMBER('R', 7), 28, 2 }, /* DU_DOTCLKIN2 */
++ { PIN_A_NUMBER('R', 8), 24, 2 }, /* DU_DOTCLKIN3 */
++ { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST# */
++ { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) {
+- { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */
+- { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */
+- { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */
+- { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */
+- { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */
+- { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */
++ { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */
++ { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */
++ { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */
++ { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */
++ { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */
++ { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */
++ { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */
++ { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) {
+ { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */
+@@ -5118,6 +5250,7 @@ static const struct pinmux_drive_reg pin
+ { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */
+ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */
+ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */
++ { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */
+ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */
+ } },
+ { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) {
diff --git a/patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch b/patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch
new file mode 100644
index 0000000..f44f403
--- /dev/null
+++ b/patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch
@@ -0,0 +1,82 @@
+From 4cc08b22ce6f82d5ce6d70d5fe18f2cef864619a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Fri, 11 Nov 2016 21:33:40 +0100
+Subject: [PATCH 102/299] pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and
+ MII pins
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Group the AVB pins into similar groups found in other sh-pfc drivers.
+The pins can not be muxed between functions other then AVB but their
+drive strength can be controlled.
+
+The group avb_mdc containing ADV_MDC and ADV_MDIO are on other SoCs
+called avb_mdio. In pfc-r8a7795 the avb_mdc group already existed and
+is in use in DT. Therefore add the ADV_MDIO pin to the existing group
+instead of renaming it.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit b25719eb938eb39aeaaa9535f7b70405d6ff2700)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 30 +++++++++++++++++++++++++++---
+ 1 file changed, 27 insertions(+), 3 deletions(-)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -1648,11 +1648,33 @@ static const unsigned int avb_phy_int_mu
+ AVB_PHY_INT_MARK,
+ };
+ static const unsigned int avb_mdc_pins[] = {
+- /* AVB_MDC */
+- RCAR_GP_PIN(2, 9),
++ /* AVB_MDC, AVB_MDIO */
++ RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
+ };
+ static const unsigned int avb_mdc_mux[] = {
+- AVB_MDC_MARK,
++ AVB_MDC_MARK, AVB_MDIO_MARK,
++};
++static const unsigned int avb_mii_pins[] = {
++ /*
++ * AVB_TX_CTL, AVB_TXC, AVB_TD0,
++ * AVB_TD1, AVB_TD2, AVB_TD3,
++ * AVB_RX_CTL, AVB_RXC, AVB_RD0,
++ * AVB_RD1, AVB_RD2, AVB_RD3,
++ * AVB_TXCREFCLK
++ */
++ PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
++ PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
++ PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
++ PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
++ PIN_NUMBER('A', 12),
++
++};
++static const unsigned int avb_mii_mux[] = {
++ AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
++ AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
++ AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
++ AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
++ AVB_TXCREFCLK_MARK,
+ };
+ static const unsigned int avb_avtp_pps_pins[] = {
+ /* AVB_AVTP_PPS */
+@@ -3720,6 +3742,7 @@ static const struct sh_pfc_pin_group pin
+ SH_PFC_PIN_GROUP(avb_magic),
+ SH_PFC_PIN_GROUP(avb_phy_int),
+ SH_PFC_PIN_GROUP(avb_mdc),
++ SH_PFC_PIN_GROUP(avb_mii),
+ SH_PFC_PIN_GROUP(avb_avtp_pps),
+ SH_PFC_PIN_GROUP(avb_avtp_match_a),
+ SH_PFC_PIN_GROUP(avb_avtp_capture_a),
+@@ -4024,6 +4047,7 @@ static const char * const avb_groups[] =
+ "avb_magic",
+ "avb_phy_int",
+ "avb_mdc",
++ "avb_mii",
+ "avb_avtp_pps",
+ "avb_avtp_match_a",
+ "avb_avtp_capture_a",
diff --git a/patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch b/patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch
new file mode 100644
index 0000000..3b2e4ab
--- /dev/null
+++ b/patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch
@@ -0,0 +1,121 @@
+From 6c4c1f858a06ee12eb2c02771a9b7db5ff489a0f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Fri, 11 Nov 2016 21:33:41 +0100
+Subject: [PATCH 103/299] pinctrl: sh-pfc: r8a7795: Add group for QSPI0 and
+ QSPI1 pins
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Group the QSPI0 and QSPI1 pins into similar groups found in other sh-pfc
+drivers. The pins can not be muxed between functions other than QSPI,
+but their drive strength can be controlled.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 1fa1522f61f1fa53b2518c82bb3c667161836e10)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 69 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 69 insertions(+)
+
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+@@ -3720,6 +3720,55 @@ static const unsigned int usb2_mux[] = {
+ USB2_PWEN_MARK, USB2_OVC_MARK,
+ };
+
++/* - QSPI0 ------------------------------------------------------------------ */
++static const unsigned int qspi0_ctrl_pins[] = {
++ /* QSPI0_SPCLK, QSPI0_SSL */
++ PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
++};
++static const unsigned int qspi0_ctrl_mux[] = {
++ QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
++};
++static const unsigned int qspi0_data2_pins[] = {
++ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
++ PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
++};
++static const unsigned int qspi0_data2_mux[] = {
++ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
++};
++static const unsigned int qspi0_data4_pins[] = {
++ /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
++ PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
++ PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
++};
++static const unsigned int qspi0_data4_mux[] = {
++ QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
++ QSPI0_IO2_MARK, QSPI0_IO3_MARK,
++};
++/* - QSPI1 ------------------------------------------------------------------ */
++static const unsigned int qspi1_ctrl_pins[] = {
++ /* QSPI1_SPCLK, QSPI1_SSL */
++ PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
++};
++static const unsigned int qspi1_ctrl_mux[] = {
++ QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
++};
++static const unsigned int qspi1_data2_pins[] = {
++ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
++ PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
++};
++static const unsigned int qspi1_data2_mux[] = {
++ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
++};
++static const unsigned int qspi1_data4_pins[] = {
++ /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
++ PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
++ PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
++};
++static const unsigned int qspi1_data4_mux[] = {
++ QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
++ QSPI1_IO2_MARK, QSPI1_IO3_MARK,
++};
++
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(audio_clk_a_a),
+ SH_PFC_PIN_GROUP(audio_clk_a_b),
+@@ -4020,6 +4069,12 @@ static const struct sh_pfc_pin_group pin
+ SH_PFC_PIN_GROUP(usb0),
+ SH_PFC_PIN_GROUP(usb1),
+ SH_PFC_PIN_GROUP(usb2),
++ SH_PFC_PIN_GROUP(qspi0_ctrl),
++ SH_PFC_PIN_GROUP(qspi0_data2),
++ SH_PFC_PIN_GROUP(qspi0_data4),
++ SH_PFC_PIN_GROUP(qspi1_ctrl),
++ SH_PFC_PIN_GROUP(qspi1_data2),
++ SH_PFC_PIN_GROUP(qspi1_data4),
+ };
+
+ static const char * const audio_clk_groups[] = {
+@@ -4465,6 +4520,18 @@ static const char * const usb2_groups[]
+ "usb2",
+ };
+
++static const char * const qspi0_groups[] = {
++ "qspi0_ctrl",
++ "qspi0_data2",
++ "qspi0_data4",
++};
++
++static const char * const qspi1_groups[] = {
++ "qspi1_ctrl",
++ "qspi1_data2",
++ "qspi1_data4",
++};
++
+ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(avb),
+@@ -4514,6 +4581,8 @@ static const struct sh_pfc_function pinm
+ SH_PFC_FUNCTION(usb0),
+ SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(usb2),
++ SH_PFC_FUNCTION(qspi0),
++ SH_PFC_FUNCTION(qspi1),
+ };
+
+ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
diff --git a/patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch b/patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch
new file mode 100644
index 0000000..92980e9
--- /dev/null
+++ b/patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch
@@ -0,0 +1,107 @@
+From c7a8465db9172e278a9427e04ed69092a9351bd2 Mon Sep 17 00:00:00 2001
+From: Takatoshi Akiyama <takatoshi.akiyama.kj@ps.hitachi-solutions.com>
+Date: Mon, 7 Nov 2016 16:56:50 +0100
+Subject: [PATCH 104/299] serial: sh-sci: Fix deadlock caused by serial output
+ request
+
+While spin is already locked, serial output request causes the deadlock,
+because serial output process also tries to lock the spin.
+This patch removes serial output with spin locked.
+
+Signed-off-by: Takatoshi Akiyama <takatoshi.akiyama.kj@ps.hitachi-solutions.com>
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 6fc5a520429e29ae84cb9ce8e8c584166a54a1ee)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/tty/serial/sh-sci.c | 20 +++++---------------
+ 1 file changed, 5 insertions(+), 15 deletions(-)
+
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -1142,11 +1142,8 @@ static int sci_dma_rx_push(struct sci_po
+ int copied;
+
+ copied = tty_insert_flip_string(tport, buf, count);
+- if (copied < count) {
+- dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n",
+- count - copied);
++ if (copied < count)
+ port->icount.buf_overrun++;
+- }
+
+ port->icount.rx += copied;
+
+@@ -1161,8 +1158,6 @@ static int sci_dma_rx_find_active(struct
+ if (s->active_rx == s->cookie_rx[i])
+ return i;
+
+- dev_err(s->port.dev, "%s: Rx cookie %d not found!\n", __func__,
+- s->active_rx);
+ return -1;
+ }
+
+@@ -1223,9 +1218,9 @@ static void sci_dma_rx_complete(void *ar
+
+ dma_async_issue_pending(chan);
+
++ spin_unlock_irqrestore(&port->lock, flags);
+ dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n",
+ __func__, s->cookie_rx[active], active, s->active_rx);
+- spin_unlock_irqrestore(&port->lock, flags);
+ return;
+
+ fail:
+@@ -1273,8 +1268,6 @@ static void sci_submit_rx(struct sci_por
+ if (dma_submit_error(s->cookie_rx[i]))
+ goto fail;
+
+- dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__,
+- s->cookie_rx[i], i);
+ }
+
+ s->active_rx = s->cookie_rx[0];
+@@ -1288,7 +1281,6 @@ fail:
+ for (i = 0; i < 2; i++)
+ s->cookie_rx[i] = -EINVAL;
+ s->active_rx = -EINVAL;
+- dev_warn(s->port.dev, "Failed to re-start Rx DMA, using PIO\n");
+ sci_rx_dma_release(s, true);
+ }
+
+@@ -1358,10 +1350,10 @@ static void rx_timer_fn(unsigned long ar
+ int active, count;
+ u16 scr;
+
+- spin_lock_irqsave(&port->lock, flags);
+-
+ dev_dbg(port->dev, "DMA Rx timed out\n");
+
++ spin_lock_irqsave(&port->lock, flags);
++
+ active = sci_dma_rx_find_active(s);
+ if (active < 0) {
+ spin_unlock_irqrestore(&port->lock, flags);
+@@ -1370,9 +1362,9 @@ static void rx_timer_fn(unsigned long ar
+
+ status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state);
+ if (status == DMA_COMPLETE) {
++ spin_unlock_irqrestore(&port->lock, flags);
+ dev_dbg(port->dev, "Cookie %d #%d has already completed\n",
+ s->active_rx, active);
+- spin_unlock_irqrestore(&port->lock, flags);
+
+ /* Let packet complete handler take care of the packet */
+ return;
+@@ -1396,8 +1388,6 @@ static void rx_timer_fn(unsigned long ar
+ /* Handle incomplete DMA receive */
+ dmaengine_terminate_all(s->chan_rx);
+ read = sg_dma_len(&s->sg_rx[active]) - state.residue;
+- dev_dbg(port->dev, "Read %u bytes with cookie %d\n", read,
+- s->active_rx);
+
+ if (read) {
+ count = sci_dma_rx_push(s, s->rx_buf[active], read);
diff --git a/patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch b/patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch
new file mode 100644
index 0000000..19d19b6
--- /dev/null
+++ b/patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch
@@ -0,0 +1,401 @@
+From 0d61075bbb9fb12ffc895fdb4bc2bf9842c30816 Mon Sep 17 00:00:00 2001
+From: Julia Lawall <Julia.Lawall@lip6.fr>
+Date: Sat, 15 Oct 2016 16:55:49 +0200
+Subject: [PATCH 105/299] ASoC: constify snd_soc_ops structures
+
+Check for snd_soc_ops structures that are only stored in the ops field of a
+snd_soc_dai_link structure. This field is declared const, so snd_soc_ops
+structures that have this property can be declared as const also.
+
+The semantic patch that makes this change is as follows:
+(http://coccinelle.lip6.fr/)
+
+// <smpl>
+@r disable optional_qualifier@
+identifier i;
+position p;
+@@
+static struct snd_soc_ops i@p = { ... };
+
+@ok1@
+identifier r.i;
+struct snd_soc_dai_link e;
+position p;
+@@
+e.ops = &i@p;
+
+@ok2@
+identifier r.i, e;
+position p;
+@@
+struct snd_soc_dai_link e[] = { ..., { .ops = &i@p, }, ..., };
+
+@bad@
+position p != {r.p,ok1.p,ok2.p};
+identifier r.i;
+struct snd_soc_ops e;
+@@
+e@i@p
+
+@depends on !bad disable optional_qualifier@
+identifier r.i;
+@@
+static
++const
+ struct snd_soc_ops i = { ... };
+// </smpl>
+
+The effect on the layout of the .o files is shown by the following output
+of the size command, first before then after the transformation:
+
+ text data bss dec hex filename
+ 4500 696 0 5196 144c sound/soc/generic/simple-card.o
+ 4564 632 0 5196 144c sound/soc/generic/simple-card.o
+
+ text data bss dec hex filename
+ 3018 608 0 3626 e2a sound/soc/generic/simple-scu-card.o
+ 3074 544 0 3618 e22 sound/soc/generic/simple-scu-card.o
+
+ text data bss dec hex filename
+ 4148 2448 768 7364 1cc4 sound/soc/intel/boards/bdw-rt5677.o
+ 4212 2384 768 7364 1cc4 sound/soc/intel/boards/bdw-rt5677.o
+
+ text data bss dec hex filename
+ 5403 4628 384 10415 28af sound/soc/intel/boards/bxt_da7219_max98357a.o
+ 5531 4516 384 10431 28bf sound/soc/intel/boards/bxt_da7219_max98357a.o
+
+ text data bss dec hex filename
+ 5275 4496 384 10155 27ab sound/soc/intel/boards/bxt_rt298.o
+ 5403 4368 384 10155 27ab sound/soc/intel/boards/bxt_rt298.o
+
+ text data bss dec hex filename
+ 10017 2344 48 12409 3079 sound/soc/intel/boards/bytcr_rt5640.o
+ 10145 2232 48 12425 3089 sound/soc/intel/boards/bytcr_rt5640.o
+
+ text data bss dec hex filename
+ 3719 2356 0 6075 17bb sound/soc/intel/boards/bytcr_rt5651.o
+ 3847 2244 0 6091 17cb sound/soc/intel/boards/bytcr_rt5651.o
+
+ text data bss dec hex filename
+ 3598 2392 0 5990 1766 sound/soc/intel/boards/cht_bsw_max98090_ti.o
+ 3726 2280 0 6006 1776 sound/soc/intel/boards/cht_bsw_max98090_ti.o
+
+ text data bss dec hex filename
+ 5343 3624 16 8983 2317 sound/soc/intel/boards/cht_bsw_rt5645.o
+ 5471 3496 16 8983 2317 sound/soc/intel/boards/cht_bsw_rt5645.o
+
+ text data bss dec hex filename
+ 4662 2592 384 7638 1dd6 sound/soc/intel/boards/cht_bsw_rt5672.o
+ 4790 2464 384 7638 1dd6 sound/soc/intel/boards/cht_bsw_rt5672.o
+
+ text data bss dec hex filename
+ 1595 2528 0 4123 101b sound/soc/intel/boards/haswell.o
+ 1659 2472 0 4131 1023 sound/soc/intel/boards/haswell.o
+
+ text data bss dec hex filename
+ 6272 4760 416 11448 2cb8 sound/soc/intel/boards/skl_nau88l25_max98357a.o
+ 6464 4568 416 11448 2cb8 sound/soc/intel/boards/skl_nau88l25_max98357a.o
+
+ text data bss dec hex filename
+ 7075 4888 416 12379 305b sound/soc/intel/boards/skl_nau88l25_ssm4567.o
+ 7267 4696 416 12379 305b sound/soc/intel/boards/skl_nau88l25_ssm4567.o
+
+ text data bss dec hex filename
+ 5659 4496 384 10539 292b sound/soc/intel/boards/skl_rt286.o
+ 5787 4368 384 10539 292b sound/soc/intel/boards/skl_rt286.o
+
+ text data bss dec hex filename
+ 1721 2048 0 3769 eb9 sound/soc/kirkwood/armada-370-db.o
+ 1769 1976 0 3745 ea1 sound/soc/kirkwood/armada-370-db.o
+
+ text data bss dec hex filename
+ 1363 1792 0 3155 c53 sound/soc/mxs/mxs-sgtl5000.o
+ 1427 1728 0 3155 c53 sound/soc/mxs/mxs-sgtl5000.o
+
+Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 9b6fdef62b37714af9495d09eab1d0c8ba0509bd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-card.c | 2 +-
+ sound/soc/generic/simple-scu-card.c | 2 +-
+ sound/soc/intel/boards/bdw-rt5677.c | 2 +-
+ sound/soc/intel/boards/bxt_da7219_max98357a.c | 4 ++--
+ sound/soc/intel/boards/bxt_rt298.c | 4 ++--
+ sound/soc/intel/boards/bytcr_rt5640.c | 4 ++--
+ sound/soc/intel/boards/bytcr_rt5651.c | 4 ++--
+ sound/soc/intel/boards/cht_bsw_max98090_ti.c | 4 ++--
+ sound/soc/intel/boards/cht_bsw_rt5645.c | 4 ++--
+ sound/soc/intel/boards/cht_bsw_rt5672.c | 4 ++--
+ sound/soc/intel/boards/haswell.c | 2 +-
+ sound/soc/intel/boards/skl_nau88l25_max98357a.c | 6 +++---
+ sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 6 +++---
+ sound/soc/intel/boards/skl_rt286.c | 4 ++--
+ sound/soc/kirkwood/armada-370-db.c | 2 +-
+ sound/soc/mxs/mxs-sgtl5000.c | 2 +-
+ 16 files changed, 28 insertions(+), 28 deletions(-)
+
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -174,7 +174,7 @@ err:
+ return ret;
+ }
+
+-static struct snd_soc_ops asoc_simple_card_ops = {
++static const struct snd_soc_ops asoc_simple_card_ops = {
+ .startup = asoc_simple_card_startup,
+ .shutdown = asoc_simple_card_shutdown,
+ .hw_params = asoc_simple_card_hw_params,
+--- a/sound/soc/generic/simple-scu-card.c
++++ b/sound/soc/generic/simple-scu-card.c
+@@ -59,7 +59,7 @@ static void asoc_simple_card_shutdown(st
+ clk_disable_unprepare(dai_props->clk);
+ }
+
+-static struct snd_soc_ops asoc_simple_card_ops = {
++static const struct snd_soc_ops asoc_simple_card_ops = {
+ .startup = asoc_simple_card_startup,
+ .shutdown = asoc_simple_card_shutdown,
+ };
+--- a/sound/soc/intel/boards/bdw-rt5677.c
++++ b/sound/soc/intel/boards/bdw-rt5677.c
+@@ -156,7 +156,7 @@ static int bdw_rt5677_hw_params(struct s
+ return ret;
+ }
+
+-static struct snd_soc_ops bdw_rt5677_ops = {
++static const struct snd_soc_ops bdw_rt5677_ops = {
+ .hw_params = bdw_rt5677_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/bxt_da7219_max98357a.c
++++ b/sound/soc/intel/boards/bxt_da7219_max98357a.c
+@@ -248,7 +248,7 @@ static int broxton_da7219_hw_free(struct
+ return ret;
+ }
+
+-static struct snd_soc_ops broxton_da7219_ops = {
++static const struct snd_soc_ops broxton_da7219_ops = {
+ .hw_params = broxton_da7219_hw_params,
+ .hw_free = broxton_da7219_hw_free,
+ };
+@@ -295,7 +295,7 @@ static int broxton_refcap_startup(struct
+ &constraints_16000);
+ };
+
+-static struct snd_soc_ops broxton_refcap_ops = {
++static const struct snd_soc_ops broxton_refcap_ops = {
+ .startup = broxton_refcap_startup,
+ };
+
+--- a/sound/soc/intel/boards/bxt_rt298.c
++++ b/sound/soc/intel/boards/bxt_rt298.c
+@@ -181,7 +181,7 @@ static int broxton_rt298_hw_params(struc
+ return ret;
+ }
+
+-static struct snd_soc_ops broxton_rt298_ops = {
++static const struct snd_soc_ops broxton_rt298_ops = {
+ .hw_params = broxton_rt298_hw_params,
+ };
+
+@@ -230,7 +230,7 @@ static int broxton_dmic_startup(struct s
+ SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
+ }
+
+-static struct snd_soc_ops broxton_dmic_ops = {
++static const struct snd_soc_ops broxton_dmic_ops = {
+ .startup = broxton_dmic_startup,
+ };
+
+--- a/sound/soc/intel/boards/bytcr_rt5640.c
++++ b/sound/soc/intel/boards/bytcr_rt5640.c
+@@ -605,11 +605,11 @@ static int byt_rt5640_aif1_startup(struc
+ SNDRV_PCM_HW_PARAM_RATE, 48000);
+ }
+
+-static struct snd_soc_ops byt_rt5640_aif1_ops = {
++static const struct snd_soc_ops byt_rt5640_aif1_ops = {
+ .startup = byt_rt5640_aif1_startup,
+ };
+
+-static struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
++static const struct snd_soc_ops byt_rt5640_be_ssp2_ops = {
+ .hw_params = byt_rt5640_aif1_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/bytcr_rt5651.c
++++ b/sound/soc/intel/boards/bytcr_rt5651.c
+@@ -219,11 +219,11 @@ static int byt_rt5651_aif1_startup(struc
+ &constraints_48000);
+ }
+
+-static struct snd_soc_ops byt_rt5651_aif1_ops = {
++static const struct snd_soc_ops byt_rt5651_aif1_ops = {
+ .startup = byt_rt5651_aif1_startup,
+ };
+
+-static struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
++static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
+ .hw_params = byt_rt5651_aif1_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c
++++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c
+@@ -204,11 +204,11 @@ static int cht_max98090_headset_init(str
+ return ts3a227e_enable_jack_detect(component, &ctx->jack);
+ }
+
+-static struct snd_soc_ops cht_aif1_ops = {
++static const struct snd_soc_ops cht_aif1_ops = {
+ .startup = cht_aif1_startup,
+ };
+
+-static struct snd_soc_ops cht_be_ssp2_ops = {
++static const struct snd_soc_ops cht_be_ssp2_ops = {
+ .hw_params = cht_aif1_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/cht_bsw_rt5645.c
++++ b/sound/soc/intel/boards/cht_bsw_rt5645.c
+@@ -287,11 +287,11 @@ static int cht_aif1_startup(struct snd_p
+ SNDRV_PCM_HW_PARAM_RATE, 48000);
+ }
+
+-static struct snd_soc_ops cht_aif1_ops = {
++static const struct snd_soc_ops cht_aif1_ops = {
+ .startup = cht_aif1_startup,
+ };
+
+-static struct snd_soc_ops cht_be_ssp2_ops = {
++static const struct snd_soc_ops cht_be_ssp2_ops = {
+ .hw_params = cht_aif1_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/cht_bsw_rt5672.c
++++ b/sound/soc/intel/boards/cht_bsw_rt5672.c
+@@ -225,11 +225,11 @@ static int cht_aif1_startup(struct snd_p
+ SNDRV_PCM_HW_PARAM_RATE, 48000);
+ }
+
+-static struct snd_soc_ops cht_aif1_ops = {
++static const struct snd_soc_ops cht_aif1_ops = {
+ .startup = cht_aif1_startup,
+ };
+
+-static struct snd_soc_ops cht_be_ssp2_ops = {
++static const struct snd_soc_ops cht_be_ssp2_ops = {
+ .hw_params = cht_aif1_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/haswell.c
++++ b/sound/soc/intel/boards/haswell.c
+@@ -81,7 +81,7 @@ static int haswell_rt5640_hw_params(stru
+ return ret;
+ }
+
+-static struct snd_soc_ops haswell_rt5640_ops = {
++static const struct snd_soc_ops haswell_rt5640_ops = {
+ .hw_params = haswell_rt5640_hw_params,
+ };
+
+--- a/sound/soc/intel/boards/skl_nau88l25_max98357a.c
++++ b/sound/soc/intel/boards/skl_nau88l25_max98357a.c
+@@ -332,7 +332,7 @@ static int skylake_nau8825_hw_params(str
+ return ret;
+ }
+
+-static struct snd_soc_ops skylake_nau8825_ops = {
++static const struct snd_soc_ops skylake_nau8825_ops = {
+ .hw_params = skylake_nau8825_hw_params,
+ };
+
+@@ -382,7 +382,7 @@ static int skylake_dmic_startup(struct s
+ SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
+ }
+
+-static struct snd_soc_ops skylake_dmic_ops = {
++static const struct snd_soc_ops skylake_dmic_ops = {
+ .startup = skylake_dmic_startup,
+ };
+
+@@ -416,7 +416,7 @@ static int skylake_refcap_startup(struct
+ &constraints_16000);
+ }
+
+-static struct snd_soc_ops skylaye_refcap_ops = {
++static const struct snd_soc_ops skylaye_refcap_ops = {
+ .startup = skylake_refcap_startup,
+ };
+
+--- a/sound/soc/intel/boards/skl_nau88l25_ssm4567.c
++++ b/sound/soc/intel/boards/skl_nau88l25_ssm4567.c
+@@ -394,7 +394,7 @@ static int skylake_nau8825_hw_params(str
+ return ret;
+ }
+
+-static struct snd_soc_ops skylake_nau8825_ops = {
++static const struct snd_soc_ops skylake_nau8825_ops = {
+ .hw_params = skylake_nau8825_hw_params,
+ };
+
+@@ -430,7 +430,7 @@ static int skylake_dmic_startup(struct s
+ SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
+ }
+
+-static struct snd_soc_ops skylake_dmic_ops = {
++static const struct snd_soc_ops skylake_dmic_ops = {
+ .startup = skylake_dmic_startup,
+ };
+
+@@ -464,7 +464,7 @@ static int skylake_refcap_startup(struct
+ &constraints_16000);
+ }
+
+-static struct snd_soc_ops skylaye_refcap_ops = {
++static const struct snd_soc_ops skylaye_refcap_ops = {
+ .startup = skylake_refcap_startup,
+ };
+
+--- a/sound/soc/intel/boards/skl_rt286.c
++++ b/sound/soc/intel/boards/skl_rt286.c
+@@ -250,7 +250,7 @@ static int skylake_rt286_hw_params(struc
+ return ret;
+ }
+
+-static struct snd_soc_ops skylake_rt286_ops = {
++static const struct snd_soc_ops skylake_rt286_ops = {
+ .hw_params = skylake_rt286_hw_params,
+ };
+
+@@ -289,7 +289,7 @@ static int skylake_dmic_startup(struct s
+ SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
+ }
+
+-static struct snd_soc_ops skylake_dmic_ops = {
++static const struct snd_soc_ops skylake_dmic_ops = {
+ .startup = skylake_dmic_startup,
+ };
+
+--- a/sound/soc/kirkwood/armada-370-db.c
++++ b/sound/soc/kirkwood/armada-370-db.c
+@@ -42,7 +42,7 @@ static int a370db_hw_params(struct snd_p
+ return snd_soc_dai_set_sysclk(codec_dai, 0, freq, SND_SOC_CLOCK_IN);
+ }
+
+-static struct snd_soc_ops a370db_ops = {
++static const struct snd_soc_ops a370db_ops = {
+ .hw_params = a370db_hw_params,
+ };
+
+--- a/sound/soc/mxs/mxs-sgtl5000.c
++++ b/sound/soc/mxs/mxs-sgtl5000.c
+@@ -68,7 +68,7 @@ static int mxs_sgtl5000_hw_params(struct
+ return 0;
+ }
+
+-static struct snd_soc_ops mxs_sgtl5000_hifi_ops = {
++static const struct snd_soc_ops mxs_sgtl5000_hifi_ops = {
+ .hw_params = mxs_sgtl5000_hw_params,
+ };
+
diff --git a/patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch b/patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch
new file mode 100644
index 0000000..dc7f1c4
--- /dev/null
+++ b/patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch
@@ -0,0 +1,175 @@
+From e0cb1e3601f815ee5634fc82577a7078081f2466 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 28 Oct 2016 03:37:26 +0000
+Subject: [PATCH 106/299] ASoC: simple-scu-card: code sync: follow to simple
+ family style
+
+simple sound card family are using very similar style, but because of its
+historical reason, there are small differences. For example pointer style,
+function name, caller postion etc...
+This patch synchronized simple card style to other simple card family
+
+Current simple-scu-card function naming is different from other simple card
+family. And related to it, the necessary operation position is also
+different. This patch synchronize these to other simple card family.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 15a190ffec3b3f5e632faaa01b92f4cef32d63a3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-scu-card.c | 99 +++++++++++++++---------------------
+ 1 file changed, 43 insertions(+), 56 deletions(-)
+
+--- a/sound/soc/generic/simple-scu-card.c
++++ b/sound/soc/generic/simple-scu-card.c
+@@ -101,7 +101,7 @@ static int asoc_simple_card_be_hw_params
+ return 0;
+ }
+
+-static int asoc_simple_card_parse_links(struct device_node *np,
++static int asoc_simple_card_dai_link_of(struct device_node *np,
+ struct asoc_simple_card_priv *priv,
+ unsigned int daifmt,
+ int idx, bool is_fe)
+@@ -195,22 +195,35 @@ static int asoc_simple_card_parse_links(
+ return 0;
+ }
+
+-static int asoc_simple_card_dai_link_of(struct device_node *node,
+- struct asoc_simple_card_priv *priv)
++static int asoc_simple_card_parse_of(struct device_node *node,
++ struct asoc_simple_card_priv *priv)
++
+ {
+ struct device *dev = simple_priv_to_dev(priv);
+ struct device_node *np;
+ unsigned int daifmt = 0;
+- int ret, i;
+ bool is_fe;
++ int ret, i;
++
++ if (!node)
++ return -EINVAL;
++
++ ret = snd_soc_of_parse_audio_routing(&priv->snd_card, PREFIX "routing");
++ if (ret < 0)
++ return ret;
++
++ /* sampling rate convert */
++ of_property_read_u32(node, PREFIX "convert-rate", &priv->convert_rate);
++
++ /* channels transfer */
++ of_property_read_u32(node, PREFIX "convert-channels", &priv->convert_channels);
+
+ /* find 1st codec */
+ np = of_get_child_by_name(node, PREFIX "codec");
+ if (!np)
+ return -ENODEV;
+
+- ret = asoc_simple_card_parse_daifmt(dev, node, np,
+- PREFIX, &daifmt);
++ ret = asoc_simple_card_parse_daifmt(dev, node, np, PREFIX, &daifmt);
+ if (ret < 0)
+ return ret;
+
+@@ -220,58 +233,12 @@ static int asoc_simple_card_dai_link_of(
+ if (strcmp(np->name, PREFIX "cpu") == 0)
+ is_fe = true;
+
+- ret = asoc_simple_card_parse_links(np, priv, daifmt, i, is_fe);
++ ret = asoc_simple_card_dai_link_of(np, priv, daifmt, i, is_fe);
+ if (ret < 0)
+ return ret;
+ i++;
+ }
+
+- return 0;
+-}
+-
+-static int asoc_simple_card_parse_of(struct device_node *node,
+- struct asoc_simple_card_priv *priv,
+- struct device *dev)
+-{
+- struct asoc_simple_dai *props;
+- struct snd_soc_dai_link *links;
+- int ret;
+- int num;
+-
+- if (!node)
+- return -EINVAL;
+-
+- num = of_get_child_count(node);
+- props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
+- links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
+- if (!props || !links)
+- return -ENOMEM;
+-
+- priv->dai_props = props;
+- priv->dai_link = links;
+-
+- /* Init snd_soc_card */
+- priv->snd_card.owner = THIS_MODULE;
+- priv->snd_card.dev = dev;
+- priv->snd_card.dai_link = priv->dai_link;
+- priv->snd_card.num_links = num;
+- priv->snd_card.codec_conf = &priv->codec_conf;
+- priv->snd_card.num_configs = 1;
+-
+- ret = snd_soc_of_parse_audio_routing(&priv->snd_card, PREFIX "routing");
+- if (ret < 0)
+- return ret;
+-
+- /* sampling rate convert */
+- of_property_read_u32(node, PREFIX "convert-rate", &priv->convert_rate);
+-
+- /* channels transfer */
+- of_property_read_u32(node, PREFIX "convert-channels", &priv->convert_channels);
+-
+- ret = asoc_simple_card_dai_link_of(node, priv);
+- if (ret < 0)
+- return ret;
+-
+ ret = asoc_simple_card_parse_card_name(&priv->snd_card, PREFIX);
+ if (ret < 0)
+ return ret;
+@@ -287,16 +254,36 @@ static int asoc_simple_card_parse_of(str
+ static int asoc_simple_card_probe(struct platform_device *pdev)
+ {
+ struct asoc_simple_card_priv *priv;
+- struct device_node *np = pdev->dev.of_node;
++ struct snd_soc_dai_link *links;
++ struct asoc_simple_dai *props;
+ struct device *dev = &pdev->dev;
+- int ret;
++ struct device_node *np = pdev->dev.of_node;
++ int num, ret;
+
+ /* Allocate the private data */
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+- ret = asoc_simple_card_parse_of(np, priv, dev);
++ num = of_get_child_count(np);
++
++ props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
++ links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
++ if (!props || !links)
++ return -ENOMEM;
++
++ priv->dai_props = props;
++ priv->dai_link = links;
++
++ /* Init snd_soc_card */
++ priv->snd_card.owner = THIS_MODULE;
++ priv->snd_card.dev = dev;
++ priv->snd_card.dai_link = priv->dai_link;
++ priv->snd_card.num_links = num;
++ priv->snd_card.codec_conf = &priv->codec_conf;
++ priv->snd_card.num_configs = 1;
++
++ ret = asoc_simple_card_parse_of(np, priv);
+ if (ret < 0) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "parse error %d\n", ret);
diff --git a/patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch b/patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch
new file mode 100644
index 0000000..a76f31d
--- /dev/null
+++ b/patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch
@@ -0,0 +1,96 @@
+From 4839d817c2ce87d2737e1c7e4c968d0e09bb4a82 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 28 Oct 2016 03:37:44 +0000
+Subject: [PATCH 107/299] ASoC: simple-scu-card: code sync: rename
+ asoc_simple_card_priv
+
+simple sound card family are using very similar style, but because of its
+historical reason, there are small differences. For example pointer style,
+function name, caller postion etc...
+This patch synchronized simple card style to other simple card family
+
+This patch renames asoc_simple_card_priv to simple_card_data,
+same as other simple card family.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 6910e8679ff4d256028003be2451deb31f13948e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-scu-card.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+--- a/sound/soc/generic/simple-scu-card.c
++++ b/sound/soc/generic/simple-scu-card.c
+@@ -22,7 +22,7 @@
+ #include <sound/soc-dai.h>
+ #include <sound/simple_card_utils.h>
+
+-struct asoc_simple_card_priv {
++struct simple_card_data {
+ struct snd_soc_card snd_card;
+ struct snd_soc_codec_conf codec_conf;
+ struct asoc_simple_dai *dai_props;
+@@ -42,7 +42,7 @@ struct asoc_simple_card_priv {
+ static int asoc_simple_card_startup(struct snd_pcm_substream *substream)
+ {
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
++ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct asoc_simple_dai *dai_props =
+ simple_priv_to_props(priv, rtd->num);
+
+@@ -52,7 +52,7 @@ static int asoc_simple_card_startup(stru
+ static void asoc_simple_card_shutdown(struct snd_pcm_substream *substream)
+ {
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
++ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct asoc_simple_dai *dai_props =
+ simple_priv_to_props(priv, rtd->num);
+
+@@ -66,7 +66,7 @@ static const struct snd_soc_ops asoc_sim
+
+ static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
+ {
+- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
++ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct snd_soc_dai *dai;
+ struct snd_soc_dai_link *dai_link;
+ struct asoc_simple_dai *dai_props;
+@@ -84,7 +84,7 @@ static int asoc_simple_card_dai_init(str
+ static int asoc_simple_card_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+ {
+- struct asoc_simple_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
++ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+ struct snd_interval *channels = hw_param_interval(params,
+@@ -102,7 +102,7 @@ static int asoc_simple_card_be_hw_params
+ }
+
+ static int asoc_simple_card_dai_link_of(struct device_node *np,
+- struct asoc_simple_card_priv *priv,
++ struct simple_card_data *priv,
+ unsigned int daifmt,
+ int idx, bool is_fe)
+ {
+@@ -196,7 +196,7 @@ static int asoc_simple_card_dai_link_of(
+ }
+
+ static int asoc_simple_card_parse_of(struct device_node *node,
+- struct asoc_simple_card_priv *priv)
++ struct simple_card_data *priv)
+
+ {
+ struct device *dev = simple_priv_to_dev(priv);
+@@ -253,7 +253,7 @@ static int asoc_simple_card_parse_of(str
+
+ static int asoc_simple_card_probe(struct platform_device *pdev)
+ {
+- struct asoc_simple_card_priv *priv;
++ struct simple_card_data *priv;
+ struct snd_soc_dai_link *links;
+ struct asoc_simple_dai *props;
+ struct device *dev = &pdev->dev;
diff --git a/patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch b/patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch
new file mode 100644
index 0000000..44be22c
--- /dev/null
+++ b/patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch
@@ -0,0 +1,54 @@
+From f0bf067eb8f8b3cd115960cad74cfe98ff388978 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Fri, 28 Oct 2016 03:38:00 +0000
+Subject: [PATCH 108/299] ASoC: simple-scu-card: code sync: tidyup props/link
+ naming
+
+simple sound card family are using very similar style, but because of its
+historical reason, there are small differences. For example pointer style,
+function name, caller postion etc...
+This patch synchronizes style to other simple card family so that be enable
+to easy reviewing.
+
+This patch uses dai_link/dai_props instead of links/props.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit 193599264f3eb632f43f83f738b17241f91dbd5a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-scu-card.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/sound/soc/generic/simple-scu-card.c
++++ b/sound/soc/generic/simple-scu-card.c
+@@ -254,8 +254,8 @@ static int asoc_simple_card_parse_of(str
+ static int asoc_simple_card_probe(struct platform_device *pdev)
+ {
+ struct simple_card_data *priv;
+- struct snd_soc_dai_link *links;
+- struct asoc_simple_dai *props;
++ struct snd_soc_dai_link *dai_link;
++ struct asoc_simple_dai *dai_props;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = pdev->dev.of_node;
+ int num, ret;
+@@ -267,13 +267,13 @@ static int asoc_simple_card_probe(struct
+
+ num = of_get_child_count(np);
+
+- props = devm_kzalloc(dev, sizeof(*props) * num, GFP_KERNEL);
+- links = devm_kzalloc(dev, sizeof(*links) * num, GFP_KERNEL);
+- if (!props || !links)
++ dai_props = devm_kzalloc(dev, sizeof(*dai_props) * num, GFP_KERNEL);
++ dai_link = devm_kzalloc(dev, sizeof(*dai_link) * num, GFP_KERNEL);
++ if (!dai_props || !dai_link)
+ return -ENOMEM;
+
+- priv->dai_props = props;
+- priv->dai_link = links;
++ priv->dai_props = dai_props;
++ priv->dai_link = dai_link;
+
+ /* Init snd_soc_card */
+ priv->snd_card.owner = THIS_MODULE;
diff --git a/patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch b/patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch
new file mode 100644
index 0000000..8184a3f
--- /dev/null
+++ b/patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch
@@ -0,0 +1,32 @@
+From 0234d40a1a0e45a5bb1ea38f8da6601517f2cb1d Mon Sep 17 00:00:00 2001
+From: Masahiro Yamada <yamada.masahiro@socionext.com>
+Date: Mon, 19 Sep 2016 01:03:15 +0900
+Subject: [PATCH 109/299] usb: renesas_usbhs: cleanup with
+ list_first_entry_or_null()
+
+The combo of list_empty() check and return list_first_entry()
+can be replaced with list_first_entry_or_null().
+
+Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit 31faf878bd8c7e2c078a3b75f65efe64f23b0f18)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/renesas_usbhs/fifo.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+--- a/drivers/usb/renesas_usbhs/fifo.c
++++ b/drivers/usb/renesas_usbhs/fifo.c
+@@ -100,10 +100,7 @@ static void __usbhsf_pkt_del(struct usbh
+
+ static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
+ {
+- if (list_empty(&pipe->list))
+- return NULL;
+-
+- return list_first_entry(&pipe->list, struct usbhs_pkt, node);
++ return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
+ }
+
+ static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
diff --git a/patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch b/patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch
new file mode 100644
index 0000000..842583e
--- /dev/null
+++ b/patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch
@@ -0,0 +1,71 @@
+From b2fdfacf21cd7d444eebbd1def80eec28990f1cb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 6 Sep 2016 21:04:53 -0300
+Subject: [PATCH 110/299] [media] v4l: vsp1: Add support for capture and output
+ in HSV formats
+
+Support both the HSV24 and HSV32 formats. From a hardware point of view
+pretend the formats are RGB, the RPF and WPF will just pass the data
+through without performing any processing.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit bc9b91e6be38b54a7b245969d0a9247791705e6a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/vsp1_pipe.c | 8 ++++++++
+ drivers/media/platform/vsp1/vsp1_rwpf.c | 2 ++
+ drivers/media/platform/vsp1/vsp1_video.c | 5 +++++
+ 3 files changed, 15 insertions(+)
+
+--- a/drivers/media/platform/vsp1/vsp1_pipe.c
++++ b/drivers/media/platform/vsp1/vsp1_pipe.c
+@@ -78,6 +78,14 @@ static const struct vsp1_format_info vsp
+ VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
+ VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
+ 1, { 32, 0, 0 }, false, false, 1, 1, false },
++ { V4L2_PIX_FMT_HSV24, MEDIA_BUS_FMT_AHSV8888_1X32,
++ VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
++ VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
++ 1, { 24, 0, 0 }, false, false, 1, 1, false },
++ { V4L2_PIX_FMT_HSV32, MEDIA_BUS_FMT_AHSV8888_1X32,
++ VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
++ VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
++ 1, { 32, 0, 0 }, false, false, 1, 1, false },
+ { V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
+ VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
+ VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
+--- a/drivers/media/platform/vsp1/vsp1_rwpf.c
++++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
+@@ -37,6 +37,7 @@ static int vsp1_rwpf_enum_mbus_code(stru
+ {
+ static const unsigned int codes[] = {
+ MEDIA_BUS_FMT_ARGB8888_1X32,
++ MEDIA_BUS_FMT_AHSV8888_1X32,
+ MEDIA_BUS_FMT_AYUV8_1X32,
+ };
+
+@@ -78,6 +79,7 @@ static int vsp1_rwpf_set_format(struct v
+
+ /* Default to YUV if the requested format is not supported. */
+ if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
++ fmt->format.code != MEDIA_BUS_FMT_AHSV8888_1X32 &&
+ fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32)
+ fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32;
+
+--- a/drivers/media/platform/vsp1/vsp1_video.c
++++ b/drivers/media/platform/vsp1/vsp1_video.c
+@@ -124,6 +124,11 @@ static int __vsp1_video_try_format(struc
+ pix->pixelformat = info->fourcc;
+ pix->colorspace = V4L2_COLORSPACE_SRGB;
+ pix->field = V4L2_FIELD_NONE;
++
++ if (info->fourcc == V4L2_PIX_FMT_HSV24 ||
++ info->fourcc == V4L2_PIX_FMT_HSV32)
++ pix->hsv_enc = V4L2_HSV_ENC_256;
++
+ memset(pix->reserved, 0, sizeof(pix->reserved));
+
+ /* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */
diff --git a/patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch b/patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch
new file mode 100644
index 0000000..889243f
--- /dev/null
+++ b/patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch
@@ -0,0 +1,46 @@
+From 8a5a9120158f7e426c7a0634fc5c46e1c26b32a6 Mon Sep 17 00:00:00 2001
+From: Javier Martinez Canillas <javier@osg.samsung.com>
+Date: Mon, 17 Oct 2016 13:44:08 -0200
+Subject: [PATCH 111/299] [media] v4l: vsp1: Fix module autoload for OF
+ registration
+
+If the driver is built as a module, autoload won't work because the module
+alias information is not filled. So user-space can't match the registered
+device with the corresponding module.
+
+Export the module alias information using the MODULE_DEVICE_TABLE() macro.
+
+Before this patch:
+
+$ modinfo drivers/media/platform/vsp1/vsp1.ko | grep alias
+alias: vsp1
+
+After this patch:
+
+$ modinfo drivers/media/platform/vsp1/vsp1.ko | grep alias
+alias: vsp1
+alias: of:N*T*Crenesas,vsp2C*
+alias: of:N*T*Crenesas,vsp2
+alias: of:N*T*Crenesas,vsp1C*
+alias: of:N*T*Crenesas,vsp1
+
+Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 3184c3bf67d1360a303dd02edccab41e37a637bd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/vsp1_drv.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/media/platform/vsp1/vsp1_drv.c
++++ b/drivers/media/platform/vsp1/vsp1_drv.c
+@@ -770,6 +770,7 @@ static const struct of_device_id vsp1_of
+ { .compatible = "renesas,vsp2" },
+ { },
+ };
++MODULE_DEVICE_TABLE(of, vsp1_of_match);
+
+ static struct platform_driver vsp1_platform_driver = {
+ .probe = vsp1_probe,
diff --git a/patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch b/patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch
new file mode 100644
index 0000000..82ec647
--- /dev/null
+++ b/patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch
@@ -0,0 +1,31 @@
+From c6ba6292f93b9ab95a4f8c4e9b2805019453cb38 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@free-electrons.com>
+Date: Mon, 7 Nov 2016 14:08:20 +0100
+Subject: [PATCH 112/299] ASoC: wm8978: Adjust clock indices so that simple
+ card works
+
+Using simple-card with the wm8978 doesn't work because simple card calls
+set_sysclk on the clock index 0, which is not the MCLK in the WM8978.
+
+Adjust the clock definition so that the clock 0 is the MCLK.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+(cherry picked from commit fbd972d7f4a60677f6fbe558dc23e4029dc2d45d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/codecs/wm8978.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/sound/soc/codecs/wm8978.h
++++ b/sound/soc/codecs/wm8978.h
+@@ -78,8 +78,8 @@ enum wm8978_clk_id {
+ };
+
+ enum wm8978_sysclk_src {
++ WM8978_MCLK = 0,
+ WM8978_PLL,
+- WM8978_MCLK
+ };
+
+ #endif /* __WM8978_H__ */
diff --git a/patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch b/patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch
new file mode 100644
index 0000000..6311fa0
--- /dev/null
+++ b/patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch
@@ -0,0 +1,48 @@
+From 4e6d2d9449c95e80ec2638c306dead05595cf1c3 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Fri, 11 Nov 2016 15:13:26 +0200
+Subject: [PATCH 113/299] usb: host: xhci: rcar: add a new firmware version for
+ r8a7796
+
+This patch adds a new firmware version "V3" for r8a7796. This patch
+also adds explanation of each version's information.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 125f0c0ca06555f7992ededc538580454c9b6996)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-rcar.c | 3 +++
+ drivers/usb/host/xhci-rcar.h | 1 +
+ 2 files changed, 4 insertions(+)
+
+--- a/drivers/usb/host/xhci-rcar.c
++++ b/drivers/usb/host/xhci-rcar.c
+@@ -19,6 +19,8 @@
+ #include "xhci-rcar.h"
+
+ /*
++* - The V3 firmware is for r8a7796 (with good performance).
++* - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
+ * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
+ * performance degradation. So, this driver continues to use the V1 if R-Car
+ * Gen2.
+@@ -26,6 +28,7 @@
+ */
+ MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
+ MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
++MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
+
+ /*** Register Offset ***/
+ #define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */
+--- a/drivers/usb/host/xhci-rcar.h
++++ b/drivers/usb/host/xhci-rcar.h
+@@ -13,6 +13,7 @@
+
+ #define XHCI_RCAR_FIRMWARE_NAME_V1 "r8a779x_usb3_v1.dlmem"
+ #define XHCI_RCAR_FIRMWARE_NAME_V2 "r8a779x_usb3_v2.dlmem"
++#define XHCI_RCAR_FIRMWARE_NAME_V3 "r8a779x_usb3_v3.dlmem"
+
+ #if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
+ void xhci_rcar_start(struct usb_hcd *hcd);
diff --git a/patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch b/patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch
new file mode 100644
index 0000000..c5c49a2
--- /dev/null
+++ b/patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch
@@ -0,0 +1,68 @@
+From 23ca96ebebce4b4e3dbe8968a5f20cd25b300e56 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Fri, 11 Nov 2016 15:13:27 +0200
+Subject: [PATCH 114/299] usb: host: xhci: plat: add support for Renesas
+ r8a7796 SoC
+
+This patch adds support for Renesas r8a7796 SoC. This SoC is not
+compatible with r8a7795 because using firmware version differs.
+
+Since the "V2" firmware can be used on both r8a7795 (es1.x) and r8a7796,
+the "renesas,rcar-gen3-xhci" keeps to use the "V2" for now.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 3f1dae6b19c9b4ba51ad016e30ec17399819bb6d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/usb/usb-xhci.txt | 1 +
+ drivers/usb/host/xhci-plat.c | 9 +++++++++
+ drivers/usb/host/xhci-rcar.c | 1 +
+ 3 files changed, 11 insertions(+)
+
+--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
+@@ -11,6 +11,7 @@ Required properties:
+ - "renesas,xhci-r8a7791" for r8a7791 SoC
+ - "renesas,xhci-r8a7793" for r8a7793 SoC
+ - "renesas,xhci-r8a7795" for r8a7795 SoC
++ - "renesas,xhci-r8a7796" for r8a7796 SoC
+ - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 compatible device
+ - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
+ - "xhci-platform" (deprecated)
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -100,6 +100,12 @@ static const struct xhci_plat_priv xhci_
+ .plat_start = xhci_rcar_start,
+ };
+
++static const struct xhci_plat_priv xhci_plat_renesas_rcar_r8a7796 = {
++ .firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3,
++ .init_quirk = xhci_rcar_init_quirk,
++ .plat_start = xhci_rcar_start,
++};
++
+ static const struct of_device_id usb_xhci_of_match[] = {
+ {
+ .compatible = "generic-xhci",
+@@ -124,6 +130,9 @@ static const struct of_device_id usb_xhc
+ .compatible = "renesas,xhci-r8a7795",
+ .data = &xhci_plat_renesas_rcar_gen3,
+ }, {
++ .compatible = "renesas,xhci-r8a7796",
++ .data = &xhci_plat_renesas_rcar_r8a7796,
++ }, {
+ .compatible = "renesas,rcar-gen2-xhci",
+ .data = &xhci_plat_renesas_rcar_gen2,
+ }, {
+--- a/drivers/usb/host/xhci-rcar.c
++++ b/drivers/usb/host/xhci-rcar.c
+@@ -95,6 +95,7 @@ static int xhci_rcar_is_gen3(struct devi
+ struct device_node *node = dev->of_node;
+
+ return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
++ of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
+ of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
+ }
+
diff --git a/patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch b/patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch
new file mode 100644
index 0000000..abfb201
--- /dev/null
+++ b/patches.renesas/0115-sh_eth-fix-branch-prediction-in-sh_eth_interrupt.patch
@@ -0,0 +1,29 @@
+From f1782b1d0fd0e4b7f40e23789548298a9ea3cb90 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 30 Dec 2016 00:07:38 +0300
+Subject: [PATCH 115/299] sh_eth: fix branch prediction in sh_eth_interrupt()
+
+IIUC, likely()/unlikely() should apply to the whole *if* statement's
+expression, not a part of it -- fix such expression in sh_eth_interrupt()
+accordingly...
+
+Fixes: 283e38db65e7 ("sh_eth: Fix serialisation of interrupt disable with interrupt & NAPI handlers")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 2344ef3c86a7fe41f97bf66c7936001b6132860b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1668,7 +1668,7 @@ static irqreturn_t sh_eth_interrupt(int
+ else
+ goto out;
+
+- if (!likely(mdp->irq_enabled)) {
++ if (unlikely(!mdp->irq_enabled)) {
+ sh_eth_write(ndev, 0, EESIPR);
+ goto out;
+ }
diff --git a/patches.renesas/0116-sh_eth-enable-RX-descriptor-word-0-shift-on-SH7734.patch b/patches.renesas/0116-sh_eth-enable-RX-descriptor-word-0-shift-on-SH7734.patch
new file mode 100644
index 0000000..f488464
--- /dev/null
+++ b/patches.renesas/0116-sh_eth-enable-RX-descriptor-word-0-shift-on-SH7734.patch
@@ -0,0 +1,28 @@
+From 41e72cfb2967a28134f25244a15cbf56622b9764 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 4 Jan 2017 23:10:23 +0300
+Subject: [PATCH 116/299] sh_eth: enable RX descriptor word 0 shift on SH7734
+
+The RX descriptor word 0 on SH7734 has the RFS[9:0] field in bits 16-25
+(bits 0-15 usually used for that are occupied by the packet checksum).
+Thus we need to set the 'shift_rd0' field in the SH7734 SoC data...
+
+Fixes: f0e81fecd4f8 ("net: sh_eth: Add support SH7734")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 71eae1ca77fd6be218d8a952d97bba827e56516d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -819,6 +819,7 @@ static struct sh_eth_cpu_data sh7734_dat
+ .tsu = 1,
+ .hw_crc = 1,
+ .select_mii = 1,
++ .shift_rd0 = 1,
+ };
+
+ /* SH7763 */
diff --git a/patches.renesas/0117-sh_eth-fix-EESIPR-values-for-SH77-34-63.patch b/patches.renesas/0117-sh_eth-fix-EESIPR-values-for-SH77-34-63.patch
new file mode 100644
index 0000000..d8554e5
--- /dev/null
+++ b/patches.renesas/0117-sh_eth-fix-EESIPR-values-for-SH77-34-63.patch
@@ -0,0 +1,39 @@
+From 42784f869694091eaa471fecdc6863696de627f5 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 4 Jan 2017 22:18:24 +0300
+Subject: [PATCH 117/299] sh_eth: fix EESIPR values for SH77{34|63}
+
+As the SH77{34|63} manuals are freely available, I've checked the EESIPR
+values written against the manuals, and they appeared to set the reserved
+bits 11-15 (which should be 0 on write). Fix those EESIPR values.
+
+Fixes: 380af9e390ec ("net: sh_eth: CPU dependency code collect to "struct sh_eth_cpu_data"")
+Fixes: f5d12767c8fd ("sh_eth: get SH77{34|63} support out of #ifdef")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 978d3639fd13d987950e4ce85c8737ae92154b2c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -802,7 +802,7 @@ static struct sh_eth_cpu_data sh7734_dat
+
+ .ecsr_value = ECSR_ICD | ECSR_MPD,
+ .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
+- .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
++ .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff,
+
+ .tx_check = EESR_TC1 | EESR_FTC,
+ .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
+@@ -832,7 +832,7 @@ static struct sh_eth_cpu_data sh7763_dat
+
+ .ecsr_value = ECSR_ICD | ECSR_MPD,
+ .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
+- .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
++ .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff,
+
+ .tx_check = EESR_TC1 | EESR_FTC,
+ .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
diff --git a/patches.renesas/0118-sh_eth-R8A7740-supports-packet-shecksumming.patch b/patches.renesas/0118-sh_eth-R8A7740-supports-packet-shecksumming.patch
new file mode 100644
index 0000000..6dc8d3a
--- /dev/null
+++ b/patches.renesas/0118-sh_eth-R8A7740-supports-packet-shecksumming.patch
@@ -0,0 +1,28 @@
+From 0068ef1270155acaeeeecdd0fff6f1659da0d21b Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 5 Jan 2017 00:29:32 +0300
+Subject: [PATCH 118/299] sh_eth: R8A7740 supports packet shecksumming
+
+The R8A7740 GEther controller supports the packet checksum offloading
+but the 'hw_crc' (bad name, I'll fix it) flag isn't set in the R8A7740
+data, thus CSMR isn't cleared...
+
+Fixes: 73a0d907301e ("net: sh_eth: add support R8A7740")
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 0f1f9cbc04dbb3cc310f70a11cba0cf1f2109d9c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -574,6 +574,7 @@ static struct sh_eth_cpu_data r8a7740_da
+ .rpadir_value = 2 << 16,
+ .no_trimd = 1,
+ .no_ade = 1,
++ .hw_crc = 1,
+ .tsu = 1,
+ .select_mii = 1,
+ .shift_rd0 = 1,
diff --git a/patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch b/patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch
new file mode 100644
index 0000000..f6c27c2
--- /dev/null
+++ b/patches.renesas/0119-arm64-dts-r8a7796-salvator-x-enable-SDHI0-3.patch
@@ -0,0 +1,131 @@
+From ff47c8efef6dbeab04dfdea3b85acde2e90507a7 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 16 Aug 2016 10:55:04 +0200
+Subject: [PATCH 119/299] arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
+
+Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.
+
+Based on work for the r8a7795/salvator-x by Ai Kyuse.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit e2420b92de4941bdca05d7c93acfddb48f036d0b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 84 +++++++++++++++++++++
+ 1 file changed, 84 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+@@ -10,6 +10,7 @@
+
+ /dts-v1/;
+ #include "r8a7796.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Renesas Salvator-X board based on r8a7796";
+@@ -29,6 +30,55 @@
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
++
++ vcc_sdhi0: regulator-vcc-sdhi0 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI0 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vccq_sdhi0: regulator-vccq-sdhi0 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI0 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
++ vcc_sdhi3: regulator-vcc-sdhi3 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI3 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vccq_sdhi3: regulator-vccq-sdhi3 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI3 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
+ };
+
+ &pfc {
+@@ -43,6 +93,16 @@
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
++
++ sdhi0_pins: sd0 {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ };
++
++ sdhi3_pins: sd3 {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ };
+ };
+
+ &extal_clk {
+@@ -53,6 +113,30 @@
+ clock-frequency = <32768>;
+ };
+
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi0>;
++ vqmmc-supply = <&vccq_sdhi0>;
++ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
++ bus-width = <4>;
++ status = "okay";
++};
++
++&sdhi3 {
++ pinctrl-0 = <&sdhi3_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi3>;
++ vqmmc-supply = <&vccq_sdhi3>;
++ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
++ bus-width = <4>;
++ status = "okay";
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
diff --git a/patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch b/patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch
new file mode 100644
index 0000000..081b1fa
--- /dev/null
+++ b/patches.renesas/0120-arm64-dts-r8a7796-salvator-x-enable-UHS-for-SDHI-0-3.patch
@@ -0,0 +1,76 @@
+From 2f0469a4f92f24e14bc9a1d0f94104423bcbb4e5 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 13 Sep 2016 12:57:07 +0200
+Subject: [PATCH 120/299] arm64: dts: r8a7796: salvator-x: enable UHS for SDHI
+ 0 & 3
+
+Based on work for the r8a7796 by Wolfram Sang.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit af3cf72f5f4b158d34935d6995908989afbe756c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 22 +++++++++++++++++++--
+ 1 file changed, 20 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+@@ -97,11 +97,25 @@
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
++ power-source = <3300>;
++ };
++
++ sdhi0_pins_uhs: sd0_uhs {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <1800>;
+ };
+
+ sdhi3_pins: sd3 {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
++ power-source = <3300>;
++ };
++
++ sdhi3_pins_uhs: sd3_uhs {
++ groups = "sdhi3_data4", "sdhi3_ctrl";
++ function = "sdhi3";
++ power-source = <1800>;
+ };
+ };
+
+@@ -115,25 +129,29 @@
+
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi0_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
+ &sdhi3 {
+ pinctrl-0 = <&sdhi3_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi3_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi3>;
+ vqmmc-supply = <&vccq_sdhi3>;
+ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0121-arm64-dts-r8a7795-salvator-enable-on-board-eMMC.patch b/patches.renesas/0121-arm64-dts-r8a7795-salvator-enable-on-board-eMMC.patch
new file mode 100644
index 0000000..21a0b80
--- /dev/null
+++ b/patches.renesas/0121-arm64-dts-r8a7795-salvator-enable-on-board-eMMC.patch
@@ -0,0 +1,79 @@
+From 0c74b2dfe06949b805d7c86cb4f4e933036e69a6 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Sun, 16 Oct 2016 10:27:47 +0200
+Subject: [PATCH 121/299] arm64: dts: r8a7795: salvator: enable on-board eMMC
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7c827d1fda99d4a80e317b1fbb1ba359b082bda2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 43 +++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+@@ -62,6 +62,24 @@
+ clock-frequency = <24576000>;
+ };
+
++ reg_1p8v: regulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-1.8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ reg_3p3v: regulator1 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+@@ -250,6 +268,18 @@
+ power-source = <1800>;
+ };
+
++ sdhi2_pins: sd2 {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <3300>;
++ };
++
++ sdhi2_pins_uhs: sd2_uhs {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <1800>;
++ };
++
+ sdhi3_pins: sd3 {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
+@@ -401,6 +431,19 @@
+ status = "okay";
+ };
+
++&sdhi2 {
++ /* used for on-board 8bit eMMC */
++ pinctrl-0 = <&sdhi2_pins>;
++ pinctrl-1 = <&sdhi2_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <®_1p8v>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
++
+ &sdhi3 {
+ pinctrl-0 = <&sdhi3_pins>;
+ pinctrl-1 = <&sdhi3_pins_uhs>;
diff --git a/patches.renesas/0122-arm64-dts-r8a7796-salvator-enable-on-board-eMMC.patch b/patches.renesas/0122-arm64-dts-r8a7796-salvator-enable-on-board-eMMC.patch
new file mode 100644
index 0000000..a8f5084
--- /dev/null
+++ b/patches.renesas/0122-arm64-dts-r8a7796-salvator-enable-on-board-eMMC.patch
@@ -0,0 +1,87 @@
+From 3f88d80a5f431d79ddeddfc20dccb9674b2cc88b Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Tue, 6 Sep 2016 10:52:25 +0200
+Subject: [PATCH 122/299] arm64: dts: r8a7796: salvator: enable on board eMMC
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 38548328fe3ff931063ce81ed3c3b5867c5fb233)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 44 ++++++++++++++++++++-
+ 1 file changed, 43 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+@@ -31,6 +31,24 @@
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+
++ reg_1p8v: regulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-1.8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ reg_3p3v: regulator1 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+@@ -78,7 +96,6 @@
+ states = <3300000 1
+ 1800000 0>;
+ };
+-
+ };
+
+ &pfc {
+@@ -106,6 +123,18 @@
+ power-source = <1800>;
+ };
+
++ sdhi2_pins: sd2 {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <3300>;
++ };
++
++ sdhi2_pins_uhs: sd2_uhs {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <1800>;
++ };
++
+ sdhi3_pins: sd3 {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
+@@ -141,6 +170,19 @@
+ status = "okay";
+ };
+
++&sdhi2 {
++ /* used for on-board 8bit eMMC */
++ pinctrl-0 = <&sdhi2_pins>;
++ pinctrl-1 = <&sdhi2_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <®_1p8v>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
++
+ &sdhi3 {
+ pinctrl-0 = <&sdhi3_pins>;
+ pinctrl-1 = <&sdhi3_pins_uhs>;
diff --git a/patches.renesas/0123-arm64-dts-r8a7795-salvator-x-add-bias-setting-for-us.patch b/patches.renesas/0123-arm64-dts-r8a7795-salvator-x-add-bias-setting-for-us.patch
new file mode 100644
index 0000000..70186e0
--- /dev/null
+++ b/patches.renesas/0123-arm64-dts-r8a7795-salvator-x-add-bias-setting-for-us.patch
@@ -0,0 +1,43 @@
+From 4bdc12c1f3a45ee6d0ea897c2d01d7ff12cad296 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Thu, 27 Oct 2016 19:29:27 +0900
+Subject: [PATCH 123/299] arm64: dts: r8a7795: salvator-x: add bias setting for
+ usb1_pins
+
+Since this board doesn't mount pull-up/down registers for
+USB1_{OVC,PWEN} pins, we should enable bias setting to pull these
+pins up/down.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0751e1bd1e9e989df2d5f6a52c28b16093bc9c78)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 16 ++++++++++++++--
+ 1 file changed, 14 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+@@ -309,8 +309,20 @@
+ };
+
+ usb1_pins: usb1 {
+- groups = "usb1";
+- function = "usb1";
++ mux {
++ groups = "usb1";
++ function = "usb1";
++ };
++
++ ovc {
++ pins = "GP_6_27";
++ bias-pull-up;
++ };
++
++ pwen {
++ pins = "GP_6_26";
++ bias-pull-down;
++ };
+ };
+
+ usb2_pins: usb2 {
diff --git a/patches.renesas/0124-arm64-renesas-r8a7796-add-SYS-DMAC-controller-nodes.patch b/patches.renesas/0124-arm64-renesas-r8a7796-add-SYS-DMAC-controller-nodes.patch
new file mode 100644
index 0000000..9fa6280
--- /dev/null
+++ b/patches.renesas/0124-arm64-renesas-r8a7796-add-SYS-DMAC-controller-nodes.patch
@@ -0,0 +1,123 @@
+From 3f33095e57b1e74e1f9e48f97530d1f9d8935788 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 14 Sep 2016 18:45:48 +0200
+Subject: [PATCH 124/299] arm64: renesas: r8a7796: add SYS-DMAC controller
+ nodes
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 935085209343a0c507e3d9a3e01883b25c8f743e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 99 +++++++++++++++++++++++++++++++
+ 1 file changed, 99 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -252,6 +252,105 @@
+ status = "disabled";
+ };
+
++ dmac0: dma-controller@e6700000 {
++ compatible = "renesas,dmac-r8a7796",
++ "renesas,rcar-dmac";
++ reg = <0 0xe6700000 0 0x10000>;
++ interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15";
++ clocks = <&cpg CPG_MOD 219>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <16>;
++ };
++
++ dmac1: dma-controller@e7300000 {
++ compatible = "renesas,dmac-r8a7796",
++ "renesas,rcar-dmac";
++ reg = <0 0xe7300000 0 0x10000>;
++ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15";
++ clocks = <&cpg CPG_MOD 218>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <16>;
++ };
++
++ dmac2: dma-controller@e7310000 {
++ compatible = "renesas,dmac-r8a7796",
++ "renesas,rcar-dmac";
++ reg = <0 0xe7310000 0 0x10000>;
++ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14", "ch15";
++ clocks = <&cpg CPG_MOD 217>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <16>;
++ };
++
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7796";
+ reg = <0 0xee100000 0 0x2000>;
diff --git a/patches.renesas/0125-arm64-dts-r8a7796-add-I2C-support.patch b/patches.renesas/0125-arm64-dts-r8a7796-add-I2C-support.patch
new file mode 100644
index 0000000..9c41e31
--- /dev/null
+++ b/patches.renesas/0125-arm64-dts-r8a7796-add-I2C-support.patch
@@ -0,0 +1,126 @@
+From 1d7766984ea449f7142a53b6ba637e56ab6799fc Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 26 Oct 2016 16:14:07 +0200
+Subject: [PATCH 125/299] arm64: dts: r8a7796: add I2C support
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fcb008a75702c9932f54e5425e7c12b0ea5cf487)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 94 +++++++++++++++++++++++++++++++
+ 1 file changed, 94 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -17,6 +17,16 @@
+ #address-cells = <2>;
+ #size-cells = <2>;
+
++ aliases {
++ i2c0 = &i2c0;
++ i2c1 = &i2c1;
++ i2c2 = &i2c2;
++ i2c3 = &i2c3;
++ i2c4 = &i2c4;
++ i2c5 = &i2c5;
++ i2c6 = &i2c6;
++ };
++
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+@@ -239,6 +249,90 @@
+ #power-domain-cells = <1>;
+ };
+
++ i2c0: i2c@e6500000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe6500000 0 0x40>;
++ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 931>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <110>;
++ status = "disabled";
++ };
++
++ i2c1: i2c@e6508000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe6508000 0 0x40>;
++ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 930>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c2: i2c@e6510000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe6510000 0 0x40>;
++ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 929>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
++ i2c3: i2c@e66d0000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe66d0000 0 0x40>;
++ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 928>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <110>;
++ status = "disabled";
++ };
++
++ i2c4: i2c@e66d8000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe66d8000 0 0x40>;
++ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 927>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <110>;
++ status = "disabled";
++ };
++
++ i2c5: i2c@e66e0000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe66e0000 0 0x40>;
++ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 919>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <110>;
++ status = "disabled";
++ };
++
++ i2c6: i2c@e66e8000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,i2c-r8a7796";
++ reg = <0 0xe66e8000 0 0x40>;
++ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 918>;
++ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ i2c-scl-internal-delay-ns = <6>;
++ status = "disabled";
++ };
++
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
diff --git a/patches.renesas/0126-arm64-dts-r8a7796-Enable-I2C-DMA.patch b/patches.renesas/0126-arm64-dts-r8a7796-Enable-I2C-DMA.patch
new file mode 100644
index 0000000..0d5c0d2
--- /dev/null
+++ b/patches.renesas/0126-arm64-dts-r8a7796-Enable-I2C-DMA.patch
@@ -0,0 +1,83 @@
+From 7ae8c361d05a7a92fd788794c475f913d055e8d1 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 26 Oct 2016 16:14:08 +0200
+Subject: [PATCH 126/299] arm64: dts: r8a7796: Enable I2C DMA
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c758f4e333ee7473056484f7ea2294cb1e58c9d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -257,6 +257,9 @@
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac1 0x91>, <&dmac1 0x90>,
++ <&dmac2 0x91>, <&dmac2 0x90>;
++ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -269,6 +272,9 @@
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac1 0x93>, <&dmac1 0x92>,
++ <&dmac2 0x93>, <&dmac2 0x92>;
++ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -281,6 +287,9 @@
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac1 0x95>, <&dmac1 0x94>,
++ <&dmac2 0x95>, <&dmac2 0x94>;
++ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+@@ -293,6 +302,8 @@
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac0 0x97>, <&dmac0 0x96>;
++ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -305,6 +316,8 @@
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac0 0x99>, <&dmac0 0x98>;
++ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -317,6 +330,8 @@
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
++ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+@@ -329,6 +344,8 @@
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
++ dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
++ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
diff --git a/patches.renesas/0127-arm64-dts-r8a7796-salvator-x-enable-I2C.patch b/patches.renesas/0127-arm64-dts-r8a7796-salvator-x-enable-I2C.patch
new file mode 100644
index 0000000..afd75b8
--- /dev/null
+++ b/patches.renesas/0127-arm64-dts-r8a7796-salvator-x-enable-I2C.patch
@@ -0,0 +1,43 @@
+From 63bcd71ee2f9cbf16b7a7adea57b1b62dff7d5f8 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 26 Oct 2016 16:14:09 +0200
+Subject: [PATCH 127/299] arm64: dts: r8a7796: salvator-x: enable I2C
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 20b93fbb08bd38f094186f604e4e5bdafe23f817)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+@@ -111,6 +111,11 @@
+ function = "scif_clk";
+ };
+
++ i2c2_pins: i2c2 {
++ groups = "i2c2_a";
++ function = "i2c2";
++ };
++
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+@@ -208,6 +213,13 @@
+ status = "okay";
+ };
+
++&i2c2 {
++ pinctrl-0 = <&i2c2_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
+ &wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
diff --git a/patches.renesas/0128-arm64-dts-h3ulcb-update-documentation-with-official-.patch b/patches.renesas/0128-arm64-dts-h3ulcb-update-documentation-with-official-.patch
new file mode 100644
index 0000000..45f2914
--- /dev/null
+++ b/patches.renesas/0128-arm64-dts-h3ulcb-update-documentation-with-official-.patch
@@ -0,0 +1,28 @@
+From e5978b03ec7323f34918ffb62cbf54fca0d61f36 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:04:44 +0300
+Subject: [PATCH 128/299] arm64: dts: h3ulcb: update documentation with
+ official board name
+
+This updates H3ULCB Device tree bindings Documentation with
+official board name
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d65e3e4a7b31328522642882fd8bb9bde11e77d8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -49,7 +49,7 @@ Boards:
+ compatible = "renesas,genmai", "renesas,r7s72100"
+ - Gose
+ compatible = "renesas,gose", "renesas,r8a7793"
+- - H3ULCB (RTP0RC7795SKB00010S)
++ - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S)
+ compatible = "renesas,h3ulcb", "renesas,r8a7795";
+ - Henninger
+ compatible = "renesas,henninger", "renesas,r8a7791"
diff --git a/patches.renesas/0129-arm64-dts-h3ulcb-update-header.patch b/patches.renesas/0129-arm64-dts-h3ulcb-update-header.patch
new file mode 100644
index 0000000..9e87b6b
--- /dev/null
+++ b/patches.renesas/0129-arm64-dts-h3ulcb-update-header.patch
@@ -0,0 +1,24 @@
+From 98d2ad8570c0f78dbc8a2f5a1f1c02007ea746ab Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:04:54 +0300
+Subject: [PATCH 129/299] arm64: dts: h3ulcb: update header
+
+This updates H3ULCB device tree header with official board name
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c77c97557614f07c72393eafa09ef826e0924293)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Device Tree Source for the H3ULCB board
++ * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016 Cogent Embedded, Inc.
diff --git a/patches.renesas/0130-arm64-dts-m3ulcb-add-M3ULCB-board-DT-bindings.patch b/patches.renesas/0130-arm64-dts-m3ulcb-add-M3ULCB-board-DT-bindings.patch
new file mode 100644
index 0000000..b513489
--- /dev/null
+++ b/patches.renesas/0130-arm64-dts-m3ulcb-add-M3ULCB-board-DT-bindings.patch
@@ -0,0 +1,27 @@
+From 4c8c7c992a51002cceaf6d32a07a2e1ed775f77a Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:06:57 +0300
+Subject: [PATCH 130/299] arm64: dts: m3ulcb: add M3ULCB board DT bindings
+
+Add M3ULCB Device tree bindings Documentation, listing it as a supported
+board.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 76b5bba9855e4cd572e3cb44cd7c95b2043f7aee)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -61,6 +61,8 @@ Boards:
+ compatible = "renesas,kzm9g", "renesas,sh73a0"
+ - Lager (RTP0RC7790SEB00010S)
+ compatible = "renesas,lager", "renesas,r8a7790"
++ - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S)
++ compatible = "renesas,m3ulcb", "renesas,r8a7796";
+ - Marzen
+ compatible = "renesas,marzen", "renesas,r8a7779"
+ - Porter (M2-LCDP)
diff --git a/patches.renesas/0131-arm64-dts-m3ulcb-initial-device-tree.patch b/patches.renesas/0131-arm64-dts-m3ulcb-initial-device-tree.patch
new file mode 100644
index 0000000..ac0acd3
--- /dev/null
+++ b/patches.renesas/0131-arm64-dts-m3ulcb-initial-device-tree.patch
@@ -0,0 +1,84 @@
+From c54344f37b65941084eeff49533165eec6b0a2bc Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:07:09 +0300
+Subject: [PATCH 131/299] arm64: dts: m3ulcb: initial device tree
+
+Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
+board (R-Car Starter Kit Pro)
+
+This commit supports the following peripherals:
+- SCIF (console)
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d9b1c753878310c90e8be178f6a8e119fd0aa25d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/Makefile | 2
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 51 +++++++++++++++++++++++++
+ 2 files changed, 52 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+
+--- a/arch/arm64/boot/dts/renesas/Makefile
++++ b/arch/arm64/boot/dts/renesas/Makefile
+@@ -1,5 +1,5 @@
+ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
+-dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb
++dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
+
+ always := $(dtb-y)
+ clean-files := *.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -0,0 +1,51 @@
++/*
++ * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
++ *
++ * Copyright (C) 2016 Renesas Electronics Corp.
++ * Copyright (C) 2016 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7796.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "Renesas M3ULCB board based on r8a7796";
++ compatible = "renesas,m3ulcb", "renesas,r8a7796";
++
++ aliases {
++ serial0 = &scif2;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@48000000 {
++ device_type = "memory";
++ /* first 128MB is reserved for secure area. */
++ reg = <0x0 0x48000000 0x0 0x38000000>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <16666666>;
++};
++
++&pfc {
++ scif2_pins: scif2 {
++ groups = "scif2_data_a";
++ function = "scif2";
++ };
++};
++
++&scif2 {
++ pinctrl-0 = <&scif2_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
diff --git a/patches.renesas/0132-arm64-dts-m3ulcb-enable-SCIF-clk-and-pins.patch b/patches.renesas/0132-arm64-dts-m3ulcb-enable-SCIF-clk-and-pins.patch
new file mode 100644
index 0000000..2cfb01d
--- /dev/null
+++ b/patches.renesas/0132-arm64-dts-m3ulcb-enable-SCIF-clk-and-pins.patch
@@ -0,0 +1,46 @@
+From 4f20215fc1aac53917a0195c6b59ba69e22790cc Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:07:20 +0300
+Subject: [PATCH 132/299] arm64: dts: m3ulcb: enable SCIF clk and pins
+
+This enables the external crystal for the SCIF_CLK and its pinctrl, to
+be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d92ce1a57480e17aff1fb8693cc919bb46a6e0fd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -37,10 +37,18 @@
+ };
+
+ &pfc {
++ pinctrl-0 = <&scif_clk_pins>;
++ pinctrl-names = "default";
++
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
++
++ scif_clk_pins: scif_clk {
++ groups = "scif_clk_a";
++ function = "scif_clk";
++ };
+ };
+
+ &scif2 {
+@@ -49,3 +57,8 @@
+
+ status = "okay";
+ };
++
++&scif_clk {
++ clock-frequency = <14745600>;
++ status = "okay";
++};
diff --git a/patches.renesas/0133-arm64-dts-m3ulcb-enable-GPIO-leds.patch b/patches.renesas/0133-arm64-dts-m3ulcb-enable-GPIO-leds.patch
new file mode 100644
index 0000000..166e2d3
--- /dev/null
+++ b/patches.renesas/0133-arm64-dts-m3ulcb-enable-GPIO-leds.patch
@@ -0,0 +1,35 @@
+From e80f77aaa1bb6a3d8f57d1c47cb148ed50cee4ed Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:07:31 +0300
+Subject: [PATCH 133/299] arm64: dts: m3ulcb: enable GPIO leds
+
+This supports GPIO leds on M3ULCB board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 811a0d07e68ed3bb576e2f193f2c9831bb25c04e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -30,6 +30,17 @@
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ led5 {
++ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
++ };
++ led6 {
++ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
++ };
++ };
+ };
+
+ &extal_clk {
diff --git a/patches.renesas/0134-arm64-dts-m3ulcb-enable-GPIO-keys.patch b/patches.renesas/0134-arm64-dts-m3ulcb-enable-GPIO-keys.patch
new file mode 100644
index 0000000..5101d91
--- /dev/null
+++ b/patches.renesas/0134-arm64-dts-m3ulcb-enable-GPIO-keys.patch
@@ -0,0 +1,44 @@
+From 5fd4b04deff35866cc1ef20294e364861f9e3a47 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:07:43 +0300
+Subject: [PATCH 134/299] arm64: dts: m3ulcb: enable GPIO keys
+
+This supports GPIO keys on M3ULCB board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 96cc1e177c1260e53ac39a0fb109f5d9e7300b09)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -12,6 +12,7 @@
+ /dts-v1/;
+ #include "r8a7796.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+
+ / {
+ model = "Renesas M3ULCB board based on r8a7796";
+@@ -41,6 +42,18 @@
+ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
++
++ keyboard {
++ compatible = "gpio-keys";
++
++ key-1 {
++ linux,code = <KEY_1>;
++ label = "SW3";
++ wakeup-source;
++ debounce-interval = <20>;
++ gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
++ };
++ };
+ };
+
+ &extal_clk {
diff --git a/patches.renesas/0135-arm64-dts-m3ulcb-enable-EXTALR-clk.patch b/patches.renesas/0135-arm64-dts-m3ulcb-enable-EXTALR-clk.patch
new file mode 100644
index 0000000..7f87336
--- /dev/null
+++ b/patches.renesas/0135-arm64-dts-m3ulcb-enable-EXTALR-clk.patch
@@ -0,0 +1,28 @@
+From 46462227abe231fd21ecea2ac6f78ed71db45d0a Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:08:02 +0300
+Subject: [PATCH 135/299] arm64: dts: m3ulcb: enable EXTALR clk
+
+This enables EXTALR clock that can be used for the watchdog.
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7be98b473d407583d29baad10df50639fd63b213)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -60,6 +60,10 @@
+ clock-frequency = <16666666>;
+ };
+
++&extalr_clk {
++ clock-frequency = <32768>;
++};
++
+ &pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
diff --git a/patches.renesas/0136-arm64-dts-m3ulcb-enable-WDT.patch b/patches.renesas/0136-arm64-dts-m3ulcb-enable-WDT.patch
new file mode 100644
index 0000000..ca7b801
--- /dev/null
+++ b/patches.renesas/0136-arm64-dts-m3ulcb-enable-WDT.patch
@@ -0,0 +1,26 @@
+From 089ca605ca48326332893e0f641c8f3922c33b70 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Thu, 3 Nov 2016 21:08:12 +0300
+Subject: [PATCH 136/299] arm64: dts: m3ulcb: enable WDT
+
+This supports watchdog timer for M3ULCB board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 31e12cb663b0392c9dda1c6edf0c4b22bf15232d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -90,3 +90,8 @@
+ clock-frequency = <14745600>;
+ status = "okay";
+ };
++
++&wdt0 {
++ timeout-sec = <60>;
++ status = "okay";
++};
diff --git a/patches.renesas/0137-arm64-dts-m3ulcb-enable-SDHI0.patch b/patches.renesas/0137-arm64-dts-m3ulcb-enable-SDHI0.patch
new file mode 100644
index 0000000..a360ba0
--- /dev/null
+++ b/patches.renesas/0137-arm64-dts-m3ulcb-enable-SDHI0.patch
@@ -0,0 +1,80 @@
+From 8c1a354dbb8e44d73ed2e1d335ac1c213312b4ac Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Tue, 8 Nov 2016 17:14:21 +0300
+Subject: [PATCH 137/299] arm64: dts: m3ulcb: enable SDHI0
+
+This supports SDHI0 on M3ULCB board SD card slot
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5be54db85872fddf060ccec962a50b40d3b24625)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 49 +++++++++++++++++++++++++
+ 1 file changed, 49 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -54,6 +54,30 @@
+ gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ };
+ };
++
++ vcc_sdhi0: regulator-vcc-sdhi0 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI0 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
++ enable-active-high;
++ };
++
++ vccq_sdhi0: regulator-vccq-sdhi0 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI0 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
+ };
+
+ &extal_clk {
+@@ -77,6 +101,31 @@
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
++
++ sdhi0_pins: sd0 {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <3300>;
++ };
++
++ sdhi0_pins_uhs: sd0_uhs {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <1800>;
++ };
++};
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-1 = <&sdhi0_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <&vcc_sdhi0>;
++ vqmmc-supply = <&vccq_sdhi0>;
++ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
++ bus-width = <4>;
++ sd-uhs-sdr50;
++ status = "okay";
+ };
+
+ &scif2 {
diff --git a/patches.renesas/0138-arm64-dts-m3ulcb-enable-SDHI2.patch b/patches.renesas/0138-arm64-dts-m3ulcb-enable-SDHI2.patch
new file mode 100644
index 0000000..d9bdb31
--- /dev/null
+++ b/patches.renesas/0138-arm64-dts-m3ulcb-enable-SDHI2.patch
@@ -0,0 +1,81 @@
+From 10210cd97a3b21235822d271acf105c4daaca13d Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Tue, 8 Nov 2016 17:14:42 +0300
+Subject: [PATCH 138/299] arm64: dts: m3ulcb: enable SDHI2
+
+This supports SDHI2 for M3ULCB onboard eMMC
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fd51baee7abc388916b3e3b58dc062ef9c534150)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 43 +++++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+@@ -55,6 +55,24 @@
+ };
+ };
+
++ reg_1p8v: regulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-1.8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ reg_3p3v: regulator1 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+@@ -113,6 +131,18 @@
+ function = "sdhi0";
+ power-source = <1800>;
+ };
++
++ sdhi2_pins: sd2 {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <3300>;
++ };
++
++ sdhi2_pins_uhs: sd2_uhs {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <1800>;
++ };
+ };
+
+ &sdhi0 {
+@@ -128,6 +158,19 @@
+ status = "okay";
+ };
+
++&sdhi2 {
++ /* used for on-board 8bit eMMC */
++ pinctrl-0 = <&sdhi2_pins>;
++ pinctrl-1 = <&sdhi2_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <®_1p8v>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
++
+ &scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
diff --git a/patches.renesas/0139-arm64-dts-h3ulcb-enable-SDHI2.patch b/patches.renesas/0139-arm64-dts-h3ulcb-enable-SDHI2.patch
new file mode 100644
index 0000000..95ccd1c
--- /dev/null
+++ b/patches.renesas/0139-arm64-dts-h3ulcb-enable-SDHI2.patch
@@ -0,0 +1,81 @@
+From 68662916b559606a96907789ad27b3058e8511fa Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Tue, 8 Nov 2016 17:16:19 +0300
+Subject: [PATCH 139/299] arm64: dts: h3ulcb: enable SDHI2
+
+This supports SDHI2 for H3ULCB onboard eMMC
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 274dc8916d4b4b2f6a2636e670771c806a7e6a96)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 43 +++++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+@@ -62,6 +62,24 @@
+ clock-frequency = <24576000>;
+ };
+
++ reg_1p8v: regulator0 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-1.8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ reg_3p3v: regulator1 {
++ compatible = "regulator-fixed";
++ regulator-name = "fixed-3.3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+@@ -157,6 +175,18 @@
+ power-source = <1800>;
+ };
+
++ sdhi2_pins: sd2 {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <3300>;
++ };
++
++ sdhi2_pins_uhs: sd2_uhs {
++ groups = "sdhi2_data8", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <1800>;
++ };
++
+ sound_pins: sound {
+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
+ function = "ssi";
+@@ -273,6 +303,19 @@
+ status = "okay";
+ };
+
++&sdhi2 {
++ /* used for on-board 8bit eMMC */
++ pinctrl-0 = <&sdhi2_pins>;
++ pinctrl-1 = <&sdhi2_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
++
++ vmmc-supply = <®_3p3v>;
++ vqmmc-supply = <®_1p8v>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
++
+ &ssi1 {
+ shared-pin;
+ };
diff --git a/patches.renesas/0140-arm64-dts-h3ulcb-rename-SDHI0-pins.patch b/patches.renesas/0140-arm64-dts-h3ulcb-rename-SDHI0-pins.patch
new file mode 100644
index 0000000..36c4bf6
--- /dev/null
+++ b/patches.renesas/0140-arm64-dts-h3ulcb-rename-SDHI0-pins.patch
@@ -0,0 +1,44 @@
+From c8f98175fe89870994788ef723bdb9b2268c28f7 Mon Sep 17 00:00:00 2001
+From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Date: Tue, 8 Nov 2016 17:16:29 +0300
+Subject: [PATCH 140/299] arm64: dts: h3ulcb: rename SDHI0 pins
+
+This changes SDHI0 pin names for H3ULCB board
+
+Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 93373c309a703b57690216db4106a4a534929c15)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+@@ -163,13 +163,13 @@
+ function = "avb";
+ };
+
+- sdhi0_pins_3v3: sd0_3v3 {
++ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+- sdhi0_pins_1v8: sd0_1v8 {
++ sdhi0_pins_uhs: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+@@ -291,8 +291,8 @@
+ };
+
+ &sdhi0 {
+- pinctrl-0 = <&sdhi0_pins_3v3>;
+- pinctrl-1 = <&sdhi0_pins_1v8>;
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
diff --git a/patches.renesas/0141-arm64-dts-r8a7795-Add-device-node-for-PRR.patch b/patches.renesas/0141-arm64-dts-r8a7795-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..094aea1
--- /dev/null
+++ b/patches.renesas/0141-arm64-dts-r8a7795-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From aa834de7cee80c0d32d9371239aaa1ab1e7d25d6 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:16 +0100
+Subject: [PATCH 141/299] arm64: dts: r8a7795: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bd6777f8b4cdb53dafb12229410acf2ab85d7c28)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -321,6 +321,11 @@
+ #power-domain-cells = <0>;
+ };
+
++ prr: chipid@fff00044 {
++ compatible = "renesas,prr";
++ reg = <0 0xfff00044 0 4>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7795-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
diff --git a/patches.renesas/0142-arm64-dts-r8a7796-Add-device-node-for-PRR.patch b/patches.renesas/0142-arm64-dts-r8a7796-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..53c47d5
--- /dev/null
+++ b/patches.renesas/0142-arm64-dts-r8a7796-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From d15a25c948bb20e6fe1c72f7cc1db86541651d38 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:17 +0100
+Subject: [PATCH 142/299] arm64: dts: r8a7796: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5de68961cf5618c1ce5bb15848b36121247f23d5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -243,6 +243,11 @@
+ #power-domain-cells = <0>;
+ };
+
++ prr: chipid@fff00044 {
++ compatible = "renesas,prr";
++ reg = <0 0xfff00044 0 4>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7796-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
diff --git a/patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch b/patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch
new file mode 100644
index 0000000..29a1979
--- /dev/null
+++ b/patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch
@@ -0,0 +1,28 @@
+From ff135165cdddc3e6c7c5767ce50ec77b36f2d18c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 23 Nov 2016 14:36:16 +0100
+Subject: [PATCH 143/299] arm64: defconfig: Do not lower CONFIG_LOG_BUF_SHIFT
+
+The default value of 17 for CONFIG_LOG_BUF_SHIFT is much more suitable
+than 14. The latter easily leads to lost kernel messages on systems with
+only one CPU core.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Catalin Marinas <catalin.marinas@arm.com>
+(cherry picked from commit 8879f9ffab260f9a0d0e071c0bc2201143e60b2d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/configs/defconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -11,7 +11,6 @@ CONFIG_TASK_XACCT=y
+ CONFIG_TASK_IO_ACCOUNTING=y
+ CONFIG_IKCONFIG=y
+ CONFIG_IKCONFIG_PROC=y
+-CONFIG_LOG_BUF_SHIFT=14
+ CONFIG_MEMCG=y
+ CONFIG_MEMCG_SWAP=y
+ CONFIG_BLK_CGROUP=y
diff --git a/patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch b/patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch
new file mode 100644
index 0000000..761c7fe
--- /dev/null
+++ b/patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch
@@ -0,0 +1,27 @@
+From 448077a2a56c5bff5986abc0f0c03e80dc773a54 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Thu, 24 Nov 2016 15:57:52 +0100
+Subject: [PATCH 144/299] arm64: defconfig: drop GPIO_SYSFS on multiplatforms
+
+The sysfs ABI to GPIO is marked obsolete and should not be
+encouraged. Users should be encouraged to switch to using the
+character device.
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit a8b76d9917f5d2a9f802393e943c3b8bb3067fd5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/configs/defconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -252,7 +252,6 @@ CONFIG_PINCTRL_MSM8916=y
+ CONFIG_PINCTRL_MSM8996=y
+ CONFIG_PINCTRL_QDF2XXX=y
+ CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+-CONFIG_GPIO_SYSFS=y
+ CONFIG_GPIO_DWAPB=y
+ CONFIG_GPIO_PL061=y
+ CONFIG_GPIO_RCAR=y
diff --git a/patches.renesas/0145-arm64-dts-h3ulcb-Provide-sd0_uhs-node.patch b/patches.renesas/0145-arm64-dts-h3ulcb-Provide-sd0_uhs-node.patch
new file mode 100644
index 0000000..f76433f
--- /dev/null
+++ b/patches.renesas/0145-arm64-dts-h3ulcb-Provide-sd0_uhs-node.patch
@@ -0,0 +1,28 @@
+From 8cb4f51c13a5ed389c6f574ef32c07c3ef6684f6 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 1 Dec 2016 10:07:26 +0100
+Subject: [PATCH 145/299] arm64: dts: h3ulcb: Provide sd0_uhs node
+
+Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.
+
+Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
+Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Fixes: 93373c309a70 ("arm64: dts: h3ulcb: rename SDHI0 pins")
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ebcb400af619ee0ddeb39c06fc35511b20cc697)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
++++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+@@ -169,7 +169,7 @@
+ power-source = <3300>;
+ };
+
+- sdhi0_pins_uhs: sd0 {
++ sdhi0_pins_uhs: sd0_uhs {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
diff --git a/patches.renesas/0146-ravb-Remove-Rx-overflow-log-messages.patch b/patches.renesas/0146-ravb-Remove-Rx-overflow-log-messages.patch
new file mode 100644
index 0000000..305a777
--- /dev/null
+++ b/patches.renesas/0146-ravb-Remove-Rx-overflow-log-messages.patch
@@ -0,0 +1,40 @@
+From 82f06587873e40f3a20b90a2e5d19fc3cc6545e3 Mon Sep 17 00:00:00 2001
+From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
+Date: Thu, 12 Jan 2017 13:21:06 +0100
+Subject: [PATCH 146/299] ravb: Remove Rx overflow log messages
+
+Remove Rx overflow log messages as in an environment where logging results
+in network traffic logging may cause further overflows.
+
+Fixes: c156633f1353 ("Renesas Ethernet AVB driver proper")
+Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
+[simon: reworked changelog]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+
+(cherry picked from commit 18a3ed59d09cf81a6447aadf6931bf0c9ffec5e0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/ravb_main.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/renesas/ravb_main.c
++++ b/drivers/net/ethernet/renesas/ravb_main.c
+@@ -941,14 +941,10 @@ static int ravb_poll(struct napi_struct
+ /* Receive error message handling */
+ priv->rx_over_errors = priv->stats[RAVB_BE].rx_over_errors;
+ priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors;
+- if (priv->rx_over_errors != ndev->stats.rx_over_errors) {
++ if (priv->rx_over_errors != ndev->stats.rx_over_errors)
+ ndev->stats.rx_over_errors = priv->rx_over_errors;
+- netif_err(priv, rx_err, ndev, "Receive Descriptor Empty\n");
+- }
+- if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors) {
++ if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors)
+ ndev->stats.rx_fifo_errors = priv->rx_fifo_errors;
+- netif_err(priv, rx_err, ndev, "Receive FIFO Overflow\n");
+- }
+ out:
+ return budget - quota;
+ }
diff --git a/patches.renesas/0147-mmc-core-Add-helper-to-see-if-a-host-can-be-retuned.patch b/patches.renesas/0147-mmc-core-Add-helper-to-see-if-a-host-can-be-retuned.patch
new file mode 100644
index 0000000..3dd34d4
--- /dev/null
+++ b/patches.renesas/0147-mmc-core-Add-helper-to-see-if-a-host-can-be-retuned.patch
@@ -0,0 +1,32 @@
+From c8a80644992922d65fb3c81b55b7ac58e4ca678b Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 3 Nov 2016 15:15:59 +0100
+Subject: [PATCH 147/299] mmc: core: Add helper to see if a host can be retuned
+
+This is in preparation for restoring saved tuning parameters
+when resuming the TMIO driver.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit c820af5f18ec248b3cb61a9a9ce47ef0f2e9ec63)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/linux/mmc/host.h | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/include/linux/mmc/host.h
++++ b/include/linux/mmc/host.h
+@@ -546,6 +546,11 @@ static inline void mmc_retune_recheck(st
+ host->retune_now = 1;
+ }
+
++static inline bool mmc_can_retune(struct mmc_host *host)
++{
++ return host->can_retune == 1;
++}
++
+ void mmc_retune_pause(struct mmc_host *host);
+ void mmc_retune_unpause(struct mmc_host *host);
+
diff --git a/patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch b/patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch
new file mode 100644
index 0000000..f71db94
--- /dev/null
+++ b/patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch
@@ -0,0 +1,86 @@
+From ec902efc98f3e08338f880411687e11e7ce505c2 Mon Sep 17 00:00:00 2001
+From: Ai Kyuse <ai.kyuse.uw@renesas.com>
+Date: Thu, 3 Nov 2016 15:16:00 +0100
+Subject: [PATCH 148/299] mmc: tmio: enhance illegal sequence handling
+
+An illegal sequence command error may occur if there is a stopbit or
+cmd_index error as well as a CRC error. The correct course of action
+is to re-enable IRQs
+
+An illegal sequence data error may occur if there is a CRC or stopbit
+error, or underrun. In this case set data->error correctly.
+
+This is in preparation for enabling tuning support which relies on
+differentiating between illegal sequence and other errors.
+
+Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
+[simon: broken out of a larger patch]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+
+(cherry picked from commit 96e0b2ba00ee5dacb12bed6585145ce784ec9153)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc_pio.c | 15 +++++++++------
+ 1 file changed, 9 insertions(+), 6 deletions(-)
+
+--- a/drivers/mmc/host/tmio_mmc_pio.c
++++ b/drivers/mmc/host/tmio_mmc_pio.c
+@@ -552,7 +552,7 @@ void tmio_mmc_do_data_irq(struct tmio_mm
+ schedule_work(&host->done);
+ }
+
+-static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
++static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
+ {
+ struct mmc_data *data;
+ spin_lock(&host->lock);
+@@ -561,6 +561,9 @@ static void tmio_mmc_data_irq(struct tmi
+ if (!data)
+ goto out;
+
++ if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
++ stat & TMIO_STAT_TXUNDERRUN)
++ data->error = -EILSEQ;
+ if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
+ u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
+ bool done = false;
+@@ -609,8 +612,6 @@ static void tmio_mmc_cmd_irq(struct tmio
+ goto out;
+ }
+
+- host->cmd = NULL;
+-
+ /* This controller is sicker than the PXA one. Not only do we need to
+ * drop the top 8 bits of the first response word, we also need to
+ * modify the order of the response for short response command types.
+@@ -630,14 +631,16 @@ static void tmio_mmc_cmd_irq(struct tmio
+
+ if (stat & TMIO_STAT_CMDTIMEOUT)
+ cmd->error = -ETIMEDOUT;
+- else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
++ else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
++ stat & TMIO_STAT_STOPBIT_ERR ||
++ stat & TMIO_STAT_CMD_IDX_ERR)
+ cmd->error = -EILSEQ;
+
+ /* If there is data to handle we enable data IRQs here, and
+ * we will ultimatley finish the request in the data_end handler.
+ * If theres no data or we encountered an error, finish now.
+ */
+- if (host->data && !cmd->error) {
++ if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
+ if (host->data->flags & MMC_DATA_READ) {
+ if (host->force_pio || !host->chan_rx)
+ tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
+@@ -698,7 +701,7 @@ static bool __tmio_mmc_sdcard_irq(struct
+ /* Data transfer completion */
+ if (ireg & TMIO_STAT_DATAEND) {
+ tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
+- tmio_mmc_data_irq(host);
++ tmio_mmc_data_irq(host, status);
+ return true;
+ }
+
diff --git a/patches.renesas/0149-mmc-tmio-document-mandatory-and-optional-callbacks.patch b/patches.renesas/0149-mmc-tmio-document-mandatory-and-optional-callbacks.patch
new file mode 100644
index 0000000..d6447e6
--- /dev/null
+++ b/patches.renesas/0149-mmc-tmio-document-mandatory-and-optional-callbacks.patch
@@ -0,0 +1,37 @@
+From 29624c269f19acfb89d43134d37f6ca7c7ecf4f9 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 3 Nov 2016 15:16:01 +0100
+Subject: [PATCH 149/299] mmc: tmio: document mandatory and optional callbacks
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 2f87365f832bbc26e32f23588aaeb40abe15ff0d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc.h | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -154,8 +154,10 @@ struct tmio_mmc_host {
+ bool native_hotplug;
+ bool sdio_irq_enabled;
+
+- int (*write16_hook)(struct tmio_mmc_host *host, int addr);
++ /* Mandatory callback */
+ int (*clk_enable)(struct tmio_mmc_host *host);
++
++ /* Optional callbacks */
+ unsigned int (*clk_update)(struct tmio_mmc_host *host,
+ unsigned int new_clock);
+ void (*clk_disable)(struct tmio_mmc_host *host);
+@@ -164,6 +166,7 @@ struct tmio_mmc_host {
+ int (*card_busy)(struct mmc_host *mmc);
+ int (*start_signal_voltage_switch)(struct mmc_host *mmc,
+ struct mmc_ios *ios);
++ int (*write16_hook)(struct tmio_mmc_host *host, int addr);
+ };
+
+ struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
diff --git a/patches.renesas/0150-mmc-tmio-Add-hw-reset-support.patch b/patches.renesas/0150-mmc-tmio-Add-hw-reset-support.patch
new file mode 100644
index 0000000..85d1c0c
--- /dev/null
+++ b/patches.renesas/0150-mmc-tmio-Add-hw-reset-support.patch
@@ -0,0 +1,54 @@
+From e594f70dc87a42560b925e3abc450d6e16f65584 Mon Sep 17 00:00:00 2001
+From: Ai Kyuse <ai.kyuse.uw@renesas.com>
+Date: Thu, 3 Nov 2016 15:16:02 +0100
+Subject: [PATCH 150/299] mmc: tmio: Add hw reset support
+
+Add hw reset support.
+
+Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit e8f36b5d3b54a49df02c950050659a5082e2c880)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc.h | 1 +
+ drivers/mmc/host/tmio_mmc_pio.c | 9 +++++++++
+ 2 files changed, 10 insertions(+)
+
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -167,6 +167,7 @@ struct tmio_mmc_host {
+ int (*start_signal_voltage_switch)(struct mmc_host *mmc,
+ struct mmc_ios *ios);
+ int (*write16_hook)(struct tmio_mmc_host *host, int addr);
++ void (*hw_reset)(struct tmio_mmc_host *host);
+ };
+
+ struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
+--- a/drivers/mmc/host/tmio_mmc_pio.c
++++ b/drivers/mmc/host/tmio_mmc_pio.c
+@@ -789,6 +789,14 @@ static int tmio_mmc_start_data(struct tm
+ return 0;
+ }
+
++static void tmio_mmc_hw_reset(struct mmc_host *mmc)
++{
++ struct tmio_mmc_host *host = mmc_priv(mmc);
++
++ if (host->hw_reset)
++ host->hw_reset(host);
++}
++
+ /* Process requests from the MMC layer */
+ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
+ {
+@@ -1005,6 +1013,7 @@ static struct mmc_host_ops tmio_mmc_ops
+ .get_cd = mmc_gpio_get_cd,
+ .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
+ .multi_io_quirk = tmio_multi_io_quirk,
++ .hw_reset = tmio_mmc_hw_reset,
+ };
+
+ static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
diff --git a/patches.renesas/0151-mmc-tmio-Add-tuning-support.patch b/patches.renesas/0151-mmc-tmio-Add-tuning-support.patch
new file mode 100644
index 0000000..c16f0d3
--- /dev/null
+++ b/patches.renesas/0151-mmc-tmio-Add-tuning-support.patch
@@ -0,0 +1,155 @@
+From cd908fa215b905e0ca976d433b58094c6d451b79 Mon Sep 17 00:00:00 2001
+From: Ai Kyuse <ai.kyuse.uw@renesas.com>
+Date: Thu, 3 Nov 2016 15:16:03 +0100
+Subject: [PATCH 151/299] mmc: tmio: Add tuning support
+
+Add tuning support for use with SDR104 mode
+
+Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 4f11997773b6b452b5a0d620c5ac5050e75c227e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc.h | 14 +++++++++
+ drivers/mmc/host/tmio_mmc_pio.c | 62 ++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 76 insertions(+)
+
+--- a/drivers/mmc/host/tmio_mmc.h
++++ b/drivers/mmc/host/tmio_mmc.h
+@@ -153,6 +153,7 @@ struct tmio_mmc_host {
+ struct mutex ios_lock; /* protect set_ios() context */
+ bool native_hotplug;
+ bool sdio_irq_enabled;
++ u32 scc_tappos;
+
+ /* Mandatory callback */
+ int (*clk_enable)(struct tmio_mmc_host *host);
+@@ -168,6 +169,19 @@ struct tmio_mmc_host {
+ struct mmc_ios *ios);
+ int (*write16_hook)(struct tmio_mmc_host *host, int addr);
+ void (*hw_reset)(struct tmio_mmc_host *host);
++ void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
++ bool (*check_scc_error)(struct tmio_mmc_host *host);
++
++ /*
++ * Mandatory callback for tuning to occur which is optional for SDR50
++ * and mandatory for SDR104.
++ */
++ unsigned int (*init_tuning)(struct tmio_mmc_host *host);
++ int (*select_tuning)(struct tmio_mmc_host *host);
++
++ /* Tuning values: 1 for success, 0 for failure */
++ DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
++ unsigned int tap_num;
+ };
+
+ struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
+--- a/drivers/mmc/host/tmio_mmc_pio.c
++++ b/drivers/mmc/host/tmio_mmc_pio.c
+@@ -36,6 +36,7 @@
+ #include <linux/io.h>
+ #include <linux/irq.h>
+ #include <linux/mfd/tmio.h>
++#include <linux/mmc/card.h>
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/mmc.h>
+ #include <linux/mmc/slot-gpio.h>
+@@ -298,6 +299,9 @@ static void tmio_mmc_finish_request(stru
+ if (mrq->cmd->error || (mrq->data && mrq->data->error))
+ tmio_mmc_abort_dma(host);
+
++ if (host->check_scc_error)
++ host->check_scc_error(host);
++
+ mmc_request_done(host->mmc, mrq);
+ }
+
+@@ -797,6 +801,55 @@ static void tmio_mmc_hw_reset(struct mmc
+ host->hw_reset(host);
+ }
+
++static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
++{
++ struct tmio_mmc_host *host = mmc_priv(mmc);
++ int i, ret = 0;
++
++ if (!host->tap_num) {
++ if (!host->init_tuning || !host->select_tuning)
++ /* Tuning is not supported */
++ goto out;
++
++ host->tap_num = host->init_tuning(host);
++ if (!host->tap_num)
++ /* Tuning is not supported */
++ goto out;
++ }
++
++ if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
++ dev_warn_once(&host->pdev->dev,
++ "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
++ goto out;
++ }
++
++ bitmap_zero(host->taps, host->tap_num * 2);
++
++ /* Issue CMD19 twice for each tap */
++ for (i = 0; i < 2 * host->tap_num; i++) {
++ if (host->prepare_tuning)
++ host->prepare_tuning(host, i % host->tap_num);
++
++ ret = mmc_send_tuning(mmc, opcode, NULL);
++ if (ret && ret != -EILSEQ)
++ goto out;
++ if (ret == 0)
++ set_bit(i, host->taps);
++
++ mdelay(1);
++ }
++
++ ret = host->select_tuning(host);
++
++out:
++ if (ret < 0) {
++ dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
++ tmio_mmc_hw_reset(mmc);
++ }
++
++ return ret;
++}
++
+ /* Process requests from the MMC layer */
+ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
+ {
+@@ -1014,6 +1067,7 @@ static struct mmc_host_ops tmio_mmc_ops
+ .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
+ .multi_io_quirk = tmio_multi_io_quirk,
+ .hw_reset = tmio_mmc_hw_reset,
++ .execute_tuning = tmio_mmc_execute_tuning,
+ };
+
+ static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
+@@ -1260,6 +1314,11 @@ int tmio_mmc_host_runtime_suspend(struct
+ }
+ EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
+
++static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
++{
++ return host->tap_num && mmc_can_retune(host->mmc);
++}
++
+ int tmio_mmc_host_runtime_resume(struct device *dev)
+ {
+ struct mmc_host *mmc = dev_get_drvdata(dev);
+@@ -1273,6 +1332,9 @@ int tmio_mmc_host_runtime_resume(struct
+
+ tmio_mmc_enable_dma(host, true);
+
++ if (tmio_mmc_can_retune(host) && host->select_tuning(host))
++ dev_warn(&host->pdev->dev, "Tuning selection failed\n");
++
+ return 0;
+ }
+ EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
diff --git a/patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch b/patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch
new file mode 100644
index 0000000..cab7ba7
--- /dev/null
+++ b/patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch
@@ -0,0 +1,357 @@
+From 843c1f55ac23205c5c729044f959a5d856895371 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 3 Nov 2016 15:16:04 +0100
+Subject: [PATCH 152/299] mmc: sh_mobile_sdhi: Add tuning support
+
+Add tuning support for use with SDR104 mode
+This includes adding support for the sampling clock controller (SCC).
+
+Based on work by Ai Kyuse.
+
+Cc: Ai Kyuse <ai.kyuse.uw@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 06f438dd389a699d27585f2a4d3685fd1ce05a75)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/sh_mobile_sdhi.c | 265 +++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 264 insertions(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/sh_mobile_sdhi.c
++++ b/drivers/mmc/host/sh_mobile_sdhi.c
+@@ -47,6 +47,11 @@
+
+ #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
+
++struct sh_mobile_sdhi_scc {
++ unsigned long clk_rate; /* clock rate for SDR104 */
++ u32 tap; /* sampling clock position for SDR104 */
++};
++
+ struct sh_mobile_sdhi_of_data {
+ unsigned long tmio_flags;
+ u32 tmio_ocr_mask;
+@@ -55,6 +60,9 @@ struct sh_mobile_sdhi_of_data {
+ enum dma_slave_buswidth dma_buswidth;
+ dma_addr_t dma_rx_offset;
+ unsigned bus_shift;
++ int scc_offset;
++ struct sh_mobile_sdhi_scc *taps;
++ int taps_num;
+ };
+
+ static const struct sh_mobile_sdhi_of_data of_default_cfg = {
+@@ -73,12 +81,35 @@ static const struct sh_mobile_sdhi_of_da
+ .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+ };
+
++/* Definitions for sampling clocks */
++static struct sh_mobile_sdhi_scc rcar_gen2_scc_taps[] = {
++ {
++ .clk_rate = 156000000,
++ .tap = 0x00000703,
++ },
++ {
++ .clk_rate = 0,
++ .tap = 0x00000300,
++ },
++};
++
+ static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
+ TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
+ .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+ .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
+ .dma_rx_offset = 0x2000,
++ .scc_offset = 0x0300,
++ .taps = rcar_gen2_scc_taps,
++ .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
++};
++
++/* Definitions for sampling clocks */
++static struct sh_mobile_sdhi_scc rcar_gen3_scc_taps[] = {
++ {
++ .clk_rate = 0,
++ .tap = 0x00000300,
++ },
+ };
+
+ static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
+@@ -86,6 +117,9 @@ static const struct sh_mobile_sdhi_of_da
+ TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
+ .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+ .bus_shift = 2,
++ .scc_offset = 0x1000,
++ .taps = rcar_gen3_scc_taps,
++ .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
+ };
+
+ static const struct of_device_id sh_mobile_sdhi_of_match[] = {
+@@ -113,6 +147,7 @@ struct sh_mobile_sdhi {
+ struct tmio_mmc_dma dma_priv;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default, *pins_uhs;
++ void __iomem *scc_ctl;
+ };
+
+ static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
+@@ -263,6 +298,201 @@ static int sh_mobile_sdhi_start_signal_v
+ return pinctrl_select_state(priv->pinctrl, pin_state);
+ }
+
++/* SCC registers */
++#define SH_MOBILE_SDHI_SCC_DTCNTL 0x000
++#define SH_MOBILE_SDHI_SCC_TAPSET 0x002
++#define SH_MOBILE_SDHI_SCC_DT2FF 0x004
++#define SH_MOBILE_SDHI_SCC_CKSEL 0x006
++#define SH_MOBILE_SDHI_SCC_RVSCNTL 0x008
++#define SH_MOBILE_SDHI_SCC_RVSREQ 0x00A
++
++/* Definitions for values the SH_MOBILE_SDHI_SCC_DTCNTL register */
++#define SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN BIT(0)
++#define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT 16
++#define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK 0xff
++
++/* Definitions for values the SH_MOBILE_SDHI_SCC_CKSEL register */
++#define SH_MOBILE_SDHI_SCC_CKSEL_DTSEL BIT(0)
++/* Definitions for values the SH_MOBILE_SDHI_SCC_RVSCNTL register */
++#define SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN BIT(0)
++/* Definitions for values the SH_MOBILE_SDHI_SCC_RVSREQ register */
++#define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2)
++
++static inline u32 sd_scc_read32(struct tmio_mmc_host *host,
++ struct sh_mobile_sdhi *priv, int addr)
++{
++ return readl(priv->scc_ctl + (addr << host->bus_shift));
++}
++
++static inline void sd_scc_write32(struct tmio_mmc_host *host,
++ struct sh_mobile_sdhi *priv,
++ int addr, u32 val)
++{
++ writel(val, priv->scc_ctl + (addr << host->bus_shift));
++}
++
++static unsigned int sh_mobile_sdhi_init_tuning(struct tmio_mmc_host *host)
++{
++ struct sh_mobile_sdhi *priv;
++
++ if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
++ return 0;
++
++ priv = host_to_priv(host);
++
++ /* set sampling clock selection range */
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL,
++ 0x8 << SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT);
++
++ /* Initialize SCC */
++ sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, 0x0);
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL,
++ SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN |
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL));
++
++ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
++ sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL,
++ SH_MOBILE_SDHI_SCC_CKSEL_DTSEL |
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL));
++
++ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
++ sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
++ ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, host->scc_tappos);
++
++ /* Read TAPNUM */
++ return (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL) >>
++ SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) &
++ SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK;
++}
++
++static void sh_mobile_sdhi_prepare_tuning(struct tmio_mmc_host *host,
++ unsigned long tap)
++{
++ struct sh_mobile_sdhi *priv = host_to_priv(host);
++
++ /* Set sampling clock position */
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap);
++}
++
++#define SH_MOBILE_SDHI_MAX_TAP 3
++
++static int sh_mobile_sdhi_select_tuning(struct tmio_mmc_host *host)
++{
++ struct sh_mobile_sdhi *priv = host_to_priv(host);
++ unsigned long tap_cnt; /* counter of tuning success */
++ unsigned long tap_set; /* tap position */
++ unsigned long tap_start;/* start position of tuning success */
++ unsigned long tap_end; /* end position of tuning success */
++ unsigned long ntap; /* temporary counter of tuning success */
++ unsigned long i;
++
++ /* Clear SCC_RVSREQ */
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
++
++ /*
++ * Find the longest consecutive run of successful probes. If that
++ * is more than SH_MOBILE_SDHI_MAX_TAP probes long then use the
++ * center index as the tap.
++ */
++ tap_cnt = 0;
++ ntap = 0;
++ tap_start = 0;
++ tap_end = 0;
++ for (i = 0; i < host->tap_num * 2; i++) {
++ if (test_bit(i, host->taps))
++ ntap++;
++ else {
++ if (ntap > tap_cnt) {
++ tap_start = i - ntap;
++ tap_end = i - 1;
++ tap_cnt = ntap;
++ }
++ ntap = 0;
++ }
++ }
++
++ if (ntap > tap_cnt) {
++ tap_start = i - ntap;
++ tap_end = i - 1;
++ tap_cnt = ntap;
++ }
++
++ if (tap_cnt >= SH_MOBILE_SDHI_MAX_TAP)
++ tap_set = (tap_start + tap_end) / 2 % host->tap_num;
++ else
++ return -EIO;
++
++ /* Set SCC */
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap_set);
++
++ /* Enable auto re-tuning */
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
++ SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN |
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
++
++ return 0;
++}
++
++
++static bool sh_mobile_sdhi_check_scc_error(struct tmio_mmc_host *host)
++{
++ struct sh_mobile_sdhi *priv;
++
++ if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
++ return 0;
++
++ priv = host_to_priv(host);
++
++ /* Check SCC error */
++ if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) &
++ SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &&
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ) &
++ SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) {
++ /* Clear SCC error */
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0);
++ return true;
++ }
++
++ return false;
++}
++
++static void sh_mobile_sdhi_hw_reset(struct tmio_mmc_host *host)
++{
++ struct sh_mobile_sdhi *priv;
++
++ if (!(host->mmc->caps & MMC_CAP_UHS_SDR104))
++ return;
++
++ priv = host_to_priv(host);
++
++ /* Reset SCC */
++ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
++ sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL,
++ ~SH_MOBILE_SDHI_SCC_CKSEL_DTSEL &
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL));
++
++ sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
++ sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
++ ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
++
++ sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
++ ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
++ sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
++}
++
+ static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
+ {
+ int timeout = 1000;
+@@ -333,7 +563,7 @@ static int sh_mobile_sdhi_probe(struct p
+ struct tmio_mmc_data *mmd = pdev->dev.platform_data;
+ struct tmio_mmc_host *host;
+ struct resource *res;
+- int irq, ret, i = 0;
++ int irq, ret, i;
+ struct tmio_mmc_dma *dma_priv;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+@@ -393,6 +623,11 @@ static int sh_mobile_sdhi_probe(struct p
+ host->card_busy = sh_mobile_sdhi_card_busy;
+ host->start_signal_voltage_switch =
+ sh_mobile_sdhi_start_signal_voltage_switch;
++ host->init_tuning = sh_mobile_sdhi_init_tuning;
++ host->prepare_tuning = sh_mobile_sdhi_prepare_tuning;
++ host->select_tuning = sh_mobile_sdhi_select_tuning;
++ host->check_scc_error = sh_mobile_sdhi_check_scc_error;
++ host->hw_reset = sh_mobile_sdhi_hw_reset;
+ }
+
+ /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
+@@ -433,6 +668,34 @@ static int sh_mobile_sdhi_probe(struct p
+ if (ret < 0)
+ goto efree;
+
++ if (host->mmc->caps & MMC_CAP_UHS_SDR104) {
++ host->mmc->caps |= MMC_CAP_HW_RESET;
++
++ if (of_id && of_id->data) {
++ const struct sh_mobile_sdhi_of_data *of_data;
++ const struct sh_mobile_sdhi_scc *taps;
++ bool hit = false;
++
++ of_data = of_id->data;
++ taps = of_data->taps;
++
++ for (i = 0; i < of_data->taps_num; i++) {
++ if (taps[i].clk_rate == 0 ||
++ taps[i].clk_rate == host->mmc->f_max) {
++ host->scc_tappos = taps->tap;
++ hit = true;
++ break;
++ }
++ }
++
++ if (!hit)
++ dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n");
++
++ priv->scc_ctl = host->ctl + of_data->scc_offset;
++ }
++ }
++
++ i = 0;
+ while (1) {
+ irq = platform_get_irq(pdev, i);
+ if (irq < 0)
diff --git a/patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch b/patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch
new file mode 100644
index 0000000..2f5dff8
--- /dev/null
+++ b/patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch
@@ -0,0 +1,31 @@
+From e94d36ecfe8065f64853889d1815b24c4c1b8f9d Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Sun, 13 Nov 2016 15:29:11 +0100
+Subject: [PATCH 153/299] mmc: tmio: fix wrong bitmask for SDIO irqs
+
+Commit 7729c7a232a953 ("mmc: tmio: Provide separate interrupt handlers")
+refactored the sdio irq handler and wrongly used the mask for SD irqs,
+not for SDIO irqs. This doesn't really matter in practice because both
+values keep the only interrupt we are interested in. But still, this is
+wrong and wants to be fixed.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 0c4bf5beff79fd32c5a3b2b511ed6527861ada18)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc_pio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/tmio_mmc_pio.c
++++ b/drivers/mmc/host/tmio_mmc_pio.c
+@@ -724,7 +724,7 @@ static void tmio_mmc_sdio_irq(int irq, v
+ return;
+
+ status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
+- ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
++ ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
+
+ sdio_status = status & ~TMIO_SDIO_MASK_ALL;
+ if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
diff --git a/patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch b/patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch
new file mode 100644
index 0000000..81e9e43
--- /dev/null
+++ b/patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch
@@ -0,0 +1,26 @@
+From faacc361b7f22d39a8ae29977aff66249d2934f2 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Sun, 13 Nov 2016 15:29:12 +0100
+Subject: [PATCH 154/299] mmc: tmio: remove SDIO from TODO list
+
+We surely have SDIO support by now :)
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit e726e8c959fc735473f248e142de4d4f77ed342b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/tmio_mmc_pio.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/mmc/host/tmio_mmc_pio.c
++++ b/drivers/mmc/host/tmio_mmc_pio.c
+@@ -22,7 +22,6 @@
+ * TODO:
+ * Investigate using a workqueue for PIO transfers
+ * Eliminate FIXMEs
+- * SDIO support
+ * Better Power management
+ * Handle MMC errors better
+ * double buffer support
diff --git a/patches.renesas/0155-mmc-sh_mobile_sdhi-remove-support-for-sh7372.patch b/patches.renesas/0155-mmc-sh_mobile_sdhi-remove-support-for-sh7372.patch
new file mode 100644
index 0000000..c1e8573
--- /dev/null
+++ b/patches.renesas/0155-mmc-sh_mobile_sdhi-remove-support-for-sh7372.patch
@@ -0,0 +1,31 @@
+From 426e5de37b94051c3424db2a74faf2d74f639cc6 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 24 Nov 2016 11:48:54 +0100
+Subject: [PATCH 155/299] mmc: sh_mobile_sdhi: remove support for sh7372
+
+Remove documentation of support for the SH7372 (SH-Mobile AP4) from the MMC
+driver. The driver itself appears to have no SH7372 specific code.
+
+Commit edf4100906044225 ("ARM: shmobile: sh7372 dtsi: Remove Legacy file")
+removes this SoC from the kernel in v4.1.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+(cherry picked from commit 15ae5fcab798e0beb757284c9106f42052ebb16f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
++++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+@@ -11,7 +11,6 @@ optional bindings can be used.
+
+ Required properties:
+ - compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
+- "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
+ "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
+ "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
+ "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
diff --git a/patches.renesas/0156-net-smsc911x-Synchronize-the-runtime-PM-status-durin.patch b/patches.renesas/0156-net-smsc911x-Synchronize-the-runtime-PM-status-durin.patch
new file mode 100644
index 0000000..6b312ff
--- /dev/null
+++ b/patches.renesas/0156-net-smsc911x-Synchronize-the-runtime-PM-status-durin.patch
@@ -0,0 +1,49 @@
+From 484174272eed2d3902dfd218ab529d55189f3369 Mon Sep 17 00:00:00 2001
+From: Ulf Hansson <ulf.hansson@linaro.org>
+Date: Thu, 27 Oct 2016 13:23:54 +0200
+Subject: [PATCH 156/299] net: smsc911x: Synchronize the runtime PM status
+ during system suspend
+
+The smsc911c driver puts its device into low power state when entering
+system suspend. Although it doesn't update the device's runtime PM status
+to RPM_SUSPENDED, which causes problems for a parent device.
+
+In particular, when the runtime PM status of the parent is requested to be
+updated to RPM_SUSPENDED, the runtime PM core prevent this, because it's
+forbidden to runtime suspend a device, which has an active child.
+
+Fix this by updating the runtime PM status of the smsc911x device to
+RPM_SUSPENDED during system suspend. In system resume, let's reverse that
+action by runtime resuming the device and thus also the parent.
+
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 8812872960824681147fad051e6e1406fdfa07f9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/smsc/smsc911x.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/net/ethernet/smsc/smsc911x.c
++++ b/drivers/net/ethernet/smsc/smsc911x.c
+@@ -2591,6 +2591,9 @@ static int smsc911x_suspend(struct devic
+ PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
+ PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
+
++ pm_runtime_disable(dev);
++ pm_runtime_set_suspended(dev);
++
+ return 0;
+ }
+
+@@ -2600,6 +2603,9 @@ static int smsc911x_resume(struct device
+ struct smsc911x_data *pdata = netdev_priv(ndev);
+ unsigned int to = 100;
+
++ pm_runtime_enable(dev);
++ pm_runtime_resume(dev);
++
+ /* Note 3.11 from the datasheet:
+ * "When the LAN9220 is in a power saving state, a write of any
+ * data to the BYTE_TEST register will wake-up the device."
diff --git a/patches.renesas/0157-media-videodev2.h-Add-HSV-formats.patch b/patches.renesas/0157-media-videodev2.h-Add-HSV-formats.patch
new file mode 100644
index 0000000..063fd75
--- /dev/null
+++ b/patches.renesas/0157-media-videodev2.h-Add-HSV-formats.patch
@@ -0,0 +1,45 @@
+From fdec9a137cfcdffccefec32dcb9b7e1ae7565f0e Mon Sep 17 00:00:00 2001
+From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
+Date: Thu, 18 Aug 2016 11:33:27 -0300
+Subject: [PATCH 157/299] [media] videodev2.h Add HSV formats
+
+These formats store the color information of the image
+in a geometrical representation. The colors are mapped into a
+cylinder, where the angle is the HUE, the height is the VALUE
+and the distance to the center is the SATURATION. This is a very
+useful format for image segmentation algorithms.
+
+Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 66b2ab271afc0888b87a44dc946cc68067ba0985)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
+ include/uapi/linux/videodev2.h | 4 ++++
+ 2 files changed, 6 insertions(+)
+
+--- a/drivers/media/v4l2-core/v4l2-ioctl.c
++++ b/drivers/media/v4l2-core/v4l2-ioctl.c
+@@ -1239,6 +1239,8 @@ static void v4l_fill_fmtdesc(struct v4l2
+ case V4L2_PIX_FMT_TM6000: descr = "A/V + VBI Mux Packet"; break;
+ case V4L2_PIX_FMT_CIT_YYVYUY: descr = "GSPCA CIT YYVYUY"; break;
+ case V4L2_PIX_FMT_KONICA420: descr = "GSPCA KONICA420"; break;
++ case V4L2_PIX_FMT_HSV24: descr = "24-bit HSV 8-8-8"; break;
++ case V4L2_PIX_FMT_HSV32: descr = "32-bit XHSV 8-8-8-8"; break;
+ case V4L2_SDR_FMT_CU8: descr = "Complex U8"; break;
+ case V4L2_SDR_FMT_CU16LE: descr = "Complex U16LE"; break;
+ case V4L2_SDR_FMT_CS8: descr = "Complex S8"; break;
+--- a/include/uapi/linux/videodev2.h
++++ b/include/uapi/linux/videodev2.h
+@@ -586,6 +586,10 @@ struct v4l2_pix_format {
+ #define V4L2_PIX_FMT_SRGGB12 v4l2_fourcc('R', 'G', '1', '2') /* 12 RGRG.. GBGB.. */
+ #define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */
+
++/* HSV formats */
++#define V4L2_PIX_FMT_HSV24 v4l2_fourcc('H', 'S', 'V', '3')
++#define V4L2_PIX_FMT_HSV32 v4l2_fourcc('H', 'S', 'V', '4')
++
+ /* compressed formats */
+ #define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */
+ #define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */
diff --git a/patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch b/patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch
new file mode 100644
index 0000000..f29f6dc
--- /dev/null
+++ b/patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch
@@ -0,0 +1,79 @@
+From f4b4deb8ecebeb058629d1c33c0121860002da2a Mon Sep 17 00:00:00 2001
+From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
+Date: Mon, 22 Aug 2016 06:28:07 -0300
+Subject: [PATCH 158/299] [media] videodev2.h Add HSV encoding
+
+Some hardware maps the Hue between 0 and 255 instead of 0-179. Support
+this format with a new field hsv_enc.
+
+Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 8a0d62af93026de424d75906e3651ba653197668)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/uapi/linux/videodev2.h | 32 +++++++++++++++++++++++++++-----
+ 1 file changed, 27 insertions(+), 5 deletions(-)
+
+--- a/include/uapi/linux/videodev2.h
++++ b/include/uapi/linux/videodev2.h
+@@ -335,6 +335,19 @@ enum v4l2_ycbcr_encoding {
+ };
+
+ /*
++ * enum v4l2_hsv_encoding values should not collide with the ones from
++ * enum v4l2_ycbcr_encoding.
++ */
++enum v4l2_hsv_encoding {
++
++ /* Hue mapped to 0 - 179 */
++ V4L2_HSV_ENC_180 = 128,
++
++ /* Hue mapped to 0-255 */
++ V4L2_HSV_ENC_256 = 129,
++};
++
++/*
+ * Determine how YCBCR_ENC_DEFAULT should map to a proper Y'CbCr encoding.
+ * This depends on the colorspace.
+ */
+@@ -362,9 +375,10 @@ enum v4l2_quantization {
+ * This depends on whether the image is RGB or not, the colorspace and the
+ * Y'CbCr encoding.
+ */
+-#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb, colsp, ycbcr_enc) \
+- (((is_rgb) && (colsp) == V4L2_COLORSPACE_BT2020) ? V4L2_QUANTIZATION_LIM_RANGE : \
+- (((is_rgb) || (ycbcr_enc) == V4L2_YCBCR_ENC_XV601 || \
++#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb_or_hsv, colsp, ycbcr_enc) \
++ (((is_rgb_or_hsv) && (colsp) == V4L2_COLORSPACE_BT2020) ? \
++ V4L2_QUANTIZATION_LIM_RANGE : \
++ (((is_rgb_or_hsv) || (ycbcr_enc) == V4L2_YCBCR_ENC_XV601 || \
+ (ycbcr_enc) == V4L2_YCBCR_ENC_XV709 || (colsp) == V4L2_COLORSPACE_JPEG) ? \
+ V4L2_QUANTIZATION_FULL_RANGE : V4L2_QUANTIZATION_LIM_RANGE))
+
+@@ -461,7 +475,12 @@ struct v4l2_pix_format {
+ __u32 colorspace; /* enum v4l2_colorspace */
+ __u32 priv; /* private data, depends on pixelformat */
+ __u32 flags; /* format flags (V4L2_PIX_FMT_FLAG_*) */
+- __u32 ycbcr_enc; /* enum v4l2_ycbcr_encoding */
++ union {
++ /* enum v4l2_ycbcr_encoding */
++ __u32 ycbcr_enc;
++ /* enum v4l2_hsv_encoding */
++ __u32 hsv_enc;
++ };
+ __u32 quantization; /* enum v4l2_quantization */
+ __u32 xfer_func; /* enum v4l2_xfer_func */
+ };
+@@ -2009,7 +2028,10 @@ struct v4l2_pix_format_mplane {
+ struct v4l2_plane_pix_format plane_fmt[VIDEO_MAX_PLANES];
+ __u8 num_planes;
+ __u8 flags;
+- __u8 ycbcr_enc;
++ union {
++ __u8 ycbcr_enc;
++ __u8 hsv_enc;
++ };
+ __u8 quantization;
+ __u8 xfer_func;
+ __u8 reserved[7];
diff --git a/patches.renesas/0159-clk-renesas-r8a7796-Add-SYS-DMAC-clocks.patch b/patches.renesas/0159-clk-renesas-r8a7796-Add-SYS-DMAC-clocks.patch
new file mode 100644
index 0000000..f29bd5f
--- /dev/null
+++ b/patches.renesas/0159-clk-renesas-r8a7796-Add-SYS-DMAC-clocks.patch
@@ -0,0 +1,25 @@
+From 62a1a32bebd9b99c74767f64c3892e9672da0a67 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 14 Sep 2016 18:45:47 +0200
+Subject: [PATCH 159/299] clk: renesas: r8a7796: Add SYS-DMAC clocks
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit cf8fe97cad4a248bc7baaf39ecde2aece72f8618)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -109,6 +109,9 @@ static const struct cpg_core_clk r8a7796
+ };
+
+ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
++ DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3),
++ DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3),
++ DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3),
+ DEF_MOD("cmt3", 300, R8A7796_CLK_R),
+ DEF_MOD("cmt2", 301, R8A7796_CLK_R),
+ DEF_MOD("cmt1", 302, R8A7796_CLK_R),
diff --git a/patches.renesas/0160-clk-renesas-r8a7796-Add-SCIF-clocks.patch b/patches.renesas/0160-clk-renesas-r8a7796-Add-SCIF-clocks.patch
new file mode 100644
index 0000000..de1848a
--- /dev/null
+++ b/patches.renesas/0160-clk-renesas-r8a7796-Add-SCIF-clocks.patch
@@ -0,0 +1,27 @@
+From 54fc2e6bf87f85a7f7f0b87d4f043d78f3a99723 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 14 Sep 2016 18:46:46 +0200
+Subject: [PATCH 160/299] clk: renesas: r8a7796: Add SCIF clocks
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 951456c37df6d778dc0ce42357417cba440cba87)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -109,6 +109,11 @@ static const struct cpg_core_clk r8a7796
+ };
+
+ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
++ DEF_MOD("scif5", 202, R8A7796_CLK_S3D4),
++ DEF_MOD("scif4", 203, R8A7796_CLK_S3D4),
++ DEF_MOD("scif3", 204, R8A7796_CLK_S3D4),
++ DEF_MOD("scif1", 206, R8A7796_CLK_S3D4),
++ DEF_MOD("scif0", 207, R8A7796_CLK_S3D4),
+ DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3),
+ DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3),
+ DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3),
diff --git a/patches.renesas/0161-clk-renesas-r8a7796-Add-HSCIF-clocks.patch b/patches.renesas/0161-clk-renesas-r8a7796-Add-HSCIF-clocks.patch
new file mode 100644
index 0000000..54901ef
--- /dev/null
+++ b/patches.renesas/0161-clk-renesas-r8a7796-Add-HSCIF-clocks.patch
@@ -0,0 +1,27 @@
+From c6d0454594a53c167105b5d5c4ce84288e295701 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 14 Sep 2016 18:47:13 +0200
+Subject: [PATCH 161/299] clk: renesas: r8a7796: Add HSCIF clocks
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 28aa831949d62711a44d97d692811e767a35b59e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -128,6 +128,11 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("sdif0", 314, R8A7796_CLK_SD0),
+ DEF_MOD("rwdt0", 402, R8A7796_CLK_R),
+ DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
++ DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1),
++ DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1),
++ DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1),
++ DEF_MOD("hscif1", 519, R8A7796_CLK_S3D1),
++ DEF_MOD("hscif0", 520, R8A7796_CLK_S3D1),
+ DEF_MOD("thermal", 522, R8A7796_CLK_CP),
+ DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
+ DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0162-clk-renesas-r8a7796-Add-I2C-clocks.patch b/patches.renesas/0162-clk-renesas-r8a7796-Add-I2C-clocks.patch
new file mode 100644
index 0000000..5ddbd8b
--- /dev/null
+++ b/patches.renesas/0162-clk-renesas-r8a7796-Add-I2C-clocks.patch
@@ -0,0 +1,29 @@
+From 2db9e0de365e2d7949b041cb633a78e49b155db2 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Wed, 14 Sep 2016 18:46:07 +0200
+Subject: [PATCH 162/299] clk: renesas: r8a7796: Add I2C clocks
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 878f8baa02d4948637c1e0b41a6055b22eb1f4a5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -143,6 +143,13 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("gpio2", 910, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio1", 911, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio0", 912, R8A7796_CLK_S3D4),
++ DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6),
++ DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6),
++ DEF_MOD("i2c4", 927, R8A7796_CLK_S0D6),
++ DEF_MOD("i2c3", 928, R8A7796_CLK_S0D6),
++ DEF_MOD("i2c2", 929, R8A7796_CLK_S3D2),
++ DEF_MOD("i2c1", 930, R8A7796_CLK_S3D2),
++ DEF_MOD("i2c0", 931, R8A7796_CLK_S3D2),
+ };
+
+ static const unsigned int r8a7796_crit_mod_clks[] __initconst = {
diff --git a/patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch b/patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch
new file mode 100644
index 0000000..91aa0e0
--- /dev/null
+++ b/patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch
@@ -0,0 +1,53 @@
+From e4829ec6f2ecae63102355e3e599ee298aa9a126 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 21 Sep 2016 16:31:41 +0200
+Subject: [PATCH 163/299] clk: renesas: cpg-mssr: Always use readl()/writel()
+
+The Renesas CPG/MSSR driver core uses a mix of clk_readl()/clk_writel()
+and readl()/writel() to access the clock registers. Settle on the
+generic readl()/writel().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Stephen Boyd <sboyd@codeaurora.org>
+(cherry picked from commit c1b5371b72644907a9b81a7cd8eabb32f04466d1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/renesas-cpg-mssr.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -146,12 +146,12 @@ static int cpg_mstp_clock_endisable(stru
+ enable ? "ON" : "OFF");
+ spin_lock_irqsave(&priv->mstp_lock, flags);
+
+- value = clk_readl(priv->base + SMSTPCR(reg));
++ value = readl(priv->base + SMSTPCR(reg));
+ if (enable)
+ value &= ~bitmask;
+ else
+ value |= bitmask;
+- clk_writel(value, priv->base + SMSTPCR(reg));
++ writel(value, priv->base + SMSTPCR(reg));
+
+ spin_unlock_irqrestore(&priv->mstp_lock, flags);
+
+@@ -159,8 +159,7 @@ static int cpg_mstp_clock_endisable(stru
+ return 0;
+
+ for (i = 1000; i > 0; --i) {
+- if (!(clk_readl(priv->base + MSTPSR(reg)) &
+- bitmask))
++ if (!(readl(priv->base + MSTPSR(reg)) & bitmask))
+ break;
+ cpu_relax();
+ }
+@@ -190,7 +189,7 @@ static int cpg_mstp_clock_is_enabled(str
+ struct cpg_mssr_priv *priv = clock->priv;
+ u32 value;
+
+- value = clk_readl(priv->base + MSTPSR(clock->index / 32));
++ value = readl(priv->base + MSTPSR(clock->index / 32));
+
+ return !(value & BIT(clock->index % 32));
+ }
diff --git a/patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch b/patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch
new file mode 100644
index 0000000..76c9584
--- /dev/null
+++ b/patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch
@@ -0,0 +1,77 @@
+From 194219eba1439136d38bcf96becef558576125d7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 21 Sep 2016 16:47:59 +0200
+Subject: [PATCH 164/299] clk: renesas: rcar-gen3-cpg: Always use
+ readl()/writel()
+
+The R-Car Gen3 CPG/MSSR driver uses a mix of clk_readl()/clk_writel()
+and readl()/writel() to access the clock registers. Settle on the
+generic readl()/writel().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Stephen Boyd <sboyd@codeaurora.org>
+(cherry picked from commit 30ad3cf00e94f4a77775d851de15549099f0224e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/rcar-gen3-cpg.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/clk/renesas/rcar-gen3-cpg.c
++++ b/drivers/clk/renesas/rcar-gen3-cpg.c
+@@ -98,7 +98,7 @@ static int cpg_sd_clock_enable(struct cl
+ u32 val, sd_fc;
+ unsigned int i;
+
+- val = clk_readl(clock->reg);
++ val = readl(clock->reg);
+
+ sd_fc = val & CPG_SD_FC_MASK;
+ for (i = 0; i < clock->div_num; i++)
+@@ -111,7 +111,7 @@ static int cpg_sd_clock_enable(struct cl
+ val &= ~(CPG_SD_STP_MASK);
+ val |= clock->div_table[i].val & CPG_SD_STP_MASK;
+
+- clk_writel(val, clock->reg);
++ writel(val, clock->reg);
+
+ return 0;
+ }
+@@ -120,14 +120,14 @@ static void cpg_sd_clock_disable(struct
+ {
+ struct sd_clock *clock = to_sd_clock(hw);
+
+- clk_writel(clk_readl(clock->reg) | CPG_SD_STP_MASK, clock->reg);
++ writel(readl(clock->reg) | CPG_SD_STP_MASK, clock->reg);
+ }
+
+ static int cpg_sd_clock_is_enabled(struct clk_hw *hw)
+ {
+ struct sd_clock *clock = to_sd_clock(hw);
+
+- return !(clk_readl(clock->reg) & CPG_SD_STP_MASK);
++ return !(readl(clock->reg) & CPG_SD_STP_MASK);
+ }
+
+ static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw,
+@@ -138,7 +138,7 @@ static unsigned long cpg_sd_clock_recalc
+ u32 val, sd_fc;
+ unsigned int i;
+
+- val = clk_readl(clock->reg);
++ val = readl(clock->reg);
+
+ sd_fc = val & CPG_SD_FC_MASK;
+ for (i = 0; i < clock->div_num; i++)
+@@ -189,10 +189,10 @@ static int cpg_sd_clock_set_rate(struct
+ if (i >= clock->div_num)
+ return -EINVAL;
+
+- val = clk_readl(clock->reg);
++ val = readl(clock->reg);
+ val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK);
+ val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK);
+- clk_writel(val, clock->reg);
++ writel(val, clock->reg);
+
+ return 0;
+ }
diff --git a/patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch b/patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch
new file mode 100644
index 0000000..1057807
--- /dev/null
+++ b/patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch
@@ -0,0 +1,33 @@
+From fca995a2d51a8a0ad429ebea49c8ea2995fe9309 Mon Sep 17 00:00:00 2001
+From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Date: Thu, 13 Oct 2016 10:31:48 +0100
+Subject: [PATCH 165/299] clk: renesas: r8a7796: Add DRIF clock
+
+This patch adds DRIF module clocks for r8a7796 SoC.
+
+Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
+Acked-by: Stephen Boyd <sboyd@codeaurora.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit cf31bc71c0f8cdf9c6529ff49b4928ea27b652e2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -128,6 +128,14 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("sdif0", 314, R8A7796_CLK_SD0),
+ DEF_MOD("rwdt0", 402, R8A7796_CLK_R),
+ DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
++ DEF_MOD("drif7", 508, R8A7796_CLK_S3D2),
++ DEF_MOD("drif6", 509, R8A7796_CLK_S3D2),
++ DEF_MOD("drif5", 510, R8A7796_CLK_S3D2),
++ DEF_MOD("drif4", 511, R8A7796_CLK_S3D2),
++ DEF_MOD("drif3", 512, R8A7796_CLK_S3D2),
++ DEF_MOD("drif2", 513, R8A7796_CLK_S3D2),
++ DEF_MOD("drif1", 514, R8A7796_CLK_S3D2),
++ DEF_MOD("drif0", 515, R8A7796_CLK_S3D2),
+ DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1),
diff --git a/patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch b/patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch
new file mode 100644
index 0000000..1d22367
--- /dev/null
+++ b/patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch
@@ -0,0 +1,33 @@
+From 6b8b12288c12ecc30c3d4cd7a6ef61d2a245665e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 18 Oct 2016 15:59:13 +0200
+Subject: [PATCH 166/299] clk: renesas: cpg-mssr: Remove bogus commas from
+ error messages
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 1b9fe7030cfdd081fc4ae1d3db4ccb1ba6d09dfd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/renesas-cpg-mssr.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -308,7 +308,7 @@ static void __init cpg_mssr_register_cor
+ return;
+
+ fail:
+- dev_err(dev, "Failed to register %s clock %s: %ld\n", "core,",
++ dev_err(dev, "Failed to register %s clock %s: %ld\n", "core",
+ core->name, PTR_ERR(clk));
+ }
+
+@@ -376,7 +376,7 @@ static void __init cpg_mssr_register_mod
+ return;
+
+ fail:
+- dev_err(dev, "Failed to register %s clock %s: %ld\n", "module,",
++ dev_err(dev, "Failed to register %s clock %s: %ld\n", "module",
+ mod->name, PTR_ERR(clk));
+ kfree(clock);
+ }
diff --git a/patches.renesas/0167-clk-renesas-r8a7796-Add-FCP-clocks.patch b/patches.renesas/0167-clk-renesas-r8a7796-Add-FCP-clocks.patch
new file mode 100644
index 0000000..93f1331
--- /dev/null
+++ b/patches.renesas/0167-clk-renesas-r8a7796-Add-FCP-clocks.patch
@@ -0,0 +1,30 @@
+From 5ddba901cd6b3183589ba210fee0bef970bfbadd Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 22 Oct 2016 14:29:04 +0300
+Subject: [PATCH 167/299] clk: renesas: r8a7796: Add FCP clocks
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit f4407a6e26b1abf9a1e168fa893783f999112df2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -142,6 +142,14 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("hscif1", 519, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif0", 520, R8A7796_CLK_S3D1),
+ DEF_MOD("thermal", 522, R8A7796_CLK_CP),
++ DEF_MOD("fcpvd2", 601, R8A7796_CLK_S0D2),
++ DEF_MOD("fcpvd1", 602, R8A7796_CLK_S0D2),
++ DEF_MOD("fcpvd0", 603, R8A7796_CLK_S0D2),
++ DEF_MOD("fcpvb0", 607, R8A7796_CLK_S0D1),
++ DEF_MOD("fcpvi0", 611, R8A7796_CLK_S0D1),
++ DEF_MOD("fcpf0", 615, R8A7796_CLK_S0D1),
++ DEF_MOD("fcpci0", 617, R8A7796_CLK_S0D2),
++ DEF_MOD("fcpcs", 619, R8A7796_CLK_S0D2),
+ DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
+ DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0168-clk-renesas-r8a7796-Add-VSP-clocks.patch b/patches.renesas/0168-clk-renesas-r8a7796-Add-VSP-clocks.patch
new file mode 100644
index 0000000..5f55580
--- /dev/null
+++ b/patches.renesas/0168-clk-renesas-r8a7796-Add-VSP-clocks.patch
@@ -0,0 +1,27 @@
+From 4fe34cb66543480fb2c72d3ab1d7e3c4d0557521 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 22 Oct 2016 14:29:05 +0300
+Subject: [PATCH 168/299] clk: renesas: r8a7796: Add VSP clocks
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 88ddc1f8e3674f0b71016f5461868f14a02281a2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -150,6 +150,11 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("fcpf0", 615, R8A7796_CLK_S0D1),
+ DEF_MOD("fcpci0", 617, R8A7796_CLK_S0D2),
+ DEF_MOD("fcpcs", 619, R8A7796_CLK_S0D2),
++ DEF_MOD("vspd2", 621, R8A7796_CLK_S0D2),
++ DEF_MOD("vspd1", 622, R8A7796_CLK_S0D2),
++ DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2),
++ DEF_MOD("vspb", 626, R8A7796_CLK_S0D1),
++ DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1),
+ DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
+ DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0169-clk-renesas-r8a7796-Add-DU-and-LVDS-clocks.patch b/patches.renesas/0169-clk-renesas-r8a7796-Add-DU-and-LVDS-clocks.patch
new file mode 100644
index 0000000..5a08ddd
--- /dev/null
+++ b/patches.renesas/0169-clk-renesas-r8a7796-Add-DU-and-LVDS-clocks.patch
@@ -0,0 +1,26 @@
+From c3b3138fb1f824695a509e55ce467907d4436d54 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Sat, 22 Oct 2016 14:29:06 +0300
+Subject: [PATCH 169/299] clk: renesas: r8a7796: Add DU and LVDS clocks
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit dbdcc4f996df280eb2758095b4774ea62da8a2a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -155,6 +155,10 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2),
+ DEF_MOD("vspb", 626, R8A7796_CLK_S0D1),
+ DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1),
++ DEF_MOD("du2", 722, R8A7796_CLK_S2D1),
++ DEF_MOD("du1", 723, R8A7796_CLK_S2D1),
++ DEF_MOD("du0", 724, R8A7796_CLK_S2D1),
++ DEF_MOD("lvds", 727, R8A7796_CLK_S2D1),
+ DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
+ DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch b/patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch
new file mode 100644
index 0000000..1961a46
--- /dev/null
+++ b/patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch
@@ -0,0 +1,29 @@
+From a591b23beeb4ba7a3fba9213ad0c2bd8eaf1b5f3 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 13:46:16 +0200
+Subject: [PATCH 170/299] ARM: dts: r8a7778: Add device node for RESET/WDT
+ module
+
+Add a device node for the RESET/WDT module, which provides a.o. reset
+control, mode pin monitoring, and watchdog control.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit e2eb35e03af7c884bf4373802a28a59aa63070b8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -626,4 +626,9 @@
+ "sru-src6", "sru-src7", "sru-src8";
+ };
+ };
++
++ rst: reset-controller@ffcc0000 {
++ compatible = "renesas,r8a7778-reset-wdt";
++ reg = <0xffcc0000 0x40>;
++ };
+ };
diff --git a/patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch b/patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch
new file mode 100644
index 0000000..31d7569
--- /dev/null
+++ b/patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch
@@ -0,0 +1,31 @@
+From 39ca823cfc8748d8dc57837eaa15ac1c004fe35d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 13:47:30 +0200
+Subject: [PATCH 171/299] ARM: dts: r8a7779: Add device node for RESET/WDT
+ module
+
+Add a device node for the RESET/WDT module, which provides a.o. reset
+control, mode pin monitoring, and watchdog control.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit ad40150ab896455efa3677ebb9b469801c3f7214)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -590,6 +590,11 @@
+ };
+ };
+
++ rst: reset-controller@ffcc0000 {
++ compatible = "renesas,r8a7779-reset-wdt";
++ reg = <0xffcc0000 0x48>;
++ };
++
+ sysc: system-controller@ffd85000 {
+ compatible = "renesas,r8a7779-sysc";
+ reg = <0xffd85000 0x0200>;
diff --git a/patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch b/patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch
new file mode 100644
index 0000000..9c6faeb
--- /dev/null
+++ b/patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch
@@ -0,0 +1,30 @@
+From 0a949e95ebefcb823cda0237ba36983b963cacd6 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 12 Jun 2015 10:08:25 +0200
+Subject: [PATCH 172/299] ARM: dts: r8a7790: Add device node for RST module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit dd2b267bae0461e08a76fb6f6b27664cfa5b9520)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -1471,6 +1471,11 @@
+ };
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7790-rst";
++ reg = <0 0xe6160000 0 0x0100>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7790-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch b/patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch
new file mode 100644
index 0000000..5194067
--- /dev/null
+++ b/patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch
@@ -0,0 +1,30 @@
+From b888e08400a0cd2c8c1e0383a7b551b729961081 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 12 Jun 2015 10:08:25 +0200
+Subject: [PATCH 173/299] ARM: dts: r8a7791: Add device node for RST module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 1fd27b80b60d5fabe22abdcb464968c37ea3a366)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -1482,6 +1482,11 @@
+ };
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7791-rst";
++ reg = <0 0xe6160000 0 0x0100>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7791-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch b/patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch
new file mode 100644
index 0000000..c2a856a
--- /dev/null
+++ b/patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch
@@ -0,0 +1,29 @@
+From e4adeb2842bb45b2abc55033162d423fcdd93a35 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 12:13:33 +0200
+Subject: [PATCH 174/299] ARM: dts: r8a7792: Add device node for RST module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit d6f78ec4521bc195b76ff7a54f19a712ba6ecdbc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -118,6 +118,11 @@
+ IRQ_TYPE_LEVEL_LOW)>;
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7792-rst";
++ reg = <0 0xe6160000 0 0x0100>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7792-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch b/patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch
new file mode 100644
index 0000000..a29692a
--- /dev/null
+++ b/patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch
@@ -0,0 +1,30 @@
+From 9455f64c5870d25105ed624454077065636ceb4d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 12 Jun 2015 10:08:25 +0200
+Subject: [PATCH 175/299] ARM: dts: r8a7793: Add device node for RST module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit eb2d2723d51ed29f706c5a0a2c46ebdbd5baa3bd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -1279,6 +1279,11 @@
+ };
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7793-rst";
++ reg = <0 0xe6160000 0 0x0100>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch b/patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch
new file mode 100644
index 0000000..df58062
--- /dev/null
+++ b/patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch
@@ -0,0 +1,30 @@
+From 668e75a0d70c7bbf5fdd038e8440acfcf6f9b6a2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 12 Jun 2015 10:08:25 +0200
+Subject: [PATCH 176/299] ARM: dts: r8a7794: Add device node for RST module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 46edf183af72fdb64daf81bcee05f091a9255c0c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -1374,6 +1374,11 @@
+ };
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7794-rst";
++ reg = <0 0xe6160000 0 0x0100>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch b/patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch
new file mode 100644
index 0000000..e2352d6
--- /dev/null
+++ b/patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch
@@ -0,0 +1,34 @@
+From 6a333803250cd867d762fd5262f214bd29c5b00f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 1 Sep 2015 16:15:32 +0200
+Subject: [PATCH 177/299] arm64: renesas: r8a7795 dtsi: Add device node for RST
+ module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 6ddbb4cec2f426f92e4b1d764a2a4475d1a49475)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi
+---
+ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+@@ -321,6 +321,11 @@
+ #power-domain-cells = <0>;
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7795-rst";
++ reg = <0 0xe6160000 0 0x0200>;
++ };
++
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
diff --git a/patches.renesas/0178-arm64-renesas-r8a7796-dtsi-Add-device-node-for-RST-m.patch b/patches.renesas/0178-arm64-renesas-r8a7796-dtsi-Add-device-node-for-RST-m.patch
new file mode 100644
index 0000000..d326c6b
--- /dev/null
+++ b/patches.renesas/0178-arm64-renesas-r8a7796-dtsi-Add-device-node-for-RST-m.patch
@@ -0,0 +1,34 @@
+From c4e00c52cc625c2e73ff53a75d2b4c8ba669a864 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 27 May 2016 11:55:26 +0200
+Subject: [PATCH 178/299] arm64: renesas: r8a7796 dtsi: Add device node for RST
+ module
+
+Add a device node for the RST module, which provides a.o. reset control
+and mode pin monitoring.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 65f922c78f9693c037905f00785033aefd97df47)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi
+---
+ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
++++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+@@ -243,6 +243,11 @@
+ #power-domain-cells = <0>;
+ };
+
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7796-rst";
++ reg = <0 0xe6160000 0 0x0200>;
++ };
++
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
diff --git a/patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch b/patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch
new file mode 100644
index 0000000..648decc
--- /dev/null
+++ b/patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch
@@ -0,0 +1,46 @@
+From 446bb1a8245bf113400ab05f3194a196fa1c44a0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 14:46:01 +0200
+Subject: [PATCH 179/299] clk: renesas: r8a7778: Obtain mode pin values using
+ R-Car RST driver
+
+Obtain the values of the mode pins from the R-Car RST driver, which
+relies on the presence in DT of a device node for the RESET/WDT module.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 578d601cbc514b92bc9ed71fd4fb700180275211)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/clk-r8a7778.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/drivers/clk/renesas/clk-r8a7778.c
++++ b/drivers/clk/renesas/clk-r8a7778.c
+@@ -12,6 +12,7 @@
+ #include <linux/clk/renesas.h>
+ #include <linux/of_address.h>
+ #include <linux/slab.h>
++#include <linux/soc/renesas/rcar-rst.h>
+
+ struct r8a7778_cpg {
+ struct clk_onecell_data data;
+@@ -83,6 +84,18 @@ static void __init r8a7778_cpg_clocks_in
+ struct clk **clks;
+ unsigned int i;
+ int num_clks;
++ u32 mode;
++
++ if (rcar_rst_read_mode_pins(&mode))
++ return;
++
++ BUG_ON(!(mode & BIT(19)));
++
++ cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
++ (!!(mode & BIT(12)) << 1) |
++ (!!(mode & BIT(11)));
++ cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
++ (!!(mode & BIT(1)));
+
+ num_clks = of_property_count_strings(np, "clock-output-names");
+ if (num_clks < 0) {
diff --git a/patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch b/patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch
new file mode 100644
index 0000000..bf386b5
--- /dev/null
+++ b/patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch
@@ -0,0 +1,49 @@
+From 4a1792929a210e3f17bf4935e751240286f2dbc0 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 14:49:41 +0200
+Subject: [PATCH 180/299] clk: renesas: r8a7779: Obtain mode pin values from
+ R-Car RST driver
+
+Obtain the values of the mode pins from the R-Car RST driver, which
+relies on the presence in DT of a device node for the RESET/WDT module.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 931db8a0c646e23f0c5a3e2175742997d7e60ff5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/clk-r8a7779.c | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+--- a/drivers/clk/renesas/clk-r8a7779.c
++++ b/drivers/clk/renesas/clk-r8a7779.c
+@@ -18,6 +18,7 @@
+ #include <linux/of_address.h>
+ #include <linux/slab.h>
+ #include <linux/spinlock.h>
++#include <linux/soc/renesas/rcar-rst.h>
+
+ #include <dt-bindings/clock/r8a7779-clock.h>
+
+@@ -127,6 +128,10 @@ static void __init r8a7779_cpg_clocks_in
+ struct clk **clks;
+ unsigned int i, plla_mult;
+ int num_clks;
++ u32 mode;
++
++ if (rcar_rst_read_mode_pins(&mode))
++ return;
+
+ num_clks = of_property_count_strings(np, "clock-output-names");
+ if (num_clks < 0) {
+@@ -148,8 +153,8 @@ static void __init r8a7779_cpg_clocks_in
+ cpg->data.clks = clks;
+ cpg->data.clk_num = num_clks;
+
+- config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(cpg_mode)];
+- plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(cpg_mode)];
++ config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(mode)];
++ plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(mode)];
+
+ for (i = 0; i < num_clks; ++i) {
+ const char *name;
diff --git a/patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch b/patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch
new file mode 100644
index 0000000..8c03176
--- /dev/null
+++ b/patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch
@@ -0,0 +1,68 @@
+From 512b2778e9d7c63e74c17073b11a1beb905e0a8f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Jul 2015 14:57:37 +0200
+Subject: [PATCH 181/299] clk: renesas: rcar-gen2: Obtain mode pin values using
+ RST driver
+
+Obtain the values of the mode pins from the R-Car RST driver, which
+relies on the presence in DT of a device node for the RST module.
+
+Fall back to our own private copy of rcar_gen2_read_mode_pins() for
+backward-compatibility with old DTs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit f84c9c3ca9770bd847cb361d67bd385499a20d37)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/clk-rcar-gen2.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+--- a/drivers/clk/renesas/clk-rcar-gen2.c
++++ b/drivers/clk/renesas/clk-rcar-gen2.c
+@@ -19,6 +19,7 @@
+ #include <linux/of_address.h>
+ #include <linux/slab.h>
+ #include <linux/spinlock.h>
++#include <linux/soc/renesas/rcar-rst.h>
+
+ struct rcar_gen2_cpg {
+ struct clk_onecell_data data;
+@@ -364,6 +365,23 @@ rcar_gen2_cpg_register_clock(struct devi
+ 4, 0, table, &cpg->lock);
+ }
+
++/*
++ * Reset register definitions.
++ */
++#define MODEMR 0xe6160060
++
++static u32 __init rcar_gen2_read_mode_pins(void)
++{
++ void __iomem *modemr = ioremap_nocache(MODEMR, 4);
++ u32 mode;
++
++ BUG_ON(!modemr);
++ mode = ioread32(modemr);
++ iounmap(modemr);
++
++ return mode;
++}
++
+ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
+ {
+ const struct cpg_pll_config *config;
+@@ -372,6 +390,13 @@ static void __init rcar_gen2_cpg_clocks_
+ unsigned int i;
+ int num_clks;
+
++ if (rcar_rst_read_mode_pins(&cpg_mode)) {
++ /* Backward-compatibility with old DT */
++ pr_warn("%s: failed to obtain mode pins from RST\n",
++ np->full_name);
++ cpg_mode = rcar_gen2_read_mode_pins();
++ }
++
+ num_clks = of_property_count_strings(np, "clock-output-names");
+ if (num_clks < 0) {
+ pr_err("%s: failed to count clocks\n", __func__);
diff --git a/patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch b/patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch
new file mode 100644
index 0000000..e94df25
--- /dev/null
+++ b/patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch
@@ -0,0 +1,42 @@
+From a0ed88e4737b4e0c8f11accc016cc584891b48e8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 14:54:10 +0200
+Subject: [PATCH 182/299] clk: renesas: r8a7795: Obtain mode pin values from
+ R-Car RST driver
+
+Obtain the values of the mode pins from the R-Car RST driver, which
+relies on the presence in DT of a device node for the RST module.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit 969921e0d2b5a582aa6a28cb2208273a2d5679d6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7795-cpg-mssr.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
+@@ -15,6 +15,7 @@
+ #include <linux/device.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
++#include <linux/soc/renesas/rcar-rst.h>
+
+ #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
+
+@@ -311,7 +312,12 @@ static const struct rcar_gen3_cpg_pll_co
+ static int __init r8a7795_cpg_mssr_init(struct device *dev)
+ {
+ const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
+- u32 cpg_mode = rcar_gen3_read_mode_pins();
++ u32 cpg_mode;
++ int error;
++
++ error = rcar_rst_read_mode_pins(&cpg_mode);
++ if (error)
++ return error;
+
+ cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
+ if (!cpg_pll_config->extal_div) {
diff --git a/patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch b/patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch
new file mode 100644
index 0000000..115e404
--- /dev/null
+++ b/patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch
@@ -0,0 +1,42 @@
+From 62204c330441c2c2a03803d1ee24f6ff5214093a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 14:54:45 +0200
+Subject: [PATCH 183/299] clk: renesas: r8a7796: Obtain mode pin values from
+ R-Car RST driver
+
+Obtain the values of the mode pins from the R-Car RST driver, which
+relies on the presence in DT of a device node for the RST module.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit 05972d48d23927e9d4932a10c8c172ccee4b1a6d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -16,6 +16,7 @@
+ #include <linux/device.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
++#include <linux/soc/renesas/rcar-rst.h>
+
+ #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
+
+@@ -235,7 +236,12 @@ static const struct rcar_gen3_cpg_pll_co
+ static int __init r8a7796_cpg_mssr_init(struct device *dev)
+ {
+ const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
+- u32 cpg_mode = rcar_gen3_read_mode_pins();
++ u32 cpg_mode;
++ int error;
++
++ error = rcar_rst_read_mode_pins(&cpg_mode);
++ if (error)
++ return error;
+
+ cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
+ if (!cpg_pll_config->extal_div) {
diff --git a/patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch b/patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch
new file mode 100644
index 0000000..d8923ef
--- /dev/null
+++ b/patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch
@@ -0,0 +1,55 @@
+From 8ab3b44a26ce41c6643a996ecf0defa18265fcbf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 14:56:58 +0200
+Subject: [PATCH 184/299] clk: renesas: rcar-gen3-cpg: Remove obsolete
+ rcar_gen3_read_mode_pins()
+
+All R-Car Gen3 clock drivers now obtain the values of the mode pins from
+the R-Car RST driver.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+(cherry picked from commit ddab5aed8ecd277bd34b6421736c882fdff2dfe1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/rcar-gen3-cpg.c | 17 -----------------
+ drivers/clk/renesas/rcar-gen3-cpg.h | 1 -
+ 2 files changed, 18 deletions(-)
+
+--- a/drivers/clk/renesas/rcar-gen3-cpg.c
++++ b/drivers/clk/renesas/rcar-gen3-cpg.c
+@@ -333,23 +333,6 @@ struct clk * __init rcar_gen3_cpg_clk_re
+ __clk_get_name(parent), 0, mult, div);
+ }
+
+-/*
+- * Reset register definitions.
+- */
+-#define MODEMR 0xe6160060
+-
+-u32 __init rcar_gen3_read_mode_pins(void)
+-{
+- void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+- u32 mode;
+-
+- BUG_ON(!modemr);
+- mode = ioread32(modemr);
+- iounmap(modemr);
+-
+- return mode;
+-}
+-
+ int __init rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
+ unsigned int clk_extalr)
+ {
+--- a/drivers/clk/renesas/rcar-gen3-cpg.h
++++ b/drivers/clk/renesas/rcar-gen3-cpg.h
+@@ -33,7 +33,6 @@ struct rcar_gen3_cpg_pll_config {
+
+ #define CPG_RCKCR 0x240
+
+-u32 rcar_gen3_read_mode_pins(void);
+ struct clk *rcar_gen3_cpg_clk_register(struct device *dev,
+ const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
+ struct clk **clks, void __iomem *base);
diff --git a/patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch b/patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch
new file mode 100644
index 0000000..c26a17f
--- /dev/null
+++ b/patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch
@@ -0,0 +1,54 @@
+From f3d9f59577c32d68f1e14a940d0f0c44f1193dea Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 15:16:57 +0200
+Subject: [PATCH 185/299] ARM: shmobile: r8a7778: Stop passing mode pins state
+ to clock driver
+
+Now the R-Car M1A CPG clock driver obtains the state of the mode pins
+from the R-Car RST driver, there's no longer a need to pass this state
+explicitly. Hence we can just remove the .init_time() callback, the
+generic ARM code will take care of calling of_clk_init().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+---
+ arch/arm/mach-shmobile/setup-r8a7778.c | 15 ---------------
+ 1 file changed, 15 deletions(-)
+
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -15,7 +15,6 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/clk/renesas.h>
+ #include <linux/io.h>
+ #include <linux/irqchip.h>
+
+@@ -23,19 +22,6 @@
+
+ #include "common.h"
+
+-#define MODEMR 0xffcc0020
+-
+-static void __init r8a7778_timer_init(void)
+-{
+- u32 mode;
+- void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+-
+- BUG_ON(!modemr);
+- mode = ioread32(modemr);
+- iounmap(modemr);
+- r8a7778_clocks_init(mode);
+-}
+-
+ #define INT2SMSKCR0 0x82288 /* 0xfe782288 */
+ #define INT2SMSKCR1 0x8228c /* 0xfe78228c */
+
+@@ -70,6 +56,5 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8
+ .init_early = shmobile_init_delay,
+ .init_irq = r8a7778_init_irq_dt,
+ .init_late = shmobile_init_late,
+- .init_time = r8a7778_timer_init,
+ .dt_compat = r8a7778_compat_dt,
+ MACHINE_END
diff --git a/patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch b/patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch
new file mode 100644
index 0000000..5c23211
--- /dev/null
+++ b/patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch
@@ -0,0 +1,68 @@
+From 2ab9aa93b297f0169e20f0940daa444773bf1e9f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 15:21:14 +0200
+Subject: [PATCH 186/299] ARM: shmobile: r8a7779: Stop passing mode pins state
+ to clock driver
+
+Now the R-Car H1 CPG clock driver obtains the state of the mode pins
+from the R-Car RST driver, there's no longer a need to pass this state
+explicitly. Hence we can just remove the .init_time() callback, the
+generic ARM code will take care of calling of_clk_init() and
+clocksource_probe().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+---
+ arch/arm/mach-shmobile/setup-r8a7779.c | 27 ---------------------------
+ 1 file changed, 27 deletions(-)
+
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -14,8 +14,6 @@
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+-#include <linux/clk/renesas.h>
+-#include <linux/clocksource.h>
+ #include <linux/init.h>
+ #include <linux/irq.h>
+ #include <linux/irqchip.h>
+@@ -76,30 +74,6 @@ static void __init r8a7779_init_irq_dt(v
+ __raw_writel(0x003fee3f, INT2SMSKCR4);
+ }
+
+-#define MODEMR 0xffcc0020
+-
+-static u32 __init r8a7779_read_mode_pins(void)
+-{
+- static u32 mode;
+- static bool mode_valid;
+-
+- if (!mode_valid) {
+- void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
+- BUG_ON(!modemr);
+- mode = ioread32(modemr);
+- iounmap(modemr);
+- mode_valid = true;
+- }
+-
+- return mode;
+-}
+-
+-static void __init r8a7779_init_time(void)
+-{
+- r8a7779_clocks_init(r8a7779_read_mode_pins());
+- clocksource_probe();
+-}
+-
+ static const char *const r8a7779_compat_dt[] __initconst = {
+ "renesas,r8a7779",
+ NULL,
+@@ -109,7 +83,6 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8
+ .smp = smp_ops(r8a7779_smp_ops),
+ .map_io = r8a7779_map_io,
+ .init_early = shmobile_init_delay,
+- .init_time = r8a7779_init_time,
+ .init_irq = r8a7779_init_irq_dt,
+ .init_late = shmobile_init_late,
+ .dt_compat = r8a7779_compat_dt,
diff --git a/patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch b/patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch
new file mode 100644
index 0000000..deda7cf
--- /dev/null
+++ b/patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch
@@ -0,0 +1,44 @@
+From 9feeaae4570f5f6f7d07504e5f5218d3e5a9f8ed Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 7 Jul 2015 15:06:34 +0200
+Subject: [PATCH 187/299] ARM: shmobile: rcar-gen2: Stop passing mode pins
+ state to clock driver
+
+Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
+from the R-Car RST driver, there's no longer a need to pass this state
+explicitly. Hence we can just call of_clk_init() instead.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+---
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -15,7 +15,7 @@
+ * GNU General Public License for more details.
+ */
+
+-#include <linux/clk/renesas.h>
++#include <linux/clk-provider.h>
+ #include <linux/clocksource.h>
+ #include <linux/device.h>
+ #include <linux/dma-contiguous.h>
+@@ -71,7 +71,6 @@ static unsigned int __init get_extal_fre
+
+ void __init rcar_gen2_timer_init(void)
+ {
+- u32 mode = rcar_gen2_read_mode_pins();
+ #ifdef CONFIG_ARM_ARCH_TIMER
+ void __iomem *base;
+ u32 freq;
+@@ -130,7 +129,7 @@ void __init rcar_gen2_timer_init(void)
+ iounmap(base);
+ #endif /* CONFIG_ARM_ARCH_TIMER */
+
+- rcar_gen2_clocks_init(mode);
++ of_clk_init(NULL);
+ clocksource_probe();
+ }
+
diff --git a/patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch b/patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch
new file mode 100644
index 0000000..669c03d
--- /dev/null
+++ b/patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch
@@ -0,0 +1,46 @@
+From 9c55b3a32282448976d2d4fe9d6646a48493ff68 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 15:23:22 +0200
+Subject: [PATCH 188/299] clk: renesas: r8a7778: Remove obsolete
+ r8a7778_clocks_init()
+
+The R-Car M1A board code no longer calls r8a7778_clocks_init().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 7978a78c828ac8d5351b85480e60ada865b9bea9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/clk-r8a7778.c | 13 -------------
+ include/linux/clk/renesas.h | 1 -
+ 2 files changed, 14 deletions(-)
+
+--- a/drivers/clk/renesas/clk-r8a7778.c
++++ b/drivers/clk/renesas/clk-r8a7778.c
+@@ -143,16 +143,3 @@ static void __init r8a7778_cpg_clocks_in
+
+ CLK_OF_DECLARE(r8a7778_cpg_clks, "renesas,r8a7778-cpg-clocks",
+ r8a7778_cpg_clocks_init);
+-
+-void __init r8a7778_clocks_init(u32 mode)
+-{
+- BUG_ON(!(mode & BIT(19)));
+-
+- cpg_mode_rates = (!!(mode & BIT(18)) << 2) |
+- (!!(mode & BIT(12)) << 1) |
+- (!!(mode & BIT(11)));
+- cpg_mode_divs = (!!(mode & BIT(2)) << 1) |
+- (!!(mode & BIT(1)));
+-
+- of_clk_init(NULL);
+-}
+--- a/include/linux/clk/renesas.h
++++ b/include/linux/clk/renesas.h
+@@ -20,7 +20,6 @@ struct device;
+ struct device_node;
+ struct generic_pm_domain;
+
+-void r8a7778_clocks_init(u32 mode);
+ void r8a7779_clocks_init(u32 mode);
+ void rcar_gen2_clocks_init(u32 mode);
+
diff --git a/patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch b/patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch
new file mode 100644
index 0000000..a94e1fe
--- /dev/null
+++ b/patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch
@@ -0,0 +1,49 @@
+From 29c85b15a5af33890e689a6d9741c61e7350a884 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 15:24:58 +0200
+Subject: [PATCH 189/299] clk: renesas: r8a7779: Remove obsolete
+ r8a7779_clocks_init()
+
+The R-Car H1 board code no longer calls r8a7779_clocks_init().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit b9fe9421d06653d735df07954730795d907e618d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/clk-r8a7779.c | 9 ---------
+ include/linux/clk/renesas.h | 1 -
+ 2 files changed, 10 deletions(-)
+
+--- a/drivers/clk/renesas/clk-r8a7779.c
++++ b/drivers/clk/renesas/clk-r8a7779.c
+@@ -89,8 +89,6 @@ static const unsigned int cpg_plla_mult[
+ * Initialization
+ */
+
+-static u32 cpg_mode __initdata;
+-
+ static struct clk * __init
+ r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg,
+ const struct cpg_clk_config *config,
+@@ -178,10 +176,3 @@ static void __init r8a7779_cpg_clocks_in
+ }
+ CLK_OF_DECLARE(r8a7779_cpg_clks, "renesas,r8a7779-cpg-clocks",
+ r8a7779_cpg_clocks_init);
+-
+-void __init r8a7779_clocks_init(u32 mode)
+-{
+- cpg_mode = mode;
+-
+- of_clk_init(NULL);
+-}
+--- a/include/linux/clk/renesas.h
++++ b/include/linux/clk/renesas.h
+@@ -20,7 +20,6 @@ struct device;
+ struct device_node;
+ struct generic_pm_domain;
+
+-void r8a7779_clocks_init(u32 mode);
+ void rcar_gen2_clocks_init(u32 mode);
+
+ void cpg_mstp_add_clk_domain(struct device_node *np);
diff --git a/patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch b/patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch
new file mode 100644
index 0000000..d66eb18
--- /dev/null
+++ b/patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch
@@ -0,0 +1,41 @@
+From 676e95e2afe018f63924b13475a333c5ecbf8cfb Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 1 Jun 2016 15:26:53 +0200
+Subject: [PATCH 190/299] clk: renesas: rcar-gen2: Remove obsolete
+ rcar_gen2_clocks_init()
+
+The R-Car Gen2 board code no longer calls rcar_gen2_clocks_init().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
+(cherry picked from commit 3e91d07bb592895982400002020d510fd7b6e85f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/clk-rcar-gen2.c | 7 -------
+ include/linux/clk/renesas.h | 2 --
+ 2 files changed, 9 deletions(-)
+
+--- a/drivers/clk/renesas/clk-rcar-gen2.c
++++ b/drivers/clk/renesas/clk-rcar-gen2.c
+@@ -445,10 +445,3 @@ static void __init rcar_gen2_cpg_clocks_
+ }
+ CLK_OF_DECLARE(rcar_gen2_cpg_clks, "renesas,rcar-gen2-cpg-clocks",
+ rcar_gen2_cpg_clocks_init);
+-
+-void __init rcar_gen2_clocks_init(u32 mode)
+-{
+- cpg_mode = mode;
+-
+- of_clk_init(NULL);
+-}
+--- a/include/linux/clk/renesas.h
++++ b/include/linux/clk/renesas.h
+@@ -20,8 +20,6 @@ struct device;
+ struct device_node;
+ struct generic_pm_domain;
+
+-void rcar_gen2_clocks_init(u32 mode);
+-
+ void cpg_mstp_add_clk_domain(struct device_node *np);
+ #ifdef CONFIG_CLK_RENESAS_CPG_MSTP
+ int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev);
diff --git a/patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch b/patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch
new file mode 100644
index 0000000..bf1b972
--- /dev/null
+++ b/patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch
@@ -0,0 +1,64 @@
+From 836b7cd3f4fb17f0ccd469a33dc589ef0a7e239d Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 27 Oct 2016 23:23:35 +0300
+Subject: [PATCH 191/299] clk: renesas: Add r8a7743 CPG Core Clock Definitions
+
+Add macros usable by the device tree sources to reference the R8A7743 CPG
+clocks by index. The data comes from Table 7.2b in revision 1.00 of the
+RZ/G Series User's Manual.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 4e195933de4690c503ce4b93cfd0fb0046dd770b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7743-cpg-mssr.h | 43 +++++++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 include/dt-bindings/clock/r8a7743-cpg-mssr.h
+
+--- /dev/null
++++ b/include/dt-bindings/clock/r8a7743-cpg-mssr.h
+@@ -0,0 +1,43 @@
++/*
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#ifndef __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__
++#define __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__
++
++#include <dt-bindings/clock/renesas-cpg-mssr.h>
++
++/* r8a7743 CPG Core Clocks */
++#define R8A7743_CLK_Z 0
++#define R8A7743_CLK_ZG 1
++#define R8A7743_CLK_ZTR 2
++#define R8A7743_CLK_ZTRD2 3
++#define R8A7743_CLK_ZT 4
++#define R8A7743_CLK_ZX 5
++#define R8A7743_CLK_ZS 6
++#define R8A7743_CLK_HP 7
++#define R8A7743_CLK_B 9
++#define R8A7743_CLK_LB 10
++#define R8A7743_CLK_P 11
++#define R8A7743_CLK_CL 12
++#define R8A7743_CLK_M2 13
++#define R8A7743_CLK_ZB3 15
++#define R8A7743_CLK_ZB3D2 16
++#define R8A7743_CLK_DDR 17
++#define R8A7743_CLK_SDH 18
++#define R8A7743_CLK_SD0 19
++#define R8A7743_CLK_SD2 20
++#define R8A7743_CLK_SD3 21
++#define R8A7743_CLK_MMC0 22
++#define R8A7743_CLK_MP 23
++#define R8A7743_CLK_QSPI 26
++#define R8A7743_CLK_CP 27
++#define R8A7743_CLK_RCAN 28
++#define R8A7743_CLK_R 29
++#define R8A7743_CLK_OSC 30
++
++#endif /* __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ */
diff --git a/patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch b/patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch
new file mode 100644
index 0000000..f94c68c
--- /dev/null
+++ b/patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch
@@ -0,0 +1,65 @@
+From a0ab454fc7f3ea08ae2471031895ebb9559322ed Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 27 Oct 2016 23:42:51 +0300
+Subject: [PATCH 192/299] clk: renesas: Add r8a7745 CPG Core Clock Definitions
+
+Add macros usable by the device tree sources to reference the R8A7745
+CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
+the RZ/G Series User's Manual.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 1fa8a875df6b8aa864f6c4f2b65dbc2ed477b859)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7745-cpg-mssr.h | 44 +++++++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+ create mode 100644 include/dt-bindings/clock/r8a7745-cpg-mssr.h
+
+--- /dev/null
++++ b/include/dt-bindings/clock/r8a7745-cpg-mssr.h
+@@ -0,0 +1,44 @@
++/*
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#ifndef __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__
++#define __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__
++
++#include <dt-bindings/clock/renesas-cpg-mssr.h>
++
++/* r8a7745 CPG Core Clocks */
++#define R8A7745_CLK_Z2 0
++#define R8A7745_CLK_ZG 1
++#define R8A7745_CLK_ZTR 2
++#define R8A7745_CLK_ZTRD2 3
++#define R8A7745_CLK_ZT 4
++#define R8A7745_CLK_ZX 5
++#define R8A7745_CLK_ZS 6
++#define R8A7745_CLK_HP 7
++#define R8A7745_CLK_B 9
++#define R8A7745_CLK_LB 10
++#define R8A7745_CLK_P 11
++#define R8A7745_CLK_CL 12
++#define R8A7745_CLK_CP 13
++#define R8A7745_CLK_M2 14
++#define R8A7745_CLK_ZB3 16
++#define R8A7745_CLK_ZB3D2 17
++#define R8A7745_CLK_DDR 18
++#define R8A7745_CLK_SDH 19
++#define R8A7745_CLK_SD0 20
++#define R8A7745_CLK_SD2 21
++#define R8A7745_CLK_SD3 22
++#define R8A7745_CLK_MMC0 23
++#define R8A7745_CLK_MP 24
++#define R8A7745_CLK_QSPI 25
++#define R8A7745_CLK_CPEX 26
++#define R8A7745_CLK_RCAN 27
++#define R8A7745_CLK_R 28
++#define R8A7745_CLK_OSC 29
++
++#endif /* __DT_BINDINGS_CLOCK_R8A7745_CPG_MSSR_H__ */
diff --git a/patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch b/patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch
new file mode 100644
index 0000000..d1330b9
--- /dev/null
+++ b/patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch
@@ -0,0 +1,37 @@
+From 2a6c71b94360555b91405356b306a6c9e4af437e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Tue, 1 Nov 2016 21:12:24 +0100
+Subject: [PATCH 193/299] clk: renesas: r8a7796: Add CSI2 clocks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 5fccac6d945b84e056b8b3b7083a151faaf2492c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -103,6 +103,8 @@ static const struct cpg_core_clk r8a7796
+ DEF_FIXED("cl", R8A7796_CLK_CL, CLK_PLL1_DIV2, 48, 1),
+ DEF_FIXED("cp", R8A7796_CLK_CP, CLK_EXTAL, 2, 1),
+
++ DEF_DIV6P1("csi0", R8A7796_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
++
+ DEF_DIV6_RO("osc", R8A7796_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
+ DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
+
+@@ -156,6 +158,8 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2),
+ DEF_MOD("vspb", 626, R8A7796_CLK_S0D1),
+ DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1),
++ DEF_MOD("csi20", 714, R8A7796_CLK_CSI0),
++ DEF_MOD("csi40", 716, R8A7796_CLK_CSI0),
+ DEF_MOD("du2", 722, R8A7796_CLK_S2D1),
+ DEF_MOD("du1", 723, R8A7796_CLK_S2D1),
+ DEF_MOD("du0", 724, R8A7796_CLK_S2D1),
diff --git a/patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch b/patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch
new file mode 100644
index 0000000..c412520
--- /dev/null
+++ b/patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch
@@ -0,0 +1,34 @@
+From 0c95f679c19c2ac400d8ca2ba7692dca5fe23980 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Tue, 1 Nov 2016 21:12:25 +0100
+Subject: [PATCH 194/299] clk: renesas: r8a7796: Add VIN clocks
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit e6e3558626f6dbc16bc13587a1a981dc2446300e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
+@@ -164,6 +164,14 @@ static const struct mssr_mod_clk r8a7796
+ DEF_MOD("du1", 723, R8A7796_CLK_S2D1),
+ DEF_MOD("du0", 724, R8A7796_CLK_S2D1),
+ DEF_MOD("lvds", 727, R8A7796_CLK_S2D1),
++ DEF_MOD("vin7", 804, R8A7796_CLK_S0D2),
++ DEF_MOD("vin6", 805, R8A7796_CLK_S0D2),
++ DEF_MOD("vin5", 806, R8A7796_CLK_S0D2),
++ DEF_MOD("vin4", 807, R8A7796_CLK_S0D2),
++ DEF_MOD("vin3", 808, R8A7796_CLK_S0D2),
++ DEF_MOD("vin2", 809, R8A7796_CLK_S0D2),
++ DEF_MOD("vin1", 810, R8A7796_CLK_S0D2),
++ DEF_MOD("vin0", 811, R8A7796_CLK_S0D2),
+ DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
+ DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),
diff --git a/patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch b/patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch
new file mode 100644
index 0000000..89cdbf5
--- /dev/null
+++ b/patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch
@@ -0,0 +1,29 @@
+From 03e737c8ed9ca6ea6aa33c165b13bd49991a8e4f Mon Sep 17 00:00:00 2001
+From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Date: Fri, 4 Nov 2016 14:58:07 +0100
+Subject: [PATCH 195/299] clk: renesas: r8a7795: Fix HDMI parent clock
+
+Correct HDMI parent clock so that the rate of the
+HDMI clock is 1/4 rather than 1/2 of the rate of PLL1
+as per the v0.52 (Jun, 15) manual.
+
+Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 0a30284b9fe19780d4587e74578e460469d88706)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/r8a7795-cpg-mssr.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
+@@ -98,7 +98,7 @@ static const struct cpg_core_clk r8a7795
+ DEF_FIXED("cp", R8A7795_CLK_CP, CLK_EXTAL, 2, 1),
+
+ DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014),
+- DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV2, 0x250),
++ DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV4, 0x250),
+ DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
+ DEF_DIV6P1("csi0", R8A7795_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
+
diff --git a/patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch b/patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch
new file mode 100644
index 0000000..507defd
--- /dev/null
+++ b/patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch
@@ -0,0 +1,443 @@
+From 722f1ef07b3eed3cc0519a9928cf463352f861d5 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 9 Nov 2016 00:17:25 +0300
+Subject: [PATCH 196/299] clk: renesas: cpg-mssr: Add common R-Car Gen2 support
+
+Add the common R-Car Gen2 (and RZ/G) Clock Pulse Generator / Module
+Standby and Software Reset support code, using the CPG/MSSR driver
+core.
+
+Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
+Uytterhoeven <geert+renesas@glider.be>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 468389357480f21febb0edfd1482d0fc8f885808)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/renesas/rcar-gen2-cpg.c | 371 ++++++++++++++++++++++++++++++++++++
+ drivers/clk/renesas/rcar-gen2-cpg.h | 43 ++++
+ 2 files changed, 414 insertions(+)
+ create mode 100644 drivers/clk/renesas/rcar-gen2-cpg.c
+ create mode 100644 drivers/clk/renesas/rcar-gen2-cpg.h
+
+--- /dev/null
++++ b/drivers/clk/renesas/rcar-gen2-cpg.c
+@@ -0,0 +1,371 @@
++/*
++ * R-Car Gen2 Clock Pulse Generator
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/bug.h>
++#include <linux/clk.h>
++#include <linux/clk-provider.h>
++#include <linux/device.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/io.h>
++#include <linux/slab.h>
++
++#include "renesas-cpg-mssr.h"
++#include "rcar-gen2-cpg.h"
++
++#define CPG_FRQCRB 0x0004
++#define CPG_FRQCRB_KICK BIT(31)
++#define CPG_SDCKCR 0x0074
++#define CPG_PLL0CR 0x00d8
++#define CPG_PLL0CR_STC_SHIFT 24
++#define CPG_PLL0CR_STC_MASK (0x7f << CPG_PLL0CR_STC_SHIFT)
++#define CPG_FRQCRC 0x00e0
++#define CPG_FRQCRC_ZFC_SHIFT 8
++#define CPG_FRQCRC_ZFC_MASK (0x1f << CPG_FRQCRC_ZFC_SHIFT)
++#define CPG_ADSPCKCR 0x025c
++#define CPG_RCANCKCR 0x0270
++
++static spinlock_t cpg_lock;
++
++/*
++ * Z Clock
++ *
++ * Traits of this clock:
++ * prepare - clk_prepare only ensures that parents are prepared
++ * enable - clk_enable only ensures that parents are enabled
++ * rate - rate is adjustable. clk->rate = parent->rate * mult / 32
++ * parent - fixed parent. No clk_set_parent support
++ */
++
++struct cpg_z_clk {
++ struct clk_hw hw;
++ void __iomem *reg;
++ void __iomem *kick_reg;
++};
++
++#define to_z_clk(_hw) container_of(_hw, struct cpg_z_clk, hw)
++
++static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
++ unsigned long parent_rate)
++{
++ struct cpg_z_clk *zclk = to_z_clk(hw);
++ unsigned int mult;
++ unsigned int val;
++
++ val = (readl(zclk->reg) & CPG_FRQCRC_ZFC_MASK) >> CPG_FRQCRC_ZFC_SHIFT;
++ mult = 32 - val;
++
++ return div_u64((u64)parent_rate * mult, 32);
++}
++
++static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long *parent_rate)
++{
++ unsigned long prate = *parent_rate;
++ unsigned int mult;
++
++ if (!prate)
++ prate = 1;
++
++ mult = div_u64((u64)rate * 32, prate);
++ mult = clamp(mult, 1U, 32U);
++
++ return *parent_rate / 32 * mult;
++}
++
++static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long parent_rate)
++{
++ struct cpg_z_clk *zclk = to_z_clk(hw);
++ unsigned int mult;
++ u32 val, kick;
++ unsigned int i;
++
++ mult = div_u64((u64)rate * 32, parent_rate);
++ mult = clamp(mult, 1U, 32U);
++
++ if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK)
++ return -EBUSY;
++
++ val = readl(zclk->reg);
++ val &= ~CPG_FRQCRC_ZFC_MASK;
++ val |= (32 - mult) << CPG_FRQCRC_ZFC_SHIFT;
++ writel(val, zclk->reg);
++
++ /*
++ * Set KICK bit in FRQCRB to update hardware setting and wait for
++ * clock change completion.
++ */
++ kick = readl(zclk->kick_reg);
++ kick |= CPG_FRQCRB_KICK;
++ writel(kick, zclk->kick_reg);
++
++ /*
++ * Note: There is no HW information about the worst case latency.
++ *
++ * Using experimental measurements, it seems that no more than
++ * ~10 iterations are needed, independently of the CPU rate.
++ * Since this value might be dependent on external xtal rate, pll1
++ * rate or even the other emulation clocks rate, use 1000 as a
++ * "super" safe value.
++ */
++ for (i = 1000; i; i--) {
++ if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK))
++ return 0;
++
++ cpu_relax();
++ }
++
++ return -ETIMEDOUT;
++}
++
++static const struct clk_ops cpg_z_clk_ops = {
++ .recalc_rate = cpg_z_clk_recalc_rate,
++ .round_rate = cpg_z_clk_round_rate,
++ .set_rate = cpg_z_clk_set_rate,
++};
++
++static struct clk * __init cpg_z_clk_register(const char *name,
++ const char *parent_name,
++ void __iomem *base)
++{
++ struct clk_init_data init;
++ struct cpg_z_clk *zclk;
++ struct clk *clk;
++
++ zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
++ if (!zclk)
++ return ERR_PTR(-ENOMEM);
++
++ init.name = name;
++ init.ops = &cpg_z_clk_ops;
++ init.flags = 0;
++ init.parent_names = &parent_name;
++ init.num_parents = 1;
++
++ zclk->reg = base + CPG_FRQCRC;
++ zclk->kick_reg = base + CPG_FRQCRB;
++ zclk->hw.init = &init;
++
++ clk = clk_register(NULL, &zclk->hw);
++ if (IS_ERR(clk))
++ kfree(zclk);
++
++ return clk;
++}
++
++static struct clk * __init cpg_rcan_clk_register(const char *name,
++ const char *parent_name,
++ void __iomem *base)
++{
++ struct clk_fixed_factor *fixed;
++ struct clk_gate *gate;
++ struct clk *clk;
++
++ fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
++ if (!fixed)
++ return ERR_PTR(-ENOMEM);
++
++ fixed->mult = 1;
++ fixed->div = 6;
++
++ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
++ if (!gate) {
++ kfree(fixed);
++ return ERR_PTR(-ENOMEM);
++ }
++
++ gate->reg = base + CPG_RCANCKCR;
++ gate->bit_idx = 8;
++ gate->flags = CLK_GATE_SET_TO_DISABLE;
++ gate->lock = &cpg_lock;
++
++ clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
++ &fixed->hw, &clk_fixed_factor_ops,
++ &gate->hw, &clk_gate_ops, 0);
++ if (IS_ERR(clk)) {
++ kfree(gate);
++ kfree(fixed);
++ }
++
++ return clk;
++}
++
++/* ADSP divisors */
++static const struct clk_div_table cpg_adsp_div_table[] = {
++ { 1, 3 }, { 2, 4 }, { 3, 6 }, { 4, 8 },
++ { 5, 12 }, { 6, 16 }, { 7, 18 }, { 8, 24 },
++ { 10, 36 }, { 11, 48 }, { 0, 0 },
++};
++
++static struct clk * __init cpg_adsp_clk_register(const char *name,
++ const char *parent_name,
++ void __iomem *base)
++{
++ struct clk_divider *div;
++ struct clk_gate *gate;
++ struct clk *clk;
++
++ div = kzalloc(sizeof(*div), GFP_KERNEL);
++ if (!div)
++ return ERR_PTR(-ENOMEM);
++
++ div->reg = base + CPG_ADSPCKCR;
++ div->width = 4;
++ div->table = cpg_adsp_div_table;
++ div->lock = &cpg_lock;
++
++ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
++ if (!gate) {
++ kfree(div);
++ return ERR_PTR(-ENOMEM);
++ }
++
++ gate->reg = base + CPG_ADSPCKCR;
++ gate->bit_idx = 8;
++ gate->flags = CLK_GATE_SET_TO_DISABLE;
++ gate->lock = &cpg_lock;
++
++ clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,
++ &div->hw, &clk_divider_ops,
++ &gate->hw, &clk_gate_ops, 0);
++ if (IS_ERR(clk)) {
++ kfree(gate);
++ kfree(div);
++ }
++
++ return clk;
++}
++
++/* SDHI divisors */
++static const struct clk_div_table cpg_sdh_div_table[] = {
++ { 0, 2 }, { 1, 3 }, { 2, 4 }, { 3, 6 },
++ { 4, 8 }, { 5, 12 }, { 6, 16 }, { 7, 18 },
++ { 8, 24 }, { 10, 36 }, { 11, 48 }, { 0, 0 },
++};
++
++static const struct clk_div_table cpg_sd01_div_table[] = {
++ { 4, 8 }, { 5, 12 }, { 6, 16 }, { 7, 18 },
++ { 8, 24 }, { 10, 36 }, { 11, 48 }, { 12, 10 },
++ { 0, 0 },
++};
++
++static const struct rcar_gen2_cpg_pll_config *cpg_pll_config __initdata;
++static unsigned int cpg_pll0_div __initdata;
++static u32 cpg_mode __initdata;
++
++struct clk * __init rcar_gen2_cpg_clk_register(struct device *dev,
++ const struct cpg_core_clk *core,
++ const struct cpg_mssr_info *info,
++ struct clk **clks,
++ void __iomem *base)
++{
++ const struct clk_div_table *table = NULL;
++ const struct clk *parent;
++ const char *parent_name;
++ unsigned int mult = 1;
++ unsigned int div = 1;
++ unsigned int shift;
++
++ parent = clks[core->parent];
++ if (IS_ERR(parent))
++ return ERR_CAST(parent);
++
++ parent_name = __clk_get_name(parent);
++
++ switch (core->type) {
++ /* R-Car Gen2 */
++ case CLK_TYPE_GEN2_MAIN:
++ div = cpg_pll_config->extal_div;
++ break;
++
++ case CLK_TYPE_GEN2_PLL0:
++ /*
++ * PLL0 is a configurable multiplier clock except on R-Car
++ * V2H/E2. Register the PLL0 clock as a fixed factor clock for
++ * now as there's no generic multiplier clock implementation and
++ * we currently have no need to change the multiplier value.
++ */
++ mult = cpg_pll_config->pll0_mult;
++ div = cpg_pll0_div;
++ if (!mult) {
++ u32 pll0cr = readl(base + CPG_PLL0CR);
++
++ mult = (((pll0cr & CPG_PLL0CR_STC_MASK) >>
++ CPG_PLL0CR_STC_SHIFT) + 1) * 2;
++ }
++ break;
++
++ case CLK_TYPE_GEN2_PLL1:
++ mult = cpg_pll_config->pll1_mult / 2;
++ break;
++
++ case CLK_TYPE_GEN2_PLL3:
++ mult = cpg_pll_config->pll3_mult;
++ break;
++
++ case CLK_TYPE_GEN2_Z:
++ return cpg_z_clk_register(core->name, parent_name, base);
++
++ case CLK_TYPE_GEN2_LB:
++ div = cpg_mode & BIT(18) ? 36 : 24;
++ break;
++
++ case CLK_TYPE_GEN2_ADSP:
++ return cpg_adsp_clk_register(core->name, parent_name, base);
++
++ case CLK_TYPE_GEN2_SDH:
++ table = cpg_sdh_div_table;
++ shift = 8;
++ break;
++
++ case CLK_TYPE_GEN2_SD0:
++ table = cpg_sd01_div_table;
++ shift = 4;
++ break;
++
++ case CLK_TYPE_GEN2_SD1:
++ table = cpg_sd01_div_table;
++ shift = 0;
++ break;
++
++ case CLK_TYPE_GEN2_QSPI:
++ div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2) ?
++ 8 : 10;
++ break;
++
++ case CLK_TYPE_GEN2_RCAN:
++ return cpg_rcan_clk_register(core->name, parent_name, base);
++
++ default:
++ return ERR_PTR(-EINVAL);
++ }
++
++ if (!table)
++ return clk_register_fixed_factor(NULL, core->name, parent_name,
++ 0, mult, div);
++ else
++ return clk_register_divider_table(NULL, core->name,
++ parent_name, 0,
++ base + CPG_SDCKCR, shift, 4,
++ 0, table, &cpg_lock);
++}
++
++int __init rcar_gen2_cpg_init(const struct rcar_gen2_cpg_pll_config *config,
++ unsigned int pll0_div, u32 mode)
++{
++ cpg_pll_config = config;
++ cpg_pll0_div = pll0_div;
++ cpg_mode = mode;
++
++ spin_lock_init(&cpg_lock);
++
++ return 0;
++}
+--- /dev/null
++++ b/drivers/clk/renesas/rcar-gen2-cpg.h
+@@ -0,0 +1,43 @@
++/*
++ * R-Car Gen2 Clock Pulse Generator
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation; version 2 of the License.
++ */
++
++#ifndef __CLK_RENESAS_RCAR_GEN2_CPG_H__
++#define __CLK_RENESAS_RCAR_GEN2_CPG_H__
++
++enum rcar_gen2_clk_types {
++ CLK_TYPE_GEN2_MAIN = CLK_TYPE_CUSTOM,
++ CLK_TYPE_GEN2_PLL0,
++ CLK_TYPE_GEN2_PLL1,
++ CLK_TYPE_GEN2_PLL3,
++ CLK_TYPE_GEN2_Z,
++ CLK_TYPE_GEN2_LB,
++ CLK_TYPE_GEN2_ADSP,
++ CLK_TYPE_GEN2_SDH,
++ CLK_TYPE_GEN2_SD0,
++ CLK_TYPE_GEN2_SD1,
++ CLK_TYPE_GEN2_QSPI,
++ CLK_TYPE_GEN2_RCAN,
++};
++
++struct rcar_gen2_cpg_pll_config {
++ unsigned int extal_div;
++ unsigned int pll1_mult;
++ unsigned int pll3_mult;
++ unsigned int pll0_mult; /* leave as zero if PLL0CR exists */
++};
++
++struct clk *rcar_gen2_cpg_clk_register(struct device *dev,
++ const struct cpg_core_clk *core,
++ const struct cpg_mssr_info *info,
++ struct clk **clks, void __iomem *base);
++int rcar_gen2_cpg_init(const struct rcar_gen2_cpg_pll_config *config,
++ unsigned int pll0_div, u32 mode);
++
++#endif
diff --git a/patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch b/patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch
new file mode 100644
index 0000000..506abe9
--- /dev/null
+++ b/patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch
@@ -0,0 +1,365 @@
+From f4b1e8000040d9bb35ebfdcf4556f7c2d1d3bb4f Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 9 Nov 2016 00:21:50 +0300
+Subject: [PATCH 197/299] clk: renesas: cpg-mssr: Add R8A7743 support
+
+Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software
+Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
+(and RZ/G) code.
+
+Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
+Uytterhoeven <geert+renesas@glider.be>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit c0b2d75d2a4bf6a3f29d13c4bfa2557dfa22828d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 4
+ drivers/clk/renesas/Kconfig | 1
+ drivers/clk/renesas/Makefile | 1
+ drivers/clk/renesas/r8a7743-cpg-mssr.c | 270 +++++++++++
+ drivers/clk/renesas/renesas-cpg-mssr.c | 6
+ drivers/clk/renesas/renesas-cpg-mssr.h | 1
+ 6 files changed, 282 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/clk/renesas/r8a7743-cpg-mssr.c
+
+--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+@@ -13,6 +13,7 @@ They provide the following functionaliti
+
+ Required Properties:
+ - compatible: Must be one of:
++ - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
+ - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
+ - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
+
+@@ -22,8 +23,9 @@ Required Properties:
+ - clocks: References to external parent clocks, one entry for each entry in
+ clock-names
+ - clock-names: List of external parent clock names. Valid names are:
+- - "extal" (r8a7795, r8a7796)
++ - "extal" (r8a7743, r8a7795, r8a7796)
+ - "extalr" (r8a7795, r8a7796)
++ - "usb_extal" (r8a7743)
+
+ - #clock-cells: Must be 2
+ - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
+--- a/drivers/clk/renesas/Kconfig
++++ b/drivers/clk/renesas/Kconfig
+@@ -1,5 +1,6 @@
+ config CLK_RENESAS_CPG_MSSR
+ bool
++ default y if ARCH_R8A7743
+ default y if ARCH_R8A7795
+ default y if ARCH_R8A7796
+
+--- a/drivers/clk/renesas/Makefile
++++ b/drivers/clk/renesas/Makefile
+@@ -2,6 +2,7 @@ obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o
+ obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
+ obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o clk-div6.o
+ obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o clk-div6.o
++obj-$(CONFIG_ARCH_R8A7743) += r8a7743-cpg-mssr.o rcar-gen2-cpg.o
+ obj-$(CONFIG_ARCH_R8A7778) += clk-r8a7778.o
+ obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o clk-div6.o
+--- /dev/null
++++ b/drivers/clk/renesas/r8a7743-cpg-mssr.c
+@@ -0,0 +1,270 @@
++/*
++ * r8a7743 Clock Pulse Generator / Module Standby and Software Reset
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation; of the License.
++ */
++
++#include <linux/device.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/soc/renesas/rcar-rst.h>
++
++#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
++
++#include "renesas-cpg-mssr.h"
++#include "rcar-gen2-cpg.h"
++
++enum clk_ids {
++ /* Core Clock Outputs exported to DT */
++ LAST_DT_CORE_CLK = R8A7743_CLK_OSC,
++
++ /* External Input Clocks */
++ CLK_EXTAL,
++ CLK_USB_EXTAL,
++
++ /* Internal Core Clocks */
++ CLK_MAIN,
++ CLK_PLL0,
++ CLK_PLL1,
++ CLK_PLL3,
++ CLK_PLL1_DIV2,
++
++ /* Module Clocks */
++ MOD_CLK_BASE
++};
++
++static const struct cpg_core_clk r8a7743_core_clks[] __initconst = {
++ /* External Clock Inputs */
++ DEF_INPUT("extal", CLK_EXTAL),
++ DEF_INPUT("usb_extal", CLK_USB_EXTAL),
++
++ /* Internal Core Clocks */
++ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN2_MAIN, CLK_EXTAL),
++ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN2_PLL0, CLK_MAIN),
++ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
++ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN2_PLL3, CLK_MAIN),
++
++ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
++
++ /* Core Clock Outputs */
++ DEF_BASE("z", R8A7743_CLK_Z, CLK_TYPE_GEN2_Z, CLK_PLL0),
++ DEF_BASE("lb", R8A7743_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
++ DEF_BASE("sdh", R8A7743_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
++ DEF_BASE("sd0", R8A7743_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
++ DEF_BASE("qspi", R8A7743_CLK_QSPI, CLK_TYPE_GEN2_QSPI, CLK_PLL1_DIV2),
++ DEF_BASE("rcan", R8A7743_CLK_RCAN, CLK_TYPE_GEN2_RCAN, CLK_USB_EXTAL),
++
++ DEF_FIXED("zg", R8A7743_CLK_ZG, CLK_PLL1, 3, 1),
++ DEF_FIXED("zx", R8A7743_CLK_ZX, CLK_PLL1, 3, 1),
++ DEF_FIXED("zs", R8A7743_CLK_ZS, CLK_PLL1, 6, 1),
++ DEF_FIXED("hp", R8A7743_CLK_HP, CLK_PLL1, 12, 1),
++ DEF_FIXED("b", R8A7743_CLK_B, CLK_PLL1, 12, 1),
++ DEF_FIXED("p", R8A7743_CLK_P, CLK_PLL1, 24, 1),
++ DEF_FIXED("cl", R8A7743_CLK_CL, CLK_PLL1, 48, 1),
++ DEF_FIXED("m2", R8A7743_CLK_M2, CLK_PLL1, 8, 1),
++ DEF_FIXED("zb3", R8A7743_CLK_ZB3, CLK_PLL3, 4, 1),
++ DEF_FIXED("zb3d2", R8A7743_CLK_ZB3D2, CLK_PLL3, 8, 1),
++ DEF_FIXED("ddr", R8A7743_CLK_DDR, CLK_PLL3, 8, 1),
++ DEF_FIXED("mp", R8A7743_CLK_MP, CLK_PLL1_DIV2, 15, 1),
++ DEF_FIXED("cp", R8A7743_CLK_CP, CLK_EXTAL, 2, 1),
++ DEF_FIXED("r", R8A7743_CLK_R, CLK_PLL1, 49152, 1),
++ DEF_FIXED("osc", R8A7743_CLK_OSC, CLK_PLL1, 12288, 1),
++
++ DEF_DIV6P1("sd2", R8A7743_CLK_SD2, CLK_PLL1_DIV2, 0x078),
++ DEF_DIV6P1("sd3", R8A7743_CLK_SD3, CLK_PLL1_DIV2, 0x26c),
++ DEF_DIV6P1("mmc0", R8A7743_CLK_MMC0, CLK_PLL1_DIV2, 0x240),
++};
++
++static const struct mssr_mod_clk r8a7743_mod_clks[] __initconst = {
++ DEF_MOD("msiof0", 0, R8A7743_CLK_MP),
++ DEF_MOD("vcp0", 101, R8A7743_CLK_ZS),
++ DEF_MOD("vpc0", 103, R8A7743_CLK_ZS),
++ DEF_MOD("tmu1", 111, R8A7743_CLK_P),
++ DEF_MOD("3dg", 112, R8A7743_CLK_ZG),
++ DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS),
++ DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
++ DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
++ DEF_MOD("tmu3", 121, R8A7743_CLK_P),
++ DEF_MOD("tmu2", 122, R8A7743_CLK_P),
++ DEF_MOD("cmt0", 124, R8A7743_CLK_R),
++ DEF_MOD("tmu0", 125, R8A7743_CLK_CP),
++ DEF_MOD("vsp1du1", 127, R8A7743_CLK_ZS),
++ DEF_MOD("vsp1du0", 128, R8A7743_CLK_ZS),
++ DEF_MOD("vsp1-sy", 131, R8A7743_CLK_ZS),
++ DEF_MOD("scifa2", 202, R8A7743_CLK_MP),
++ DEF_MOD("scifa1", 203, R8A7743_CLK_MP),
++ DEF_MOD("scifa0", 204, R8A7743_CLK_MP),
++ DEF_MOD("msiof2", 205, R8A7743_CLK_MP),
++ DEF_MOD("scifb0", 206, R8A7743_CLK_MP),
++ DEF_MOD("scifb1", 207, R8A7743_CLK_MP),
++ DEF_MOD("msiof1", 208, R8A7743_CLK_MP),
++ DEF_MOD("scifb2", 216, R8A7743_CLK_MP),
++ DEF_MOD("sys-dmac1", 218, R8A7743_CLK_ZS),
++ DEF_MOD("sys-dmac0", 219, R8A7743_CLK_ZS),
++ DEF_MOD("tpu0", 304, R8A7743_CLK_CP),
++ DEF_MOD("sdhi3", 311, R8A7743_CLK_SD3),
++ DEF_MOD("sdhi2", 312, R8A7743_CLK_SD2),
++ DEF_MOD("sdhi0", 314, R8A7743_CLK_SD0),
++ DEF_MOD("mmcif0", 315, R8A7743_CLK_MMC0),
++ DEF_MOD("iic0", 318, R8A7743_CLK_HP),
++ DEF_MOD("pciec", 319, R8A7743_CLK_MP),
++ DEF_MOD("iic1", 323, R8A7743_CLK_HP),
++ DEF_MOD("usb3.0", 328, R8A7743_CLK_MP),
++ DEF_MOD("cmt1", 329, R8A7743_CLK_R),
++ DEF_MOD("usbhs-dmac0", 330, R8A7743_CLK_HP),
++ DEF_MOD("usbhs-dmac1", 331, R8A7743_CLK_HP),
++ DEF_MOD("irqc", 407, R8A7743_CLK_CP),
++ DEF_MOD("intc-sys", 408, R8A7743_CLK_ZS),
++ DEF_MOD("audio-dmac1", 501, R8A7743_CLK_HP),
++ DEF_MOD("audio-dmac0", 502, R8A7743_CLK_HP),
++ DEF_MOD("thermal", 522, CLK_EXTAL),
++ DEF_MOD("pwm", 523, R8A7743_CLK_P),
++ DEF_MOD("usb-ehci", 703, R8A7743_CLK_MP),
++ DEF_MOD("usbhs", 704, R8A7743_CLK_HP),
++ DEF_MOD("hscif2", 713, R8A7743_CLK_ZS),
++ DEF_MOD("scif5", 714, R8A7743_CLK_P),
++ DEF_MOD("scif4", 715, R8A7743_CLK_P),
++ DEF_MOD("hscif1", 716, R8A7743_CLK_ZS),
++ DEF_MOD("hscif0", 717, R8A7743_CLK_ZS),
++ DEF_MOD("scif3", 718, R8A7743_CLK_P),
++ DEF_MOD("scif2", 719, R8A7743_CLK_P),
++ DEF_MOD("scif1", 720, R8A7743_CLK_P),
++ DEF_MOD("scif0", 721, R8A7743_CLK_P),
++ DEF_MOD("du1", 723, R8A7743_CLK_ZX),
++ DEF_MOD("du0", 724, R8A7743_CLK_ZX),
++ DEF_MOD("lvds0", 726, R8A7743_CLK_ZX),
++ DEF_MOD("ipmmu-sgx", 800, R8A7743_CLK_ZX),
++ DEF_MOD("vin2", 809, R8A7743_CLK_ZG),
++ DEF_MOD("vin1", 810, R8A7743_CLK_ZG),
++ DEF_MOD("vin0", 811, R8A7743_CLK_ZG),
++ DEF_MOD("etheravb", 812, R8A7743_CLK_HP),
++ DEF_MOD("ether", 813, R8A7743_CLK_P),
++ DEF_MOD("sata1", 814, R8A7743_CLK_ZS),
++ DEF_MOD("sata0", 815, R8A7743_CLK_ZS),
++ DEF_MOD("gpio7", 904, R8A7743_CLK_CP),
++ DEF_MOD("gpio6", 905, R8A7743_CLK_CP),
++ DEF_MOD("gpio5", 907, R8A7743_CLK_CP),
++ DEF_MOD("gpio4", 908, R8A7743_CLK_CP),
++ DEF_MOD("gpio3", 909, R8A7743_CLK_CP),
++ DEF_MOD("gpio2", 910, R8A7743_CLK_CP),
++ DEF_MOD("gpio1", 911, R8A7743_CLK_CP),
++ DEF_MOD("gpio0", 912, R8A7743_CLK_CP),
++ DEF_MOD("can1", 915, R8A7743_CLK_P),
++ DEF_MOD("can0", 916, R8A7743_CLK_P),
++ DEF_MOD("qspi_mod", 917, R8A7743_CLK_QSPI),
++ DEF_MOD("i2c5", 925, R8A7743_CLK_HP),
++ DEF_MOD("iicdvfs", 926, R8A7743_CLK_CP),
++ DEF_MOD("i2c4", 927, R8A7743_CLK_HP),
++ DEF_MOD("i2c3", 928, R8A7743_CLK_HP),
++ DEF_MOD("i2c2", 929, R8A7743_CLK_HP),
++ DEF_MOD("i2c1", 930, R8A7743_CLK_HP),
++ DEF_MOD("i2c0", 931, R8A7743_CLK_HP),
++ DEF_MOD("ssi-all", 1005, R8A7743_CLK_P),
++ DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
++ DEF_MOD("scu-all", 1017, R8A7743_CLK_P),
++ DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
++ DEF_MOD("scifa3", 1106, R8A7743_CLK_MP),
++ DEF_MOD("scifa4", 1107, R8A7743_CLK_MP),
++ DEF_MOD("scifa5", 1108, R8A7743_CLK_MP),
++};
++
++static const unsigned int r8a7743_crit_mod_clks[] __initconst = {
++ MOD_CLK_ID(408), /* INTC-SYS (GIC) */
++};
++
++/*
++ * CPG Clock Data
++ */
++
++/*
++ * MD EXTAL PLL0 PLL1 PLL3
++ * 14 13 19 (MHz) *1 *1
++ *---------------------------------------------------
++ * 0 0 0 15 x172/2 x208/2 x106
++ * 0 0 1 15 x172/2 x208/2 x88
++ * 0 1 0 20 x130/2 x156/2 x80
++ * 0 1 1 20 x130/2 x156/2 x66
++ * 1 0 0 26 / 2 x200/2 x240/2 x122
++ * 1 0 1 26 / 2 x200/2 x240/2 x102
++ * 1 1 0 30 / 2 x172/2 x208/2 x106
++ * 1 1 1 30 / 2 x172/2 x208/2 x88
++ *
++ * *1 : Table 7.5a indicates VCO output (PLLx = VCO/2)
++ */
++#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \
++ (((md) & BIT(13)) >> 12) | \
++ (((md) & BIT(19)) >> 19))
++
++static const struct rcar_gen2_cpg_pll_config cpg_pll_configs[8] __initconst = {
++ /* EXTAL div PLL1 mult PLL3 mult */
++ { 1, 208, 106, },
++ { 1, 208, 88, },
++ { 1, 156, 80, },
++ { 1, 156, 66, },
++ { 2, 240, 122, },
++ { 2, 240, 102, },
++ { 2, 208, 106, },
++ { 2, 208, 88, },
++};
++
++static int __init r8a7743_cpg_mssr_init(struct device *dev)
++{
++ const struct rcar_gen2_cpg_pll_config *cpg_pll_config;
++ u32 cpg_mode;
++ int error;
++
++ error = rcar_rst_read_mode_pins(&cpg_mode);
++ if (error)
++ return error;
++
++ cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
++
++ return rcar_gen2_cpg_init(cpg_pll_config, 2, cpg_mode);
++}
++
++const struct cpg_mssr_info r8a7743_cpg_mssr_info __initconst = {
++ /* Core Clocks */
++ .core_clks = r8a7743_core_clks,
++ .num_core_clks = ARRAY_SIZE(r8a7743_core_clks),
++ .last_dt_core_clk = LAST_DT_CORE_CLK,
++ .num_total_core_clks = MOD_CLK_BASE,
++
++ /* Module Clocks */
++ .mod_clks = r8a7743_mod_clks,
++ .num_mod_clks = ARRAY_SIZE(r8a7743_mod_clks),
++ .num_hw_mod_clks = 12 * 32,
++
++ /* Critical Module Clocks */
++ .crit_mod_clks = r8a7743_crit_mod_clks,
++ .num_crit_mod_clks = ARRAY_SIZE(r8a7743_crit_mod_clks),
++
++ /* Callbacks */
++ .init = r8a7743_cpg_mssr_init,
++ .cpg_clk_register = rcar_gen2_cpg_clk_register,
++};
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -502,6 +502,12 @@ static int __init cpg_mssr_add_clk_domai
+ }
+
+ static const struct of_device_id cpg_mssr_match[] = {
++#ifdef CONFIG_ARCH_R8A7743
++ {
++ .compatible = "renesas,r8a7743-cpg-mssr",
++ .data = &r8a7743_cpg_mssr_info,
++ },
++#endif
+ #ifdef CONFIG_ARCH_R8A7795
+ {
+ .compatible = "renesas,r8a7795-cpg-mssr",
+--- a/drivers/clk/renesas/renesas-cpg-mssr.h
++++ b/drivers/clk/renesas/renesas-cpg-mssr.h
+@@ -130,6 +130,7 @@ struct cpg_mssr_info {
+ struct clk **clks, void __iomem *base);
+ };
+
++extern const struct cpg_mssr_info r8a7743_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
+ #endif
diff --git a/patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch b/patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch
new file mode 100644
index 0000000..440e796
--- /dev/null
+++ b/patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch
@@ -0,0 +1,356 @@
+From 0c784f4afe506226423a481da2768ad4e1b28e33 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 9 Nov 2016 00:25:08 +0300
+Subject: [PATCH 198/299] clk: renesas: cpg-mssr: Add R8A7745 support
+
+Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software
+Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
+(and RZ/G) code.
+
+Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
+Uytterhoeven <geert+renesas@glider.be>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 9127d54bb89471592b3c8af6c6273c21db6de6a6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 5
+ drivers/clk/renesas/Kconfig | 1
+ drivers/clk/renesas/Makefile | 1
+ drivers/clk/renesas/r8a7745-cpg-mssr.c | 259 +++++++++++
+ drivers/clk/renesas/renesas-cpg-mssr.c | 6
+ drivers/clk/renesas/renesas-cpg-mssr.h | 1
+ 6 files changed, 271 insertions(+), 2 deletions(-)
+ create mode 100644 drivers/clk/renesas/r8a7745-cpg-mssr.c
+
+--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+@@ -14,6 +14,7 @@ They provide the following functionaliti
+ Required Properties:
+ - compatible: Must be one of:
+ - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
++ - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)
+ - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
+ - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
+
+@@ -23,9 +24,9 @@ Required Properties:
+ - clocks: References to external parent clocks, one entry for each entry in
+ clock-names
+ - clock-names: List of external parent clock names. Valid names are:
+- - "extal" (r8a7743, r8a7795, r8a7796)
++ - "extal" (r8a7743, r8a7745, r8a7795, r8a7796)
+ - "extalr" (r8a7795, r8a7796)
+- - "usb_extal" (r8a7743)
++ - "usb_extal" (r8a7743, r8a7745)
+
+ - #clock-cells: Must be 2
+ - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
+--- a/drivers/clk/renesas/Kconfig
++++ b/drivers/clk/renesas/Kconfig
+@@ -1,6 +1,7 @@
+ config CLK_RENESAS_CPG_MSSR
+ bool
+ default y if ARCH_R8A7743
++ default y if ARCH_R8A7745
+ default y if ARCH_R8A7795
+ default y if ARCH_R8A7796
+
+--- a/drivers/clk/renesas/Makefile
++++ b/drivers/clk/renesas/Makefile
+@@ -3,6 +3,7 @@ obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
+ obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o clk-div6.o
+ obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o clk-div6.o
+ obj-$(CONFIG_ARCH_R8A7743) += r8a7743-cpg-mssr.o rcar-gen2-cpg.o
++obj-$(CONFIG_ARCH_R8A7745) += r8a7745-cpg-mssr.o rcar-gen2-cpg.o
+ obj-$(CONFIG_ARCH_R8A7778) += clk-r8a7778.o
+ obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o clk-div6.o
+--- /dev/null
++++ b/drivers/clk/renesas/r8a7745-cpg-mssr.c
+@@ -0,0 +1,259 @@
++/*
++ * r8a7745 Clock Pulse Generator / Module Standby and Software Reset
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation; of the License.
++ */
++
++#include <linux/device.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/soc/renesas/rcar-rst.h>
++
++#include <dt-bindings/clock/r8a7745-cpg-mssr.h>
++
++#include "renesas-cpg-mssr.h"
++#include "rcar-gen2-cpg.h"
++
++enum clk_ids {
++ /* Core Clock Outputs exported to DT */
++ LAST_DT_CORE_CLK = R8A7745_CLK_OSC,
++
++ /* External Input Clocks */
++ CLK_EXTAL,
++ CLK_USB_EXTAL,
++
++ /* Internal Core Clocks */
++ CLK_MAIN,
++ CLK_PLL0,
++ CLK_PLL1,
++ CLK_PLL3,
++ CLK_PLL1_DIV2,
++
++ /* Module Clocks */
++ MOD_CLK_BASE
++};
++
++static const struct cpg_core_clk r8a7745_core_clks[] __initconst = {
++ /* External Clock Inputs */
++ DEF_INPUT("extal", CLK_EXTAL),
++ DEF_INPUT("usb_extal", CLK_USB_EXTAL),
++
++ /* Internal Core Clocks */
++ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN2_MAIN, CLK_EXTAL),
++ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN2_PLL0, CLK_MAIN),
++ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
++ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN2_PLL3, CLK_MAIN),
++
++ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
++
++ /* Core Clock Outputs */
++ DEF_BASE("lb", R8A7745_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
++ DEF_BASE("sdh", R8A7745_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
++ DEF_BASE("sd0", R8A7745_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
++ DEF_BASE("qspi", R8A7745_CLK_QSPI, CLK_TYPE_GEN2_QSPI, CLK_PLL1_DIV2),
++ DEF_BASE("rcan", R8A7745_CLK_RCAN, CLK_TYPE_GEN2_RCAN, CLK_USB_EXTAL),
++
++ DEF_FIXED("z2", R8A7745_CLK_Z2, CLK_PLL0, 1, 1),
++ DEF_FIXED("zg", R8A7745_CLK_ZG, CLK_PLL1, 6, 1),
++ DEF_FIXED("zx", R8A7745_CLK_ZX, CLK_PLL1, 3, 1),
++ DEF_FIXED("zs", R8A7745_CLK_ZS, CLK_PLL1, 6, 1),
++ DEF_FIXED("hp", R8A7745_CLK_HP, CLK_PLL1, 12, 1),
++ DEF_FIXED("b", R8A7745_CLK_B, CLK_PLL1, 12, 1),
++ DEF_FIXED("p", R8A7745_CLK_P, CLK_PLL1, 24, 1),
++ DEF_FIXED("cl", R8A7745_CLK_CL, CLK_PLL1, 48, 1),
++ DEF_FIXED("cp", R8A7745_CLK_CP, CLK_PLL1, 48, 1),
++ DEF_FIXED("m2", R8A7745_CLK_M2, CLK_PLL1, 8, 1),
++ DEF_FIXED("zb3", R8A7745_CLK_ZB3, CLK_PLL3, 4, 1),
++ DEF_FIXED("zb3d2", R8A7745_CLK_ZB3D2, CLK_PLL3, 8, 1),
++ DEF_FIXED("ddr", R8A7745_CLK_DDR, CLK_PLL3, 8, 1),
++ DEF_FIXED("mp", R8A7745_CLK_MP, CLK_PLL1_DIV2, 15, 1),
++ DEF_FIXED("cpex", R8A7745_CLK_CPEX, CLK_EXTAL, 2, 1),
++ DEF_FIXED("r", R8A7745_CLK_R, CLK_PLL1, 49152, 1),
++ DEF_FIXED("osc", R8A7745_CLK_OSC, CLK_PLL1, 12288, 1),
++
++ DEF_DIV6P1("sd2", R8A7745_CLK_SD2, CLK_PLL1_DIV2, 0x078),
++ DEF_DIV6P1("sd3", R8A7745_CLK_SD3, CLK_PLL1_DIV2, 0x26c),
++ DEF_DIV6P1("mmc0", R8A7745_CLK_MMC0, CLK_PLL1_DIV2, 0x240),
++};
++
++static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = {
++ DEF_MOD("msiof0", 0, R8A7745_CLK_MP),
++ DEF_MOD("vcp0", 101, R8A7745_CLK_ZS),
++ DEF_MOD("vpc0", 103, R8A7745_CLK_ZS),
++ DEF_MOD("tmu1", 111, R8A7745_CLK_P),
++ DEF_MOD("3dg", 112, R8A7745_CLK_ZG),
++ DEF_MOD("2d-dmac", 115, R8A7745_CLK_ZS),
++ DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS),
++ DEF_MOD("tmu3", 121, R8A7745_CLK_P),
++ DEF_MOD("tmu2", 122, R8A7745_CLK_P),
++ DEF_MOD("cmt0", 124, R8A7745_CLK_R),
++ DEF_MOD("tmu0", 125, R8A7745_CLK_CP),
++ DEF_MOD("vsp1du0", 128, R8A7745_CLK_ZS),
++ DEF_MOD("vsp1-sy", 131, R8A7745_CLK_ZS),
++ DEF_MOD("scifa2", 202, R8A7745_CLK_MP),
++ DEF_MOD("scifa1", 203, R8A7745_CLK_MP),
++ DEF_MOD("scifa0", 204, R8A7745_CLK_MP),
++ DEF_MOD("msiof2", 205, R8A7745_CLK_MP),
++ DEF_MOD("scifb0", 206, R8A7745_CLK_MP),
++ DEF_MOD("scifb1", 207, R8A7745_CLK_MP),
++ DEF_MOD("msiof1", 208, R8A7745_CLK_MP),
++ DEF_MOD("scifb2", 216, R8A7745_CLK_MP),
++ DEF_MOD("sys-dmac1", 218, R8A7745_CLK_ZS),
++ DEF_MOD("sys-dmac0", 219, R8A7745_CLK_ZS),
++ DEF_MOD("tpu0", 304, R8A7745_CLK_CP),
++ DEF_MOD("sdhi3", 311, R8A7745_CLK_SD3),
++ DEF_MOD("sdhi2", 312, R8A7745_CLK_SD2),
++ DEF_MOD("sdhi0", 314, R8A7745_CLK_SD0),
++ DEF_MOD("mmcif0", 315, R8A7745_CLK_MMC0),
++ DEF_MOD("iic0", 318, R8A7745_CLK_HP),
++ DEF_MOD("iic1", 323, R8A7745_CLK_HP),
++ DEF_MOD("cmt1", 329, R8A7745_CLK_R),
++ DEF_MOD("usbhs-dmac0", 330, R8A7745_CLK_HP),
++ DEF_MOD("usbhs-dmac1", 331, R8A7745_CLK_HP),
++ DEF_MOD("irqc", 407, R8A7745_CLK_CP),
++ DEF_MOD("intc-sys", 408, R8A7745_CLK_ZS),
++ DEF_MOD("audio-dmac0", 502, R8A7745_CLK_HP),
++ DEF_MOD("pwm", 523, R8A7745_CLK_P),
++ DEF_MOD("usb-ehci", 703, R8A7745_CLK_MP),
++ DEF_MOD("usbhs", 704, R8A7745_CLK_HP),
++ DEF_MOD("hscif2", 713, R8A7745_CLK_ZS),
++ DEF_MOD("scif5", 714, R8A7745_CLK_P),
++ DEF_MOD("scif4", 715, R8A7745_CLK_P),
++ DEF_MOD("hscif1", 716, R8A7745_CLK_ZS),
++ DEF_MOD("hscif0", 717, R8A7745_CLK_ZS),
++ DEF_MOD("scif3", 718, R8A7745_CLK_P),
++ DEF_MOD("scif2", 719, R8A7745_CLK_P),
++ DEF_MOD("scif1", 720, R8A7745_CLK_P),
++ DEF_MOD("scif0", 721, R8A7745_CLK_P),
++ DEF_MOD("du0", 724, R8A7745_CLK_ZX),
++ DEF_MOD("ipmmu-sgx", 800, R8A7745_CLK_ZX),
++ DEF_MOD("vin1", 810, R8A7745_CLK_ZG),
++ DEF_MOD("vin0", 811, R8A7745_CLK_ZG),
++ DEF_MOD("etheravb", 812, R8A7745_CLK_HP),
++ DEF_MOD("ether", 813, R8A7745_CLK_P),
++ DEF_MOD("gpio6", 905, R8A7745_CLK_CP),
++ DEF_MOD("gpio5", 907, R8A7745_CLK_CP),
++ DEF_MOD("gpio4", 908, R8A7745_CLK_CP),
++ DEF_MOD("gpio3", 909, R8A7745_CLK_CP),
++ DEF_MOD("gpio2", 910, R8A7745_CLK_CP),
++ DEF_MOD("gpio1", 911, R8A7745_CLK_CP),
++ DEF_MOD("gpio0", 912, R8A7745_CLK_CP),
++ DEF_MOD("can1", 915, R8A7745_CLK_P),
++ DEF_MOD("can0", 916, R8A7745_CLK_P),
++ DEF_MOD("qspi_mod", 917, R8A7745_CLK_QSPI),
++ DEF_MOD("i2c5", 925, R8A7745_CLK_HP),
++ DEF_MOD("i2c4", 927, R8A7745_CLK_HP),
++ DEF_MOD("i2c3", 928, R8A7745_CLK_HP),
++ DEF_MOD("i2c2", 929, R8A7745_CLK_HP),
++ DEF_MOD("i2c1", 930, R8A7745_CLK_HP),
++ DEF_MOD("i2c0", 931, R8A7745_CLK_HP),
++ DEF_MOD("ssi-all", 1005, R8A7745_CLK_P),
++ DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
++ DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
++ DEF_MOD("scu-all", 1017, R8A7745_CLK_P),
++ DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
++ DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
++ DEF_MOD("scifa3", 1106, R8A7745_CLK_MP),
++ DEF_MOD("scifa4", 1107, R8A7745_CLK_MP),
++ DEF_MOD("scifa5", 1108, R8A7745_CLK_MP),
++};
++
++static const unsigned int r8a7745_crit_mod_clks[] __initconst = {
++ MOD_CLK_ID(408), /* INTC-SYS (GIC) */
++};
++
++/*
++ * CPG Clock Data
++ */
++
++/*
++ * MD EXTAL PLL0 PLL1 PLL3
++ * 14 13 19 (MHz) *1 *2
++ *---------------------------------------------------
++ * 0 0 0 15 x200/3 x208/2 x106
++ * 0 0 1 15 x200/3 x208/2 x88
++ * 0 1 0 20 x150/3 x156/2 x80
++ * 0 1 1 20 x150/3 x156/2 x66
++ * 1 0 0 26 / 2 x230/3 x240/2 x122
++ * 1 0 1 26 / 2 x230/3 x240/2 x102
++ * 1 1 0 30 / 2 x200/3 x208/2 x106
++ * 1 1 1 30 / 2 x200/3 x208/2 x88
++ *
++ * *1 : Table 7.5b indicates VCO output (PLL0 = VCO/3)
++ * *2 : Table 7.5b indicates VCO output (PLL1 = VCO/2)
++ */
++#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \
++ (((md) & BIT(13)) >> 12) | \
++ (((md) & BIT(19)) >> 19))
++
++static const struct rcar_gen2_cpg_pll_config cpg_pll_configs[8] __initconst = {
++ /* EXTAL div PLL1 mult PLL3 mult PLL0 mult */
++ { 1, 208, 106, 200 },
++ { 1, 208, 88, 200 },
++ { 1, 156, 80, 150 },
++ { 1, 156, 66, 150 },
++ { 2, 240, 122, 230 },
++ { 2, 240, 102, 230 },
++ { 2, 208, 106, 200 },
++ { 2, 208, 88, 200 },
++};
++
++static int __init r8a7745_cpg_mssr_init(struct device *dev)
++{
++ const struct rcar_gen2_cpg_pll_config *cpg_pll_config;
++ u32 cpg_mode;
++ int error;
++
++ error = rcar_rst_read_mode_pins(&cpg_mode);
++ if (error)
++ return error;
++
++ cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
++
++ return rcar_gen2_cpg_init(cpg_pll_config, 3, cpg_mode);
++}
++
++const struct cpg_mssr_info r8a7745_cpg_mssr_info __initconst = {
++ /* Core Clocks */
++ .core_clks = r8a7745_core_clks,
++ .num_core_clks = ARRAY_SIZE(r8a7745_core_clks),
++ .last_dt_core_clk = LAST_DT_CORE_CLK,
++ .num_total_core_clks = MOD_CLK_BASE,
++
++ /* Module Clocks */
++ .mod_clks = r8a7745_mod_clks,
++ .num_mod_clks = ARRAY_SIZE(r8a7745_mod_clks),
++ .num_hw_mod_clks = 12 * 32,
++
++ /* Critical Module Clocks */
++ .crit_mod_clks = r8a7745_crit_mod_clks,
++ .num_crit_mod_clks = ARRAY_SIZE(r8a7745_crit_mod_clks),
++
++ /* Callbacks */
++ .init = r8a7745_cpg_mssr_init,
++ .cpg_clk_register = rcar_gen2_cpg_clk_register,
++};
+--- a/drivers/clk/renesas/renesas-cpg-mssr.c
++++ b/drivers/clk/renesas/renesas-cpg-mssr.c
+@@ -508,6 +508,12 @@ static const struct of_device_id cpg_mss
+ .data = &r8a7743_cpg_mssr_info,
+ },
+ #endif
++#ifdef CONFIG_ARCH_R8A7745
++ {
++ .compatible = "renesas,r8a7745-cpg-mssr",
++ .data = &r8a7745_cpg_mssr_info,
++ },
++#endif
+ #ifdef CONFIG_ARCH_R8A7795
+ {
+ .compatible = "renesas,r8a7795-cpg-mssr",
+--- a/drivers/clk/renesas/renesas-cpg-mssr.h
++++ b/drivers/clk/renesas/renesas-cpg-mssr.h
+@@ -131,6 +131,7 @@ struct cpg_mssr_info {
+ };
+
+ extern const struct cpg_mssr_info r8a7743_cpg_mssr_info;
++extern const struct cpg_mssr_info r8a7745_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7795_cpg_mssr_info;
+ extern const struct cpg_mssr_info r8a7796_cpg_mssr_info;
+ #endif
diff --git a/patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch b/patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch
new file mode 100644
index 0000000..3248933
--- /dev/null
+++ b/patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch
@@ -0,0 +1,45 @@
+From d970f65930e1af70b60bc271d27b314daf76e94f Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Thu, 15 Sep 2016 15:34:02 -0400
+Subject: [PATCH 199/299] ARM: dts: r7s72100: add mmcif clock to device tree
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6c35a666566cf48faaa95699b0d79c6b8cad824c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 9 +++++++++
+ include/dt-bindings/clock/r7s72100-clock.h | 3 +++
+ 2 files changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -117,6 +117,15 @@
+ clock-output-names = "ether";
+ };
+
++ mstp8_clks: mstp8_clks@fcfe0434 {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0xfcfe0434 4>;
++ clocks = <&p1_clk>;
++ clock-indices = <R7S72100_CLK_MMCIF>;
++ clock-output-names = "mmcif";
++ };
++
+ mstp9_clks: mstp9_clks@fcfe0438 {
+ #clock-cells = <1>;
+ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+--- a/include/dt-bindings/clock/r7s72100-clock.h
++++ b/include/dt-bindings/clock/r7s72100-clock.h
+@@ -28,6 +28,9 @@
+ /* MSTP7 */
+ #define R7S72100_CLK_ETHER 4
+
++/* MSTP8 */
++#define R7S72100_CLK_MMCIF 4
++
+ /* MSTP9 */
+ #define R7S72100_CLK_I2C0 7
+ #define R7S72100_CLK_I2C1 6
diff --git a/patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch b/patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch
new file mode 100644
index 0000000..2a19094
--- /dev/null
+++ b/patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch
@@ -0,0 +1,41 @@
+From ddc830a67a534300539aa47572cf6d850dd3f6ca Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 13 Sep 2016 12:57:01 +0200
+Subject: [PATCH 200/299] ARM: dts: r8a7791: set maximum frequency for SDHI
+ clocks
+
+Define the upper limit otherwise the driver cannot utilize max speeds.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1efd670a73a6ac1be3126f48f2025a6e9f173ba1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -584,6 +584,7 @@
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -596,6 +597,7 @@
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -608,6 +610,7 @@
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
diff --git a/patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch b/patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch
new file mode 100644
index 0000000..e199e09
--- /dev/null
+++ b/patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch
@@ -0,0 +1,29 @@
+From 35511083ad3498057427ced8c4cf3cfd8f85b0d2 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Niklas=20S=C3=B6derlund?=
+ <niklas.soderlund+renesas@ragnatech.se>
+Date: Wed, 10 Aug 2016 15:17:56 +0200
+Subject: [PATCH 201/299] ARM: shmobile: defconfig: Enable CONFIG_CGROUPS
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Enable support for CONFIG_CGROUPS in shmobile_defconfig.
+
+Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a604a37d46b80899d5a09d937fdd670e93af690d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
+ CONFIG_NO_HZ=y
+ CONFIG_IKCONFIG=y
+ CONFIG_IKCONFIG_PROC=y
++CONFIG_CGROUPS=y
+ CONFIG_BLK_DEV_INITRD=y
+ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_SYSCTL_SYSCALL=y
diff --git a/patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch b/patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch
new file mode 100644
index 0000000..24e87f3
--- /dev/null
+++ b/patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch
@@ -0,0 +1,37 @@
+From 40a6fe2d8346020e0b317110c0e94258cfc53522 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 23 Sep 2016 10:28:40 +0200
+Subject: [PATCH 202/299] ARM: shmobile: Sort Kconfig selections
+
+Sort alphabetically all symbols selected by ARCH_RENESAS
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9255f6fd453e1ba7ffa58427a04c52f68b96862f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -32,16 +32,16 @@ config ARCH_RMOBILE
+ menuconfig ARCH_RENESAS
+ bool "Renesas ARM SoCs"
+ depends on ARCH_MULTI_V7 && MMU
++ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ select ARCH_SHMOBILE
+ select ARCH_SHMOBILE_MULTI
++ select ARM_GIC
++ select GPIOLIB
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD if SMP
+- select ARM_GIC
+- select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ select NO_IOPORT_MAP
+ select PINCTRL
+ select SOC_BUS
+- select GPIOLIB
+ select ZONE_DMA if ARM_LPAE
+
+ if ARCH_RENESAS
diff --git a/patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch b/patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch
new file mode 100644
index 0000000..fdb1991
--- /dev/null
+++ b/patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch
@@ -0,0 +1,94 @@
+From d4a8fe5e7081f251939aa28bbfb44f115e859dcb Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 6 Oct 2016 00:37:08 +0300
+Subject: [PATCH 203/299] ARM: shmobile: r8a7743: basic SoC support
+
+Add minimal support for the RZ/G1M (R8A7743) SoC.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e920565a1cc4a352719b42ba5e83d952a9a26507)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 +
+ arch/arm/mach-shmobile/Kconfig | 4 ++
+ arch/arm/mach-shmobile/Makefile | 1
+ arch/arm/mach-shmobile/setup-r8a7743.c | 34 +++++++++++++++++++++
+ 4 files changed, 41 insertions(+)
+ create mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -13,6 +13,8 @@ SoCs:
+ compatible = "renesas,r8a73a4"
+ - R-Mobile A1 (R8A77400)
+ compatible = "renesas,r8a7740"
++ - RZ/G1M (R8A77430)
++ compatible = "renesas,r8a7743"
+ - R-Car M1A (R8A77781)
+ compatible = "renesas,r8a7778"
+ - R-Car H1 (R8A77790)
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -68,6 +68,10 @@ config ARCH_R8A7740
+ select ARCH_RMOBILE
+ select RENESAS_INTC_IRQPIN
+
++config ARCH_R8A7743
++ bool "RZ/G1M (R8A77430)"
++ select ARCH_RCAR_GEN2
++
+ config ARCH_R8A7778
+ bool "R-Car M1A (R8A77781)"
+ select ARCH_RCAR_GEN1
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -9,6 +9,7 @@ obj-y := timer.o
+ obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o
+ obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
+ obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
++obj-$(CONFIG_ARCH_R8A7743) += setup-r8a7743.o
+ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
+ obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
+--- /dev/null
++++ b/arch/arm/mach-shmobile/setup-r8a7743.c
+@@ -0,0 +1,34 @@
++/*
++ * r8a7743 processor support
++ *
++ * Copyright (C) 2016 Cogent Embedded, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation; of the License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/init.h>
++
++#include <asm/mach/arch.h>
++
++#include "common.h"
++#include "rcar-gen2.h"
++
++static const char * const r8a7743_boards_compat_dt[] __initconst = {
++ "renesas,r8a7743",
++ NULL,
++};
++
++DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)")
++ .init_early = shmobile_init_delay,
++ .init_time = rcar_gen2_timer_init,
++ .init_late = shmobile_init_late,
++ .reserve = rcar_gen2_reserve,
++ .dt_compat = r8a7743_boards_compat_dt,
++MACHINE_END
diff --git a/patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch b/patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch
new file mode 100644
index 0000000..1a1e3bc
--- /dev/null
+++ b/patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch
@@ -0,0 +1,30 @@
+From 159a8e4afba95397f47bff385f029e4b4e3018f3 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Thu, 6 Oct 2016 00:45:18 +0300
+Subject: [PATCH 204/299] ARM: shmobile: document SK-RZG1M board
+
+Document the SK-RZG1M device tree bindings, listing it as a supported board.
+
+This allows to use checkpatch.pl to validate .dts files referring to the
+SK-RZG1M board.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7c1959d6879f29c2b789c572e8f358d77b49d39b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -77,6 +77,8 @@ Boards:
+ compatible = "renesas,salvator-x", "renesas,r8a7796";
+ - SILK (RTP0RC7794LCB00011S)
+ compatible = "renesas,silk", "renesas,r8a7794"
++ - SK-RZG1M (YR8A77430S000BE)
++ compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
+ - Wheat
+ compatible = "renesas,wheat", "renesas,r8a7792"
+
diff --git a/patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch b/patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch
new file mode 100644
index 0000000..d32d859
--- /dev/null
+++ b/patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch
@@ -0,0 +1,25 @@
+From a62f5c3c86115f66960a1866f8dcda59ceb8f8d4 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 4 Oct 2016 15:20:47 +0200
+Subject: [PATCH 205/299] ARM: shmobile: r8a7794/alt: Add board part number to
+ DT bindings
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d4a2c642ec968970fef015aa1f450b20cc37b67a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -37,7 +37,7 @@ SoCs:
+
+ Boards:
+
+- - Alt
++ - Alt (RTP0RC7794SEB00010S)
+ compatible = "renesas,alt", "renesas,r8a7794"
+ - APE6-EVM
+ compatible = "renesas,ape6evm", "renesas,r8a73a4"
diff --git a/patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch b/patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch
new file mode 100644
index 0000000..b2b674c
--- /dev/null
+++ b/patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch
@@ -0,0 +1,25 @@
+From d2a559c3e94696810a48f6112f6cd9a1e71e1883 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 4 Oct 2016 15:20:48 +0200
+Subject: [PATCH 206/299] ARM: shmobile: r8a7793/gose: Add board part number to
+ DT bindings
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4b8f5955be83c539d2defe0a81313c11c0e3b3ad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -49,7 +49,7 @@ Boards:
+ compatible = "renesas,bockw", "renesas,r8a7778"
+ - Genmai (RTK772100BC00000BR)
+ compatible = "renesas,genmai", "renesas,r7s72100"
+- - Gose
++ - Gose (RTP0RC7793SEB00010S)
+ compatible = "renesas,gose", "renesas,r8a7793"
+ - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKB00010S)
+ compatible = "renesas,h3ulcb", "renesas,r8a7795";
diff --git a/patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch b/patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch
new file mode 100644
index 0000000..fe590d4
--- /dev/null
+++ b/patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch
@@ -0,0 +1,238 @@
+From 978ded7a63ecadfe4e267aaafbc6311114456621 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Oct 2016 16:59:04 +0300
+Subject: [PATCH 207/299] ARM: shmobile: Consolidate R8A7743 and R8A779[234]
+ machine definitions
+
+The four SoCs use identical machine operations, consolidate them into
+two machine definitions in a single file.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a0c4e2ccb31540f8972d8f36d32ace6b30e88e0f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Makefile | 4 ---
+ arch/arm/mach-shmobile/setup-r8a7743.c | 34 ------------------------------
+ arch/arm/mach-shmobile/setup-r8a7792.c | 35 -------------------------------
+ arch/arm/mach-shmobile/setup-r8a7793.c | 33 -----------------------------
+ arch/arm/mach-shmobile/setup-r8a7794.c | 33 -----------------------------
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 33 +++++++++++++++++++++++++++++
+ 6 files changed, 33 insertions(+), 139 deletions(-)
+ delete mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c
+ delete mode 100644 arch/arm/mach-shmobile/setup-r8a7792.c
+ delete mode 100644 arch/arm/mach-shmobile/setup-r8a7793.c
+ delete mode 100644 arch/arm/mach-shmobile/setup-r8a7794.c
+
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -9,14 +9,10 @@ obj-y := timer.o
+ obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o
+ obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
+ obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
+-obj-$(CONFIG_ARCH_R8A7743) += setup-r8a7743.o
+ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
+ obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
+ obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o
+-obj-$(CONFIG_ARCH_R8A7792) += setup-r8a7792.o
+-obj-$(CONFIG_ARCH_R8A7793) += setup-r8a7793.o
+-obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
+ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
+ obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
+
+--- a/arch/arm/mach-shmobile/setup-r8a7743.c
++++ /dev/null
+@@ -1,34 +0,0 @@
+-/*
+- * r8a7743 processor support
+- *
+- * Copyright (C) 2016 Cogent Embedded, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation; of the License.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- */
+-
+-#include <linux/init.h>
+-
+-#include <asm/mach/arch.h>
+-
+-#include "common.h"
+-#include "rcar-gen2.h"
+-
+-static const char * const r8a7743_boards_compat_dt[] __initconst = {
+- "renesas,r8a7743",
+- NULL,
+-};
+-
+-DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)")
+- .init_early = shmobile_init_delay,
+- .init_time = rcar_gen2_timer_init,
+- .init_late = shmobile_init_late,
+- .reserve = rcar_gen2_reserve,
+- .dt_compat = r8a7743_boards_compat_dt,
+-MACHINE_END
+--- a/arch/arm/mach-shmobile/setup-r8a7792.c
++++ /dev/null
+@@ -1,35 +0,0 @@
+-/*
+- * r8a7792 processor support
+- *
+- * Copyright (C) 2014 Renesas Electronics Corporation
+- * Copyright (C) 2016 Cogent Embedded, Inc.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- */
+-
+-#include <linux/of_platform.h>
+-
+-#include <asm/mach/arch.h>
+-
+-#include "common.h"
+-#include "rcar-gen2.h"
+-
+-static const char * const r8a7792_boards_compat_dt[] __initconst = {
+- "renesas,r8a7792",
+- NULL,
+-};
+-
+-DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)")
+- .init_early = shmobile_init_delay,
+- .init_late = shmobile_init_late,
+- .init_time = rcar_gen2_timer_init,
+- .reserve = rcar_gen2_reserve,
+- .dt_compat = r8a7792_boards_compat_dt,
+-MACHINE_END
+--- a/arch/arm/mach-shmobile/setup-r8a7793.c
++++ /dev/null
+@@ -1,33 +0,0 @@
+-/*
+- * r8a7793 processor support
+- *
+- * Copyright (C) 2015 Ulrich Hecht
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- */
+-
+-#include <linux/init.h>
+-#include <asm/mach/arch.h>
+-
+-#include "common.h"
+-#include "rcar-gen2.h"
+-
+-static const char * const r8a7793_boards_compat_dt[] __initconst = {
+- "renesas,r8a7793",
+- NULL,
+-};
+-
+-DT_MACHINE_START(R8A7793_DT, "Generic R8A7793 (Flattened Device Tree)")
+- .init_early = shmobile_init_delay,
+- .init_time = rcar_gen2_timer_init,
+- .init_late = shmobile_init_late,
+- .reserve = rcar_gen2_reserve,
+- .dt_compat = r8a7793_boards_compat_dt,
+-MACHINE_END
+--- a/arch/arm/mach-shmobile/setup-r8a7794.c
++++ /dev/null
+@@ -1,33 +0,0 @@
+-/*
+- * r8a7794 processor support
+- *
+- * Copyright (C) 2014 Renesas Electronics Corporation
+- * Copyright (C) 2014 Ulrich Hecht
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- */
+-
+-#include <linux/of_platform.h>
+-#include "common.h"
+-#include "rcar-gen2.h"
+-#include <asm/mach/arch.h>
+-
+-static const char * const r8a7794_boards_compat_dt[] __initconst = {
+- "renesas,r8a7794",
+- NULL,
+-};
+-
+-DT_MACHINE_START(R8A7794_DT, "Generic R8A7794 (Flattened Device Tree)")
+- .init_early = shmobile_init_delay,
+- .init_late = shmobile_init_late,
+- .init_time = rcar_gen2_timer_init,
+- .reserve = rcar_gen2_reserve,
+- .dt_compat = r8a7794_boards_compat_dt,
+-MACHINE_END
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -24,6 +24,7 @@
+ #include <linux/memblock.h>
+ #include <linux/of.h>
+ #include <linux/of_fdt.h>
++#include <linux/of_platform.h>
+ #include <asm/mach/arch.h>
+ #include "common.h"
+ #include "rcar-gen2.h"
+@@ -202,3 +203,35 @@ void __init rcar_gen2_reserve(void)
+ }
+ #endif
+ }
++
++static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
++ /*
++ * R8A7790 and R8A7791 can't be handled here as long as they need SMP
++ * initialization fallback.
++ */
++ "renesas,r8a7792",
++ "renesas,r8a7793",
++ "renesas,r8a7794",
++ NULL,
++};
++
++DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
++ .init_early = shmobile_init_delay,
++ .init_late = shmobile_init_late,
++ .init_time = rcar_gen2_timer_init,
++ .reserve = rcar_gen2_reserve,
++ .dt_compat = rcar_gen2_boards_compat_dt,
++MACHINE_END
++
++static const char * const rz_g1_boards_compat_dt[] __initconst = {
++ "renesas,r8a7743",
++ NULL,
++};
++
++DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
++ .init_early = shmobile_init_delay,
++ .init_late = shmobile_init_late,
++ .init_time = rcar_gen2_timer_init,
++ .reserve = rcar_gen2_reserve,
++ .dt_compat = rz_g1_boards_compat_dt,
++MACHINE_END
diff --git a/patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch b/patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch
new file mode 100644
index 0000000..9421e29
--- /dev/null
+++ b/patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch
@@ -0,0 +1,59 @@
+From 047f555d215c880e0472aeef4c98c63062cb0696 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 27 Oct 2016 09:00:06 +0200
+Subject: [PATCH 208/299] ARM: shmobile: select errata 798181 for SoCs with
+ CA15 cores
+
+Select ARM errata 798181 on SoCs cores affected CA15 cores.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+(cherry picked from commit 44c1a893820d3ce4806c5248ad0c0fa7ffcbe380)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -61,6 +61,7 @@ config ARCH_R7S72100
+ config ARCH_R8A73A4
+ bool "R-Mobile APE6 (R8A73A40)"
+ select ARCH_RMOBILE
++ select ARM_ERRATA_798181 if SMP
+ select RENESAS_IRQC
+
+ config ARCH_R8A7740
+@@ -71,6 +72,7 @@ config ARCH_R8A7740
+ config ARCH_R8A7743
+ bool "RZ/G1M (R8A77430)"
+ select ARCH_RCAR_GEN2
++ select ARM_ERRATA_798181 if SMP
+
+ config ARCH_R8A7778
+ bool "R-Car M1A (R8A77781)"
+@@ -83,20 +85,24 @@ config ARCH_R8A7779
+ config ARCH_R8A7790
+ bool "R-Car H2 (R8A77900)"
+ select ARCH_RCAR_GEN2
++ select ARM_ERRATA_798181 if SMP
+ select I2C
+
+ config ARCH_R8A7791
+ bool "R-Car M2-W (R8A77910)"
+ select ARCH_RCAR_GEN2
++ select ARM_ERRATA_798181 if SMP
+ select I2C
+
+ config ARCH_R8A7792
+ bool "R-Car V2H (R8A77920)"
+ select ARCH_RCAR_GEN2
++ select ARM_ERRATA_798181 if SMP
+
+ config ARCH_R8A7793
+ bool "R-Car M2-N (R8A7793)"
+ select ARCH_RCAR_GEN2
++ select ARM_ERRATA_798181 if SMP
+ select I2C
+
+ config ARCH_R8A7794
diff --git a/patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch b/patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch
new file mode 100644
index 0000000..4e82d5f
--- /dev/null
+++ b/patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch
@@ -0,0 +1,28 @@
+From 8a924e7606e13f7ce4aa6d19bd75b171dc4f3a77 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 31 Oct 2016 14:43:04 +0100
+Subject: [PATCH 209/299] ARM: shmobile: r8a7779/marzen: Add board part number
+ to DT bindings
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9652623f8f019edc93a7a934a10b7d0b90421d5a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ Documentation/devicetree/bindings/arm/shmobile.txt
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -65,7 +65,7 @@ Boards:
+ compatible = "renesas,lager", "renesas,r8a7790"
+ - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKB00010S)
+ compatible = "renesas,m3ulcb", "renesas,r8a7796";
+- - Marzen
++ - Marzen (R0P7779A00010S)
+ compatible = "renesas,marzen", "renesas,r8a7779"
+ - Porter (M2-LCDP)
+ compatible = "renesas,porter", "renesas,r8a7791"
diff --git a/patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch b/patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch
new file mode 100644
index 0000000..9fb8f31
--- /dev/null
+++ b/patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch
@@ -0,0 +1,98 @@
+From 101cfba35e6e943945a2c54925cea00f50882286 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 13 Sep 2016 12:57:02 +0200
+Subject: [PATCH 210/299] ARM: dts: koelsch: enable UHS for SDHI 0, 1 & 3
+
+Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit d3cec922fe2030235588aa6fe53d6470b4e7496f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 33 ++++++++++++++++++++++++++++++---
+ 1 file changed, 30 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -360,16 +360,37 @@
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
++ power-source = <3300>;
++ };
++
++ sdhi0_pins_uhs: sd0_uhs {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <1800>;
+ };
+
+ sdhi1_pins: sd1 {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
++ power-source = <3300>;
++ };
++
++ sdhi1_pins_uhs: sd1_uhs {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <1800>;
+ };
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
++ power-source = <3300>;
++ };
++
++ sdhi2_pins_uhs: sd2_uhs {
++ groups = "sdhi2_data4", "sdhi2_ctrl";
++ function = "sdhi2";
++ power-source = <1800>;
+ };
+
+ qspi_pins: qspi {
+@@ -454,33 +475,39 @@
+
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi0_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
+ &sdhi1 {
+ pinctrl-0 = <&sdhi1_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi1_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi1>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
+ &sdhi2 {
+ pinctrl-0 = <&sdhi2_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi2_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi2>;
+ vqmmc-supply = <&vccq_sdhi2>;
+ cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch b/patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch
new file mode 100644
index 0000000..8c7b88a
--- /dev/null
+++ b/patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch
@@ -0,0 +1,42 @@
+From bbab815ff6d362f9e2676482ea738fde41ee73be Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 13 Sep 2016 12:57:03 +0200
+Subject: [PATCH 211/299] ARM: dts: r8a7794: set maximum frequency for SDHI
+ clocks
+
+Define the upper limit otherwise the driver cannot utilize max speeds.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit 5babb5d46413ac8af5ae4f3b9cc93616b3ee2bd1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -731,6 +731,7 @@
+ dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+ <&dmac1 0xcd>, <&dmac1 0xce>;
+ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <195000000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -743,6 +744,7 @@
+ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+ <&dmac1 0xc1>, <&dmac1 0xc2>;
+ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+@@ -755,6 +757,7 @@
+ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+ <&dmac1 0xd3>, <&dmac1 0xd4>;
+ dma-names = "tx", "rx", "tx", "rx";
++ max-frequency = <97500000>;
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
diff --git a/patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch b/patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch
new file mode 100644
index 0000000..a1e1e96
--- /dev/null
+++ b/patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch
@@ -0,0 +1,73 @@
+From 4e06dc3a8106ca1177b40c0deefbd513cb350149 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 13 Sep 2016 12:57:04 +0200
+Subject: [PATCH 212/299] ARM: dts: alt: enable UHS for SDHI 0 & 1
+
+Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit 9510f3492589866a1aa738951bd30e68b2aae7a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 22 ++++++++++++++++++++--
+ 1 file changed, 20 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -207,11 +207,25 @@
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
++ power-source = <3300>;
++ };
++
++ sdhi0_pins_uhs: sd0_uhs {
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
++ power-source = <1800>;
+ };
+
+ sdhi1_pins: sd1 {
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
++ power-source = <3300>;
++ };
++
++ sdhi1_pins_uhs: sd1_uhs {
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
++ power-source = <1800>;
+ };
+ };
+
+@@ -255,23 +269,27 @@
+
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi0_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
+ &sdhi1 {
+ pinctrl-0 = <&sdhi1_pins>;
+- pinctrl-names = "default";
++ pinctrl-1 = <&sdhi1_pins_uhs>;
++ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi1>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
++ sd-uhs-sdr50;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch
new file mode 100644
index 0000000..7186247
--- /dev/null
+++ b/patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch
@@ -0,0 +1,50 @@
+From 7a52029d74480768817e96f84885ddc0e9782945 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 19 Sep 2016 16:18:53 +0200
+Subject: [PATCH 213/299] ARM: dts: r8a7790: Correct SCIFB reg properties to
+ cover all registers
+
+Several SCIFB registers reside outside the reported register ranges.
+Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
+ioremap().
+
+Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
+SH/R-Mobile SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f31fbe837b4213b7371d78e2b48786853faadd31)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -711,7 +711,7 @@
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c20000 0 64>;
++ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
+ clock-names = "fck";
+@@ -725,7 +725,7 @@
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c30000 0 64>;
++ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
+ clock-names = "fck";
+@@ -739,7 +739,7 @@
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7790",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6ce0000 0 64>;
++ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
+ clock-names = "fck";
diff --git a/patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch
new file mode 100644
index 0000000..b8f0c44
--- /dev/null
+++ b/patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch
@@ -0,0 +1,50 @@
+From 64cbc62c56350020b93f77d391505d8aee2be26a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 19 Sep 2016 16:18:54 +0200
+Subject: [PATCH 214/299] ARM: dts: r8a7791: Correct SCIFB reg properties to
+ cover all registers
+
+Several SCIFB registers reside outside the reported register ranges.
+Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
+ioremap().
+
+Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
+SH/R-Mobile SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5f25f9f52e1954d3ccec43976e10ea1a8075e536)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -702,7 +702,7 @@
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c20000 0 64>;
++ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
+ clock-names = "fck";
+@@ -716,7 +716,7 @@
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c30000 0 64>;
++ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
+ clock-names = "fck";
+@@ -730,7 +730,7 @@
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7791",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6ce0000 0 64>;
++ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
+ clock-names = "fck";
diff --git a/patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch
new file mode 100644
index 0000000..f7167fc
--- /dev/null
+++ b/patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch
@@ -0,0 +1,50 @@
+From a38ecb3d6595b2e4994667a2ab1345b25954990c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 19 Sep 2016 16:18:55 +0200
+Subject: [PATCH 215/299] ARM: dts: r8a7793: Correct SCIFB reg properties to
+ cover all registers
+
+Several SCIFB registers reside outside the reported register ranges.
+Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
+ioremap().
+
+Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
+SH/R-Mobile SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 88b8596ba95599fefa5a5f1a709c70796a0e8163)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -666,7 +666,7 @@
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c20000 0 64>;
++ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>;
+ clock-names = "fck";
+@@ -680,7 +680,7 @@
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c30000 0 64>;
++ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>;
+ clock-names = "fck";
+@@ -694,7 +694,7 @@
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7793",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6ce0000 0 64>;
++ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>;
+ clock-names = "fck";
diff --git a/patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch b/patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch
new file mode 100644
index 0000000..6606685
--- /dev/null
+++ b/patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch
@@ -0,0 +1,50 @@
+From 855b6dfcdf43e601150eaf387ff3d781ab026c6d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 19 Sep 2016 16:18:56 +0200
+Subject: [PATCH 216/299] ARM: dts: r8a7794: Correct SCIFB reg properties to
+ cover all registers
+
+Several SCIFB registers reside outside the reported register ranges.
+Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
+ioremap().
+
+Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
+SH/R-Mobile SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 655ea555064251e0b094848d378d4a67e8ebb0ed)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -411,7 +411,7 @@
+ scifb0: serial@e6c20000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c20000 0 64>;
++ reg = <0 0xe6c20000 0 0x100>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
+ clock-names = "fck";
+@@ -425,7 +425,7 @@
+ scifb1: serial@e6c30000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6c30000 0 64>;
++ reg = <0 0xe6c30000 0 0x100>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
+ clock-names = "fck";
+@@ -439,7 +439,7 @@
+ scifb2: serial@e6ce0000 {
+ compatible = "renesas,scifb-r8a7794",
+ "renesas,rcar-gen2-scifb", "renesas,scifb";
+- reg = <0 0xe6ce0000 0 64>;
++ reg = <0 0xe6ce0000 0 0x100>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
+ clock-names = "fck";
diff --git a/patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch b/patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch
new file mode 100644
index 0000000..8b5b55e
--- /dev/null
+++ b/patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch
@@ -0,0 +1,165 @@
+From 016d1820cd9559e8c22c6ee48281212ddd78973f Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 23 Sep 2016 00:06:43 +0300
+Subject: [PATCH 217/299] ARM: dts: wheat: add DU support
+
+Define the Wheat board dependent part of the DU device node.
+Add the device nodes for the Analog Devices ADV7513 HDMI transmitters
+connected to DU0/1. Add the necessary subnodes to interconnect DU with
+HDMI transmitters/connectors.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f6eea82a87db2753e2f7c0454f078fb630eb72cd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7792-wheat.dts | 126 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 126 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7792-wheat.dts
++++ b/arch/arm/boot/dts/r8a7792-wheat.dts
+@@ -86,6 +86,34 @@
+ gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
++
++ hdmi-out0 {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con0: endpoint {
++ remote-endpoint = <&adv7513_0_out>;
++ };
++ };
++ };
++
++ hdmi-out1 {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con1: endpoint {
++ remote-endpoint = <&adv7513_1_out>;
++ };
++ };
++ };
++
++ osc2_clk: osc2 {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <74250000>;
++ };
+ };
+
+ &extal_clk {
+@@ -128,6 +156,16 @@
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
+ };
++
++ du0_pins: du0 {
++ groups = "du0_rgb888", "du0_sync", "du0_disp";
++ function = "du0";
++ };
++
++ du1_pins: du1 {
++ groups = "du1_rgb666", "du1_sync", "du1_disp";
++ function = "du1";
++ };
+ };
+
+ &scif0 {
+@@ -196,4 +234,92 @@
+ };
+ };
+ };
++};
++
++&i2c4 {
++ status = "okay";
++ clock-frequency = <400000>;
++
++ hdmi@3d {
++ compatible = "adi,adv7513";
++ reg = <0x3d>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_0_in: endpoint {
++ remote-endpoint = <&du_out_rgb0>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_0_out: endpoint {
++ remote-endpoint = <&hdmi_con0>;
++ };
++ };
++ };
++ };
++
++ hdmi@39 {
++ compatible = "adi,adv7513";
++ reg = <0x39>;
++
++ adi,input-depth = <8>;
++ adi,input-colorspace = "rgb";
++ adi,input-clock = "1x";
++ adi,input-style = <1>;
++ adi,input-justification = "evenly";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7513_1_in: endpoint {
++ remote-endpoint = <&du_out_rgb1>;
++ };
++ };
++
++ port@1 {
++ reg = <1>;
++ adv7513_1_out: endpoint {
++ remote-endpoint = <&hdmi_con1>;
++ };
++ };
++ };
++ };
++};
++
++&du {
++ pinctrl-0 = <&du0_pins &du1_pins>;
++ pinctrl-names = "default";
++
++ clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
++ <&osc2_clk>;
++ clock-names = "du.0", "du.1", "dclkin.0";
++ status = "okay";
++
++ ports {
++ port@0 {
++ endpoint {
++ remote-endpoint = <&adv7513_0_in>;
++ };
++ };
++ port@1 {
++ endpoint {
++ remote-endpoint = <&adv7513_1_in>;
++ };
++ };
++ };
+ };
diff --git a/patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch b/patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch
new file mode 100644
index 0000000..7639ef6
--- /dev/null
+++ b/patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch
@@ -0,0 +1,68 @@
+From 7fb4b5bdc8a9f93316864b0d16a3bffca70c6709 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 5 Sep 2016 23:55:01 +0300
+Subject: [PATCH 218/299] ARM: dts: r8a7792: add MSIOF clocks
+
+Describe the MSIOF0/1 clocks and their parent, MP clock in the R8A7792
+device tree.
+
+Based on the original (and large) patch by Vladimir Barinov
+<vladimir.barinov@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5cef452bf895cc38af3a4e20f85c20c1a4d41001)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 21 +++++++++++++++++++--
+ 1 file changed, 19 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -768,6 +768,13 @@
+ clock-div = <48>;
+ clock-mult = <1>;
+ };
++ mp_clk: mp {
++ compatible = "fixed-factor-clock";
++ clocks = <&pll1_div2_clk>;
++ #clock-cells = <0>;
++ clock-div = <15>;
++ clock-mult = <1>;
++ };
+ m2_clk: m2 {
+ compatible = "fixed-factor-clock";
+ clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+@@ -798,6 +805,15 @@
+ };
+
+ /* Gate clocks */
++ mstp0_clks: mstp0_clks@e6150130 {
++ compatible = "renesas,r8a7792-mstp-clocks",
++ "renesas,cpg-mstp-clocks";
++ reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
++ clocks = <&mp_clk>;
++ #clock-cells = <1>;
++ clock-indices = <R8A7792_CLK_MSIOF0>;
++ clock-output-names = "msiof0";
++ };
+ mstp1_clks: mstp1_clks@e6150134 {
+ compatible = "renesas,r8a7792-mstp-clocks",
+ "renesas,cpg-mstp-clocks";
+@@ -816,12 +832,13 @@
+ compatible = "renesas,r8a7792-mstp-clocks",
+ "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+- clocks = <&zs_clk>, <&zs_clk>;
++ clocks = <&mp_clk>, <&zs_clk>, <&zs_clk>;
+ #clock-cells = <1>;
+ clock-indices = <
++ R8A7792_CLK_MSIOF1
+ R8A7792_CLK_SYS_DMAC1 R8A7792_CLK_SYS_DMAC0
+ >;
+- clock-output-names = "sys-dmac1", "sys-dmac0";
++ clock-output-names = "msiof1", "sys-dmac1", "sys-dmac0";
+ };
+ mstp3_clks: mstp3_clks@e615013c {
+ compatible = "renesas,r8a7792-mstp-clocks",
diff --git a/patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch b/patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch
new file mode 100644
index 0000000..e4f8b71
--- /dev/null
+++ b/patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch
@@ -0,0 +1,65 @@
+From b809d0567d320266632d878163cfa50fc04eca3f Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 5 Sep 2016 23:55:57 +0300
+Subject: [PATCH 219/299] ARM: dts: r8a7792: add MSIOF support
+
+Define the generic R8A7792 parts of the MSIOF0/1 device nodes.
+
+Based on the original (and large) patch by Vladimir Barinov
+<vladimir.barinov@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b0663cd4211a26eb7fcaed98a26b3d117dc34926)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 30 ++++++++++++++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -26,6 +26,8 @@
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ spi0 = &qspi;
++ spi1 = &msiof0;
++ spi2 = &msiof1;
+ vin0 = &vin0;
+ vin1 = &vin1;
+ vin2 = &vin2;
+@@ -575,6 +577,34 @@
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
++ };
++
++ msiof0: spi@e6e20000 {
++ compatible = "renesas,msiof-r8a7792";
++ reg = <0 0xe6e20000 0 0x0064>;
++ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
++ dmas = <&dmac0 0x51>, <&dmac0 0x52>,
++ <&dmac1 0x51>, <&dmac1 0x52>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ msiof1: spi@e6e10000 {
++ compatible = "renesas,msiof-r8a7792";
++ reg = <0 0xe6e10000 0 0x0064>;
++ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
++ dmas = <&dmac0 0x55>, <&dmac0 0x56>,
++ <&dmac1 0x55>, <&dmac1 0x56>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
+ };
+
+ du: display@feb00000 {
diff --git a/patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch b/patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch
new file mode 100644
index 0000000..c8034ce
--- /dev/null
+++ b/patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch
@@ -0,0 +1,32 @@
+From c531912267ffc967524e767fcc91e40d15c353d4 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Tue, 20 Sep 2016 11:46:18 -0400
+Subject: [PATCH 220/299] ARM: dts: r7s72100: add mmcif to device tree
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 887862227ba397bc6b22147284cdccc60a87f72f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -450,4 +450,16 @@
+ #size-cells = <0>;
+ status = "disabled";
+ };
++
++ mmcif: mmc@e804c800 {
++ compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
++ reg = <0xe804c800 0x80>;
++ interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
++ reg-io-width = <4>;
++ bus-width = <8>;
++ status = "disabled";
++ };
+ };
diff --git a/patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch b/patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch
new file mode 100644
index 0000000..79d36d1
--- /dev/null
+++ b/patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch
@@ -0,0 +1,43 @@
+From 653ebdeb7451f223d1c18b916d1704e7298088ae Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Thu, 22 Sep 2016 17:32:09 -0400
+Subject: [PATCH 221/299] ARM: dts: r7s72100: add sdhi clock to device tree
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7c8522b7047c77ef598e8b5f9ff6e349c22e0622)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 8 ++++++++
+ include/dt-bindings/clock/r7s72100-clock.h | 4 ++++
+ 2 files changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -149,6 +149,14 @@
+ >;
+ clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
+ };
++ mstp12_clks: mstp12_clks@fcfe0444 {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0xfcfe0444 4>;
++ clocks = <&p1_clk>, <&p1_clk>;
++ clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;
++ clock-output-names = "sdhi1", "sdhi0";
++ };
+ };
+
+ cpus {
+--- a/include/dt-bindings/clock/r7s72100-clock.h
++++ b/include/dt-bindings/clock/r7s72100-clock.h
+@@ -44,4 +44,8 @@
+ #define R7S72100_CLK_SPI3 4
+ #define R7S72100_CLK_SPI4 3
+
++/* MSTP12 */
++#define R7S72100_CLK_SDHI0 3
++#define R7S72100_CLK_SDHI1 2
++
+ #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
diff --git a/patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch b/patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch
new file mode 100644
index 0000000..3197f4e
--- /dev/null
+++ b/patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch
@@ -0,0 +1,44 @@
+From 4d14016470508aeeb43579a298c7f5dd000ae09e Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 16 Sep 2016 12:04:54 +0200
+Subject: [PATCH 222/299] ARM: dts: gose: use generic pinctrl properties in
+ SDHI nodes
+
+Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
+groups properties") renesas pfc drivers accept generic "function", "pins"
+and "groups" properties.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit af897250ea54c6f21bd50c350c68e8340556b93b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7793-gose.dts | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7793-gose.dts
++++ b/arch/arm/boot/dts/r8a7793-gose.dts
+@@ -346,18 +346,18 @@
+ };
+
+ sdhi0_pins: sd0 {
+- renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
+- renesas,function = "sdhi0";
++ groups = "sdhi0_data4", "sdhi0_ctrl";
++ function = "sdhi0";
+ };
+
+ sdhi1_pins: sd1 {
+- renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
+- renesas,function = "sdhi1";
++ groups = "sdhi1_data4", "sdhi1_ctrl";
++ function = "sdhi1";
+ };
+
+ sdhi2_pins: sd2 {
+- renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+- renesas,function = "sdhi2";
++ groups = "sdhi2_data4", "sdhi2_ctrl";
++ function = "sdhi2";
+ };
+
+ qspi_pins: qspi {
diff --git a/patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch b/patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch
new file mode 100644
index 0000000..c9ecfbc
--- /dev/null
+++ b/patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch
@@ -0,0 +1,199 @@
+From 68d224bec63bf83bdb57cc671b2536377dc1b6de Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 4 Oct 2016 15:31:48 +0200
+Subject: [PATCH 223/299] ARM: dts: r8a7794: Fix W=1 dtc warnings
+
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
+Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 0f4eebb63eb779b50e05bde0f46ea21213f4c465)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 58 ++++++++++++++++++++---------------------
+ 1 file changed, 29 insertions(+), 29 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -1495,62 +1495,62 @@
+ status = "disabled";
+
+ rcar_sound,dvc {
+- dvc0: dvc@0 {
++ dvc0: dvc-0 {
+ dmas = <&audma0 0xbc>;
+ dma-names = "tx";
+ };
+- dvc1: dvc@1 {
++ dvc1: dvc-1 {
+ dmas = <&audma0 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+- mix0: mix@0 { };
+- mix1: mix@1 { };
++ mix0: mix-0 { };
++ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+- ctu00: ctu@0 { };
+- ctu01: ctu@1 { };
+- ctu02: ctu@2 { };
+- ctu03: ctu@3 { };
+- ctu10: ctu@4 { };
+- ctu11: ctu@5 { };
+- ctu12: ctu@6 { };
+- ctu13: ctu@7 { };
++ ctu00: ctu-0 { };
++ ctu01: ctu-1 { };
++ ctu02: ctu-2 { };
++ ctu03: ctu-3 { };
++ ctu10: ctu-4 { };
++ ctu11: ctu-5 { };
++ ctu12: ctu-6 { };
++ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+- src@0 {
++ src-0 {
+ status = "disabled";
+ };
+- src1: src@1 {
++ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma0 0x9c>;
+ dma-names = "rx", "tx";
+ };
+- src2: src@2 {
++ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma0 0x9e>;
+ dma-names = "rx", "tx";
+ };
+- src3: src@3 {
++ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+ dma-names = "rx", "tx";
+ };
+- src4: src@4 {
++ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+ dma-names = "rx", "tx";
+ };
+- src5: src@5 {
++ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+ dma-names = "rx", "tx";
+ };
+- src6: src@6 {
++ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma0 0xb4>;
+ dma-names = "rx", "tx";
+@@ -1558,61 +1558,61 @@
+ };
+
+ rcar_sound,ssi {
+- ssi0: ssi@0 {
++ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma0 0x02>,
+ <&audma0 0x15>, <&audma0 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi1: ssi@1 {
++ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma0 0x04>,
+ <&audma0 0x49>, <&audma0 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi2: ssi@2 {
++ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma0 0x06>,
+ <&audma0 0x63>, <&audma0 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi3: ssi@3 {
++ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma0 0x08>,
+ <&audma0 0x6f>, <&audma0 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi4: ssi@4 {
++ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma0 0x0a>,
+ <&audma0 0x71>, <&audma0 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi5: ssi@5 {
++ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+ <&audma0 0x73>, <&audma0 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi6: ssi@6 {
++ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+ <&audma0 0x75>, <&audma0 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi7: ssi@7 {
++ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma0 0x10>,
+ <&audma0 0x79>, <&audma0 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi8: ssi@8 {
++ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma0 0x12>,
+ <&audma0 0x7b>, <&audma0 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+- ssi9: ssi@9 {
++ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma0 0x14>,
+ <&audma0 0x7d>, <&audma0 0x7e>;
diff --git a/patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch b/patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch
new file mode 100644
index 0000000..0a998da
--- /dev/null
+++ b/patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch
@@ -0,0 +1,46 @@
+From 752835a94ef7ca0e617022a43a51154d7dc6fa73 Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Mon, 26 Sep 2016 16:40:31 -0400
+Subject: [PATCH 224/299] ARM: dts: r7s72100: add sdhi to device tree
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 66474697923cd166567b06b492e52adce12393eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -470,4 +470,30 @@
+ bus-width = <8>;
+ status = "disabled";
+ };
++
++ sdhi0: sd@e804e000 {
++ compatible = "renesas,sdhi-r7s72100";
++ reg = <0xe804e000 0x100>;
++ interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
++
++ clocks = <&mstp12_clks R7S72100_CLK_SDHI0>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
++
++ sdhi1: sd@e804e800 {
++ compatible = "renesas,sdhi-r7s72100";
++ reg = <0xe804e800 0x100>;
++ interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
++
++ clocks = <&mstp12_clks R7S72100_CLK_SDHI1>;
++ cap-sd-highspeed;
++ cap-sdio-irq;
++ status = "disabled";
++ };
+ };
diff --git a/patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch b/patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch
new file mode 100644
index 0000000..dea7177
--- /dev/null
+++ b/patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch
@@ -0,0 +1,28 @@
+From 88c2d6bd681f50b78778209637b6b56c2c0fa15b Mon Sep 17 00:00:00 2001
+From: Chris Brandt <chris.brandt@renesas.com>
+Date: Mon, 26 Sep 2016 16:40:32 -0400
+Subject: [PATCH 225/299] ARM: dts: rskrza1: add sdhi1 DT support
+
+Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bba1b7ea9a1cfb1478df2c1cbd8ed6736a5f4f98)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100-rskrza1.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
++++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
+@@ -56,6 +56,11 @@
+ };
+ };
+
++&sdhi1 {
++ bus-width = <4>;
++ status = "okay";
++};
++
+ &scif2 {
+ status = "okay";
+ };
diff --git a/patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch b/patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch
new file mode 100644
index 0000000..4aa55eb
--- /dev/null
+++ b/patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch
@@ -0,0 +1,125 @@
+From 10b2b055773fcc6f5b5212ba2388600df551c926 Mon Sep 17 00:00:00 2001
+From: William Towle <william.towle@codethink.co.uk>
+Date: Tue, 18 Oct 2016 17:01:33 +0200
+Subject: [PATCH 226/299] ARM: dts: lager: Add entries for VIN HDMI input
+ support
+
+Add DT entries for vin0, vin0_pins, and adv7612.
+
+Sets the 'default-input' property for ADV7612, enabling image and video
+capture without the need to have userspace specifying routing.
+
+Signed-off-by: William Towle <william.towle@codethink.co.uk>
+Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk>
+[uli: added interrupt, renamed endpoint, merged default-input]
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 56548d0c5aead2a1f7df43fcb29f93575ff713b4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 66 ++++++++++++++++++++++++++++++++++--
+ 1 file changed, 64 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -231,12 +231,23 @@
+ };
+ };
+
++ hdmi-in {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con_in: endpoint {
++ remote-endpoint = <&adv7612_in>;
++ };
++ };
++ };
++
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+- hdmi_con: endpoint {
++ hdmi_con_out: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+@@ -427,6 +438,11 @@
+ function = "usb2";
+ };
+
++ vin0_pins: vin0 {
++ groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
++ function = "vin0";
++ };
++
+ vin1_pins: vin1 {
+ groups = "vin1_data8", "vin1_clk";
+ function = "vin1";
+@@ -646,7 +662,34 @@
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+- remote-endpoint = <&hdmi_con>;
++ remote-endpoint = <&hdmi_con_out>;
++ };
++ };
++ };
++ };
++
++ hdmi-in@4c {
++ compatible = "adi,adv7612";
++ reg = <0x4c>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
++ default-input = <0>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7612_in: endpoint {
++ remote-endpoint = <&hdmi_con_in>;
++ };
++ };
++
++ port@2 {
++ reg = <2>;
++ adv7612_out: endpoint {
++ remote-endpoint = <&vin0ep2>;
+ };
+ };
+ };
+@@ -722,6 +765,25 @@
+ status = "okay";
+ };
+
++/* HDMI video input */
++&vin0 {
++ pinctrl-0 = <&vin0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ port {
++ vin0ep2: endpoint {
++ remote-endpoint = <&adv7612_out>;
++ bus-width = <24>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ pclk-sample = <1>;
++ data-active = <1>;
++ };
++ };
++};
++
+ /* composite video input */
+ &vin1 {
+ pinctrl-0 = <&vin1_pins>;
diff --git a/patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch b/patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch
new file mode 100644
index 0000000..2b5c37c
--- /dev/null
+++ b/patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch
@@ -0,0 +1,122 @@
+From 6b9e3a41477fb939ceea2b3ee9ee17c751b6ff7c Mon Sep 17 00:00:00 2001
+From: Hans Verkuil <hverkuil@xs4all.nl>
+Date: Tue, 18 Oct 2016 17:01:34 +0200
+Subject: [PATCH 227/299] ARM: dts: koelsch: add HDMI input
+
+Add support in the dts for the HDMI input. Based on the Lager dts
+patch from Ulrich Hecht.
+
+Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
+[uli: removed "renesas," prefixes from pfc nodes]
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 84e3a74664c52b58cd7f5b6fa381f7f1cd1956e0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 68 +++++++++++++++++++++++++++++++++-
+ 1 file changed, 66 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -265,12 +265,23 @@
+ };
+ };
+
++ hdmi-in {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi_con_in: endpoint {
++ remote-endpoint = <&adv7612_in>;
++ };
++ };
++ };
++
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+- hdmi_con: endpoint {
++ hdmi_con_out: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+@@ -414,6 +425,11 @@
+ function = "usb1";
+ };
+
++ vin0_pins: vin0 {
++ groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
++ function = "vin0";
++ };
++
+ vin1_pins: vin1 {
+ groups = "vin1_data8", "vin1_clk";
+ function = "vin1";
+@@ -617,7 +633,34 @@
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+- remote-endpoint = <&hdmi_con>;
++ remote-endpoint = <&hdmi_con_out>;
++ };
++ };
++ };
++ };
++
++ hdmi-in@4c {
++ compatible = "adi,adv7612";
++ reg = <0x4c>;
++ interrupt-parent = <&gpio4>;
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
++ default-input = <0>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port@0 {
++ reg = <0>;
++ adv7612_in: endpoint {
++ remote-endpoint = <&hdmi_con_in>;
++ };
++ };
++
++ port@2 {
++ reg = <2>;
++ adv7612_out: endpoint {
++ remote-endpoint = <&vin0ep2>;
+ };
+ };
+ };
+@@ -699,6 +742,27 @@
+ cpu0-supply = <&vdd_dvfs>;
+ };
+
++/* HDMI video input */
++&vin0 {
++ status = "okay";
++ pinctrl-0 = <&vin0_pins>;
++ pinctrl-names = "default";
++
++ port {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ vin0ep2: endpoint {
++ remote-endpoint = <&adv7612_out>;
++ bus-width = <24>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ pclk-sample = <1>;
++ data-active = <1>;
++ };
++ };
++};
++
+ /* composite video input */
+ &vin1 {
+ status = "okay";
diff --git a/patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch b/patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch
new file mode 100644
index 0000000..fd58316
--- /dev/null
+++ b/patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch
@@ -0,0 +1,51 @@
+From 1ab1d8daf7f59d3736fc4d9ca2d37e7035516b1b Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Date: Tue, 18 Oct 2016 17:02:21 +0200
+Subject: [PATCH 228/299] ARM: dts: r8a7793: Enable VIN0-VIN2
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 06b64afa6e981b332dccadcf0b5d52139525b4f6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 27 +++++++++++++++++++++++++++
+ 1 file changed, 27 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -852,6 +852,33 @@
+ status = "disabled";
+ };
+
++ vin0: video@e6ef0000 {
++ compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
++ reg = <0 0xe6ef0000 0 0x1000>;
++ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp8_clks R8A7793_CLK_VIN0>;
++ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ vin1: video@e6ef1000 {
++ compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
++ reg = <0 0xe6ef1000 0 0x1000>;
++ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp8_clks R8A7793_CLK_VIN1>;
++ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ vin2: video@e6ef2000 {
++ compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
++ reg = <0 0xe6ef2000 0 0x1000>;
++ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp8_clks R8A7793_CLK_VIN2>;
++ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
diff --git a/patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch b/patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch
new file mode 100644
index 0000000..0887cbc
--- /dev/null
+++ b/patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch
@@ -0,0 +1,28 @@
+From 41f0a953d66f739f5d241e56bbbcdc6181d63c33 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 19 Oct 2016 01:23:02 +0300
+Subject: [PATCH 229/299] ARM: dts: r8a7779: Fix DU reg property
+
+The system uses one address cell and one size cell, not two. Fix the DU
+DT node.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 30524edfae10d4af08cb2daed786ae4713ba3fd6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -420,7 +420,7 @@
+
+ du: display@fff80000 {
+ compatible = "renesas,du-r8a7779";
+- reg = <0 0xfff80000 0 0x40000>;
++ reg = <0xfff80000 0x40000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp1_clks R8A7779_CLK_DU>;
+ power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
diff --git a/patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch
new file mode 100644
index 0000000..e3cfd94
--- /dev/null
+++ b/patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch
@@ -0,0 +1,39 @@
+From 92c177401e8889262e538e1637df62953c5a90b5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 11:16:06 +0200
+Subject: [PATCH 230/299] ARM: dts: emev2: Remove skeleton.dtsi inclusion
+
+As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
+as deprecated"), including skeleton.dtsi is deprecated.
+
+This fixes the following warning with W=1:
+
+ Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 51b884d0e1d881d7b2f4f79d806375cd2b03c50d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/emev2.dtsi | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/emev2.dtsi
++++ b/arch/arm/boot/dts/emev2.dtsi
+@@ -8,13 +8,14 @@
+ * kind, whether express or implied.
+ */
+
+-#include "skeleton.dtsi"
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+ compatible = "renesas,emev2";
+ interrupt-parent = <&gic>;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
+ aliases {
+ gpio0 = &gpio0;
diff --git a/patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch
new file mode 100644
index 0000000..6f94433
--- /dev/null
+++ b/patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch
@@ -0,0 +1,41 @@
+From 1b8e1d8a56635f0e17a7b149bba141b14b353c16 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 11:16:07 +0200
+Subject: [PATCH 231/299] ARM: dts: r8a7778: Remove skeleton.dtsi inclusion
+
+As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
+as deprecated"), including skeleton.dtsi is deprecated.
+
+This fixes the following warning with W=1:
+
+ Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3bc313022dbdc96457add1d2c29d81280d6a2b60)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -14,8 +14,6 @@
+ * kind, whether express or implied.
+ */
+
+-/include/ "skeleton.dtsi"
+-
+ #include <dt-bindings/clock/r8a7778-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+@@ -23,6 +21,8 @@
+ / {
+ compatible = "renesas,r8a7778";
+ interrupt-parent = <&gic>;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
diff --git a/patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch
new file mode 100644
index 0000000..1df9e56
--- /dev/null
+++ b/patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch
@@ -0,0 +1,41 @@
+From dc94c2d248c988aa63c881b00be4e6bea8124b4e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 11:16:08 +0200
+Subject: [PATCH 232/299] ARM: dts: r8a7779: Remove skeleton.dtsi inclusion
+
+As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
+as deprecated"), including skeleton.dtsi is deprecated.
+
+This fixes the following warning with W=1:
+
+ Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1cfc0c03602b8e876672ba895377f0ba1445a2d8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -9,8 +9,6 @@
+ * kind, whether express or implied.
+ */
+
+-/include/ "skeleton.dtsi"
+-
+ #include <dt-bindings/clock/r8a7779-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+@@ -19,6 +17,8 @@
+ / {
+ compatible = "renesas,r8a7779";
+ interrupt-parent = <&gic>;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
diff --git a/patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch
new file mode 100644
index 0000000..5059170
--- /dev/null
+++ b/patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch
@@ -0,0 +1,41 @@
+From 8eb91813415a1ad95a20da346e20bab97b342883 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 11:16:09 +0200
+Subject: [PATCH 233/299] ARM: dts: r8a7740: Remove skeleton.dtsi inclusion
+
+As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
+as deprecated"), including skeleton.dtsi is deprecated.
+
+This fixes the following warning with W=1:
+
+ Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d0b54c54f1a2257017c2501a56df936c6d921585)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -8,8 +8,6 @@
+ * kind, whether express or implied.
+ */
+
+-/include/ "skeleton.dtsi"
+-
+ #include <dt-bindings/clock/r8a7740-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+@@ -17,6 +15,8 @@
+ / {
+ compatible = "renesas,r8a7740";
+ interrupt-parent = <&gic>;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
diff --git a/patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch b/patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch
new file mode 100644
index 0000000..aba398e
--- /dev/null
+++ b/patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch
@@ -0,0 +1,41 @@
+From e68285e840f4d3ead966a3b6637dba6cec16b006 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Fri, 21 Oct 2016 11:16:10 +0200
+Subject: [PATCH 234/299] ARM: dts: sh73a0: Remove skeleton.dtsi inclusion
+
+As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
+as deprecated"), including skeleton.dtsi is deprecated.
+
+This fixes the following warning with W=1:
+
+ Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit cbdcf396fc862882516d8feeb9af4d8b33a4c7dd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/sh73a0.dtsi
++++ b/arch/arm/boot/dts/sh73a0.dtsi
+@@ -8,8 +8,6 @@
+ * kind, whether express or implied.
+ */
+
+-/include/ "skeleton.dtsi"
+-
+ #include <dt-bindings/clock/sh73a0-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+@@ -17,6 +15,8 @@
+ / {
+ compatible = "renesas,sh73a0";
+ interrupt-parent = <&gic>;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
diff --git a/patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch b/patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch
new file mode 100644
index 0000000..90b9084
--- /dev/null
+++ b/patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch
@@ -0,0 +1,28 @@
+From 6c7e983a3f33767a4b567140b1088c377434d296 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 21 Oct 2016 15:27:43 +0300
+Subject: [PATCH 235/299] ARM: dts: r8a7779: marzen: Configure pinmuxing for
+ the DU0 input clock
+
+DU0 uses an externally provided clock, but the corresponding pin isn't
+correctly muxed. Fix it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8698d83dcf1b348eb54bcd1d52b8c636d8d7d494)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/r8a7779-marzen.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen.dts
+@@ -170,7 +170,7 @@
+
+ du_pins: du {
+ du0 {
+- groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
++ groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0", "du0_clk_in";
+ function = "du0";
+ };
+ du1 {
diff --git a/patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch b/patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch
new file mode 100644
index 0000000..dbda117
--- /dev/null
+++ b/patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch
@@ -0,0 +1,53 @@
+From 35ca57209a3101afff85bc3890fabd9b13ac62b2 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:49:55 +0300
+Subject: [PATCH 236/299] ARM: shmobile: r8a7745: basic SoC support
+
+Add minimal support for the RZ/G1E (R8A7745) SoC.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 47802fd7c7c4735ddaf004e0f61371dcaa86f4ad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ arch/arm/mach-shmobile/Kconfig | 4 ++++
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 1 +
+ 3 files changed, 7 insertions(+)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -15,6 +15,8 @@ SoCs:
+ compatible = "renesas,r8a7740"
+ - RZ/G1M (R8A77430)
+ compatible = "renesas,r8a7743"
++ - RZ/G1E (R8A77450)
++ compatible = "renesas,r8a7745"
+ - R-Car M1A (R8A77781)
+ compatible = "renesas,r8a7778"
+ - R-Car H1 (R8A77790)
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -74,6 +74,10 @@ config ARCH_R8A7743
+ select ARCH_RCAR_GEN2
+ select ARM_ERRATA_798181 if SMP
+
++config ARCH_R8A7745
++ bool "RZ/G1E (R8A77450)"
++ select ARCH_RCAR_GEN2
++
+ config ARCH_R8A7778
+ bool "R-Car M1A (R8A77781)"
+ select ARCH_RCAR_GEN1
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -225,6 +225,7 @@ MACHINE_END
+
+ static const char * const rz_g1_boards_compat_dt[] __initconst = {
+ "renesas,r8a7743",
++ "renesas,r8a7745",
+ NULL,
+ };
+
diff --git a/patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch b/patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch
new file mode 100644
index 0000000..f20d4ba
--- /dev/null
+++ b/patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch
@@ -0,0 +1,30 @@
+From 6fa3ae29f972294ff82415fba3777a67e54a814e Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 4 Nov 2016 10:44:38 +0100
+Subject: [PATCH 237/299] ARM: shmobile: document SK-RZG1E board
+
+Document the SK-RZG1E device tree bindings, listing it as a supported board.
+
+This allows to use checkpatch.pl to validate .dts files referring to the
+SK-RZG1E board.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4af239175d00c1866cc6b41f3eabcf93c45dcc40)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/Documentation/devicetree/bindings/arm/shmobile.txt
++++ b/Documentation/devicetree/bindings/arm/shmobile.txt
+@@ -79,6 +79,8 @@ Boards:
+ compatible = "renesas,salvator-x", "renesas,r8a7796";
+ - SILK (RTP0RC7794LCB00011S)
+ compatible = "renesas,silk", "renesas,r8a7794"
++ - SK-RZG1E (YR8A77450S000BE)
++ compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
+ - SK-RZG1M (YR8A77430S000BE)
+ compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
+ - Wheat
diff --git a/patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch b/patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch
new file mode 100644
index 0000000..0ab2184
--- /dev/null
+++ b/patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch
@@ -0,0 +1,43 @@
+From 0a05d4b0e5bf81e1513a177a95051f6d2c0ce5c0 Mon Sep 17 00:00:00 2001
+From: Jacopo Mondi <jacopo@jmondi.org>
+Date: Thu, 3 Nov 2016 20:34:46 +0100
+Subject: [PATCH 238/299] ARM: dts: alt: Fix PFC names for DU
+
+Update the PFC pin groups and function names of DU interface for
+r8a7794 ALT board.
+
+The currently specified pin groups and function names prevented PFC and
+DU interfaces from being correctly configured:
+
+sh-pfc e6060000.pin-controller: function 'du' not supported
+sh-pfc e6060000.pin-controller: invalid function du in map table
+sh-pfc e6060000.pin-controller: function 'du' not supported
+sh-pfc e6060000.pin-controller: invalid function du in map table
+sh-pfc e6060000.pin-controller: function 'du' not supported
+sh-pfc e6060000.pin-controller: invalid function du in map table
+sh-pfc e6060000.pin-controller: function 'du' not supported
+sh-pfc e6060000.pin-controller: invalid function du in map table
+rcar-du: probe of feb00000.display failed with error -22
+
+Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
+Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5591aa4249436615b12ed980a457840f886656f9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -165,8 +165,8 @@
+ pinctrl-names = "default";
+
+ du_pins: du {
+- groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
+- function = "du";
++ groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
++ function = "du1";
+ };
+
+ scif2_pins: scif2 {
diff --git a/patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch b/patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch
new file mode 100644
index 0000000..1f1e8d3
--- /dev/null
+++ b/patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch
@@ -0,0 +1,66 @@
+From 3410933290557eceeb1c1d93e4d677cea1be77ab Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Sun, 6 Nov 2016 21:20:19 +0100
+Subject: [PATCH 239/299] ARM: dts: lager: rename and reindex i2cexio
+
+The rename from i2cexio to i2cexio0 is in preparation for adding
+i2cexio1 which will use the demuxer for IIC1/I2C1.
+
+The reindexing from i2c8 to i2c10 is to allow space for grouping of
+additional GPIO buses to be added by follow-up patches to support demuxing
+of other i2c buses.
+
+Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+[wsa: rebased, fixed alias and removed typo in commit message]
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+
+(cherry picked from commit 1e26fcf31c5c70557689184185913881e4557bc0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 12 +++++++-----
+ 1 file changed, 7 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -50,7 +50,7 @@
+ aliases {
+ serial0 = &scif0;
+ serial1 = &scifa1;
+- i2c8 = "i2cexio";
++ i2c10 = &i2cexio0;
+ };
+
+ chosen {
+@@ -273,11 +273,13 @@
+ * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
+ * instantiate the slave device at runtime according to the documentation.
+ * You can then communicate with the slave via IIC3.
++ *
++ * IIC0/I2C0 does not appear to support fallback to GPIO.
+ */
+- i2cexio: i2c-8 {
++ i2cexio0: i2c-10 {
+ compatible = "i2c-demux-pinctrl";
+ i2c-parent = <&iic0>, <&i2c0>;
+- i2c-bus-name = "i2c-exio";
++ i2c-bus-name = "i2c-exio0";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+@@ -596,12 +598,12 @@
+
+ &i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+- pinctrl-names = "i2c-exio";
++ pinctrl-names = "i2c-exio0";
+ };
+
+ &iic0 {
+ pinctrl-0 = <&iic0_pins>;
+- pinctrl-names = "i2c-exio";
++ pinctrl-names = "i2c-exio0";
+ };
+
+ &iic1 {
diff --git a/patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch b/patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch
new file mode 100644
index 0000000..62fd555
--- /dev/null
+++ b/patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch
@@ -0,0 +1,100 @@
+From 90cf504d9732cf2271852f6a2adafc1b5876dd7b Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Sun, 6 Nov 2016 21:20:20 +0100
+Subject: [PATCH 240/299] ARM: dts: lager: use demuxer for IIC1/I2C1
+
+Make it possible to select which I2C1 IP core you want to run on the
+EXIO-A connector.
+
+This is based on reference work for the I2C0 core of the lager board
+by Wolfram Sang.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+[wsa: rebased and fixed aliases]
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+
+(cherry picked from commit b2f15ca697a11c8df64ac6c8086ababc5c9e6060)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 39 ++++++++++++++++++++++++++++++++++--
+ 1 file changed, 37 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -50,7 +50,9 @@
+ aliases {
+ serial0 = &scif0;
+ serial1 = &scifa1;
++ i2c8 = &gpioi2c1;
+ i2c10 = &i2cexio0;
++ i2c11 = &i2cexio1;
+ };
+
+ chosen {
+@@ -265,6 +267,17 @@
+ clock-frequency = <148500000>;
+ };
+
++ gpioi2c1: i2c-8 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "i2c-gpio";
++ status = "disabled";
++ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH /* sda */
++ &gpio1 16 GPIO_ACTIVE_HIGH /* scl */
++ >;
++ i2c-gpio,delay-us = <5>;
++ };
++
+ /*
+ * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
+ * We use the I2C demuxer, so the desired IP core can be selected at runtime
+@@ -283,6 +296,19 @@
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
++
++ /*
++ * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
++ * This is similar to the arangement described for i2cexio0 (above)
++ * with a fallback to GPIO also provided.
++ */
++ i2cexio1: i2c-11 {
++ compatible = "i2c-demux-pinctrl";
++ i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
++ i2c-bus-name = "i2c-exio1";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+
+ &du {
+@@ -405,6 +431,11 @@
+ function = "iic0";
+ };
+
++ i2c1_pins: i2c1 {
++ groups = "i2c1";
++ function = "i2c1";
++ };
++
+ iic1_pins: iic1 {
+ groups = "iic1";
+ function = "iic1";
+@@ -606,10 +637,14 @@
+ pinctrl-names = "i2c-exio0";
+ };
+
++&i2c1 {
++ pinctrl-0 = <&i2c1_pins>;
++ pinctrl-names = "i2c-exio1";
++};
++
+ &iic1 {
+- status = "okay";
+ pinctrl-0 = <&iic1_pins>;
+- pinctrl-names = "default";
++ pinctrl-names = "i2c-exio1";
+ };
+
+ &iic2 {
diff --git a/patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch b/patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch
new file mode 100644
index 0000000..59911fb
--- /dev/null
+++ b/patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch
@@ -0,0 +1,85 @@
+From 289342396270e4b8130f8a43ee72c6586ad4246d Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Sun, 6 Nov 2016 21:20:23 +0100
+Subject: [PATCH 241/299] ARM: dts: koelsch: use demuxer for I2C1
+
+Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector.
+
+This is based on reference work for the I2C0 core of the lager/r8a7790
+by Wolfram Sang.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+[wsa: rebased and fixed aliases]
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+
+(cherry picked from commit 6723438b3b98ba8434655fa13fc6d5153f70ee98)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 35 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 35 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -50,6 +50,8 @@
+ aliases {
+ serial0 = &scif0;
+ serial1 = &scif1;
++ i2c9 = &gpioi2c1;
++ i2c12 = &i2cexio1;
+ };
+
+ chosen {
+@@ -298,6 +300,29 @@
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ };
++
++ gpioi2c1: i2c-9 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "i2c-gpio";
++ status = "disabled";
++ gpios = <&gpio7 16 GPIO_ACTIVE_HIGH /* sda */
++ &gpio7 15 GPIO_ACTIVE_HIGH /* scl */
++ >;
++ i2c-gpio,delay-us = <5>;
++ };
++
++ /*
++ * I2C1 is routed to EXIO connector B, pins 64 (SCL) + 66 (SDA).
++ * A fallback to GPIO is provided.
++ */
++ i2cexio1: i2c-12 {
++ compatible = "i2c-demux-pinctrl";
++ i2c-parent = <&i2c1>, <&gpioi2c1>;
++ i2c-bus-name = "i2c-exio1";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+
+ &du {
+@@ -333,6 +358,11 @@
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
++ i2c1_pins: i2c1 {
++ groups = "i2c1";
++ function = "i2c1";
++ };
++
+ i2c2_pins: i2c2 {
+ groups = "i2c2";
+ function = "i2c2";
+@@ -581,6 +611,11 @@
+ };
+ };
+
++&i2c1 {
++ pinctrl-0 = <&i2c1_pins>;
++ pinctrl-names = "i2c-exio1";
++};
++
+ &i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
diff --git a/patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch b/patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch
new file mode 100644
index 0000000..a65f66e
--- /dev/null
+++ b/patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch
@@ -0,0 +1,85 @@
+From dab26e7f63c8b10bdb954818849e488c8ace4665 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Sun, 6 Nov 2016 21:20:30 +0100
+Subject: [PATCH 242/299] ARM: dts: alt: use demuxer for I2C4
+
+Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector.
+
+This is based on reference work for the I2C0 core of the lager/r8a7790
+by Wolfram Sang.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+[wsa: rebased and fixed aliases]
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+
+(cherry picked from commit e60a19f03cdb5a16fdad72d0776a1ede10fd2a57)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 35 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 35 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -18,6 +18,8 @@
+
+ aliases {
+ serial0 = &scif2;
++ i2c10 = &gpioi2c4;
++ i2c12 = &i2cexio4;
+ };
+
+ chosen {
+@@ -135,6 +137,29 @@
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ };
++
++ gpioi2c4: i2c-10 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "i2c-gpio";
++ status = "disabled";
++ gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */
++ &gpio4 8 GPIO_ACTIVE_HIGH /* scl */
++ >;
++ i2c-gpio,delay-us = <5>;
++ };
++
++ /*
++ * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
++ * A fallback to GPIO is provided.
++ */
++ i2cexio4: i2c-14 {
++ compatible = "i2c-demux-pinctrl";
++ i2c-parent = <&i2c4>, <&gpioi2c4>;
++ i2c-bus-name = "i2c-exio4";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
+ };
+
+ &du {
+@@ -194,6 +219,11 @@
+ function = "i2c1";
+ };
+
++ i2c4_pins: i2c4 {
++ groups = "i2c4";
++ function = "i2c4";
++ };
++
+ vin0_pins: vin0 {
+ groups = "vin0_data8", "vin0_clk";
+ function = "vin0";
+@@ -314,6 +344,11 @@
+ };
+ };
+
++&i2c4 {
++ pinctrl-0 = <&i2c4_pins>;
++ pinctrl-names = "i2c-exio4";
++};
++
+ &vin0 {
+ status = "okay";
+ pinctrl-0 = <&vin0_pins>;
diff --git a/patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch b/patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch
new file mode 100644
index 0000000..5a15a7d
--- /dev/null
+++ b/patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch
@@ -0,0 +1,26 @@
+From 5fdbb9ea523b5e9c5849ae67739bee59013271e5 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 3 Nov 2016 16:07:23 +0100
+Subject: [PATCH 243/299] ARM: dts: lager: Enable UHS-I SDR-104
+
+Add the sd-uhs-sdr104 property to SDHI0.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit dcc2fe783d5338125214335b7168623a4b81adbb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -608,6 +608,7 @@
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr50;
++ sd-uhs-sdr104;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch b/patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch
new file mode 100644
index 0000000..2b4cf39
--- /dev/null
+++ b/patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch
@@ -0,0 +1,25 @@
+From 6d015cd004f7240f0448874b1b2ccd6f6f202c72 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 3 Nov 2016 16:07:24 +0100
+Subject: [PATCH 244/299] ARM: dts: koelsch: Enable UHS-I SDR-104
+
+And the sd-uhs-sdr104 property to SDHI0.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit 0726729a4c6882086fe0db150a4dd0493f15dea3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -529,6 +529,7 @@
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
+ sd-uhs-sdr50;
++ sd-uhs-sdr104;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch b/patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch
new file mode 100644
index 0000000..fc9cfad
--- /dev/null
+++ b/patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch
@@ -0,0 +1,25 @@
+From 86e7f1e9ceee4011e9044e72b076b42463fa2573 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 3 Nov 2016 16:07:25 +0100
+Subject: [PATCH 245/299] ARM: dts: alt: Enable UHS-I SDR-104
+
+And the sd-uhs-sdr104 property to SDHI0.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+(cherry picked from commit f9f2fc0b8d659158cafa95df4ca1d38b1c081d94)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794-alt.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/r8a7794-alt.dts
++++ b/arch/arm/boot/dts/r8a7794-alt.dts
+@@ -307,6 +307,7 @@
+ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr50;
++ sd-uhs-sdr104;
+ status = "okay";
+ };
+
diff --git a/patches.renesas/0246-ARM-dts-r8a7743-initial-SoC-device-tree.patch b/patches.renesas/0246-ARM-dts-r8a7743-initial-SoC-device-tree.patch
new file mode 100644
index 0000000..c217385
--- /dev/null
+++ b/patches.renesas/0246-ARM-dts-r8a7743-initial-SoC-device-tree.patch
@@ -0,0 +1,144 @@
+From fc280e62e97c8ce79e9410d4379ae300eac4e0d6 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 22:54:01 +0300
+Subject: [PATCH 246/299] ARM: dts: r8a7743: initial SoC device tree
+
+The initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST,
+CPG, and the required clock descriptions.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 34e8d993a68ae459ad98c27afc07647e439deacc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 120 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 120 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7743.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -0,0 +1,120 @@
++/*
++ * Device Tree Source for the r8a7743 SoC
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
++#include <dt-bindings/power/r8a7743-sysc.h>
++
++/ {
++ compatible = "renesas,r8a7743";
++ #address-cells = <2>;
++ #size-cells = <2>;
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ cpu0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a15";
++ reg = <0>;
++ clock-frequency = <1500000000>;
++ clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
++ power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
++ next-level-cache = <&L2_CA15>;
++ };
++
++ L2_CA15: cache-controller@0 {
++ compatible = "cache";
++ reg = <0>;
++ cache-unified;
++ cache-level = <2>;
++ power-domains = <&sysc R8A7743_PD_CA15_SCU>;
++ };
++ };
++
++ soc {
++ compatible = "simple-bus";
++ interrupt-parent = <&gic>;
++
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ gic: interrupt-controller@f1001000 {
++ compatible = "arm,gic-400";
++ #interrupt-cells = <3>;
++ #address-cells = <0>;
++ interrupt-controller;
++ reg = <0 0xf1001000 0 0x1000>,
++ <0 0xf1002000 0 0x1000>,
++ <0 0xf1004000 0 0x2000>,
++ <0 0xf1006000 0 0x2000>;
++ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_HIGH)>;
++ };
++
++ timer {
++ compatible = "arm,armv7-timer";
++ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7743-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
++ };
++
++ sysc: system-controller@e6180000 {
++ compatible = "renesas,r8a7743-sysc";
++ reg = <0 0xe6180000 0 0x200>;
++ #power-domain-cells = <1>;
++ };
++
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7743-rst";
++ reg = <0 0xe6160000 0 0x100>;
++ };
++ };
++
++ /* External root clock */
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External USB clock - can be overridden by the board */
++ usb_extal_clk: usb_extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <48000000>;
++ };
++
++ /* External SCIF clock */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++};
diff --git a/patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch b/patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch
new file mode 100644
index 0000000..3a52743
--- /dev/null
+++ b/patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch
@@ -0,0 +1,92 @@
+From f0c3c1e42582f88b5830c23a0bb65ebbc9094697 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 22:54:50 +0300
+Subject: [PATCH 247/299] ARM: dts: r8a7743: add SYS-DMAC support
+
+Describe SYS-DMAC0/1 in the R8A7743 device tree.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6ed5ed500a5c67eed7b76e5353f7bca3b3daae92)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 64 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 64 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -93,6 +93,70 @@
+ compatible = "renesas,r8a7743-rst";
+ reg = <0 0xe6160000 0 0x100>;
+ };
++
++ dmac0: dma-controller@e6700000 {
++ compatible = "renesas,dmac-r8a7743",
++ "renesas,rcar-dmac";
++ reg = <0 0xe6700000 0 0x20000>;
++ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14";
++ clocks = <&cpg CPG_MOD 219>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <15>;
++ };
++
++ dmac1: dma-controller@e6720000 {
++ compatible = "renesas,dmac-r8a7743",
++ "renesas,rcar-dmac";
++ reg = <0 0xe6720000 0 0x20000>;
++ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14";
++ clocks = <&cpg CPG_MOD 218>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <15>;
++ };
+ };
+
+ /* External root clock */
diff --git a/patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch b/patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch
new file mode 100644
index 0000000..8970b76
--- /dev/null
+++ b/patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch
@@ -0,0 +1,291 @@
+From c6c63ab9a9706604bc340727264aea654670fb74 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 22:55:39 +0300
+Subject: [PATCH 248/299] ARM: dts: r8a7743: add [H]SCIF{A|B} support
+
+Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+[simon: consistently use tabs for indentation]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 809c01342691469456489bbe87d2d79ed9638631)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 261 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 261 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -157,6 +157,267 @@
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
++
++ scifa0: serial@e6c40000 {
++ compatible = "renesas,scifa-r8a7743",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c40000 0 0x40>;
++ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 204>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
++ <&dmac1 0x21>, <&dmac1 0x22>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa1: serial@e6c50000 {
++ compatible = "renesas,scifa-r8a7743",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c50000 0 0x40>;
++ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 203>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
++ <&dmac1 0x25>, <&dmac1 0x26>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa2: serial@e6c60000 {
++ compatible = "renesas,scifa-r8a7743",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c60000 0 0x40>;
++ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 202>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
++ <&dmac1 0x27>, <&dmac1 0x28>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa3: serial@e6c70000 {
++ compatible = "renesas,scifa-r8a7743",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c70000 0 0x40>;
++ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 1106>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
++ <&dmac1 0x1b>, <&dmac1 0x1c>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa4: serial@e6c78000 {
++ compatible = "renesas,scifa-r8a7743",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c78000 0 0x40>;
++ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 1107>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
++ <&dmac1 0x1f>, <&dmac1 0x20>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa5: serial@e6c80000 {
++ compatible = "renesas,scifa-r8a7743",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c80000 0 0x40>;
++ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 1108>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
++ <&dmac1 0x23>, <&dmac1 0x24>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifb0: serial@e6c20000 {
++ compatible = "renesas,scifb-r8a7743",
++ "renesas,rcar-gen2-scifb", "renesas,scifb";
++ reg = <0 0xe6c20000 0 0x100>;
++ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 206>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
++ <&dmac1 0x3d>, <&dmac1 0x3e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifb1: serial@e6c30000 {
++ compatible = "renesas,scifb-r8a7743",
++ "renesas,rcar-gen2-scifb", "renesas,scifb";
++ reg = <0 0xe6c30000 0 0x100>;
++ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 207>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
++ <&dmac1 0x19>, <&dmac1 0x1a>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifb2: serial@e6ce0000 {
++ compatible = "renesas,scifb-r8a7743",
++ "renesas,rcar-gen2-scifb", "renesas,scifb";
++ reg = <0 0xe6ce0000 0 0x100>;
++ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 216>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
++ <&dmac1 0x1d>, <&dmac1 0x1e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif0: serial@e6e60000 {
++ compatible = "renesas,scif-r8a7743",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6e60000 0 0x40>;
++ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 721>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
++ <&dmac1 0x29>, <&dmac1 0x2a>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif1: serial@e6e68000 {
++ compatible = "renesas,scif-r8a7743",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6e68000 0 0x40>;
++ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 720>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
++ <&dmac1 0x2d>, <&dmac1 0x2e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif2: serial@e6e58000 {
++ compatible = "renesas,scif-r8a7743",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6e58000 0 0x40>;
++ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 719>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
++ <&dmac1 0x2b>, <&dmac1 0x2c>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif3: serial@e6ea8000 {
++ compatible = "renesas,scif-r8a7743",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6ea8000 0 0x40>;
++ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 718>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
++ <&dmac1 0x2f>, <&dmac1 0x30>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif4: serial@e6ee0000 {
++ compatible = "renesas,scif-r8a7743",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6ee0000 0 0x40>;
++ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 715>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
++ <&dmac1 0xfb>, <&dmac1 0xfc>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif5: serial@e6ee8000 {
++ compatible = "renesas,scif-r8a7743",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6ee8000 0 0x40>;
++ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 714>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
++ <&dmac1 0xfd>, <&dmac1 0xfe>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ hscif0: serial@e62c0000 {
++ compatible = "renesas,hscif-r8a7743",
++ "renesas,rcar-gen2-hscif", "renesas,hscif";
++ reg = <0 0xe62c0000 0 0x60>;
++ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 717>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
++ <&dmac1 0x39>, <&dmac1 0x3a>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ hscif1: serial@e62c8000 {
++ compatible = "renesas,hscif-r8a7743",
++ "renesas,rcar-gen2-hscif", "renesas,hscif";
++ reg = <0 0xe62c8000 0 0x60>;
++ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 716>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
++ <&dmac1 0x4d>, <&dmac1 0x4e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ hscif2: serial@e62d0000 {
++ compatible = "renesas,hscif-r8a7743",
++ "renesas,rcar-gen2-hscif", "renesas,hscif";
++ reg = <0 0xe62d0000 0 0x60>;
++ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 713>,
++ <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
++ <&dmac1 0x3b>, <&dmac1 0x3c>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
diff --git a/patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch b/patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch
new file mode 100644
index 0000000..35140c8
--- /dev/null
+++ b/patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch
@@ -0,0 +1,40 @@
+From cf1372b7b2d0679d30ead98cd9cf37e9d834cbd9 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 22:56:36 +0300
+Subject: [PATCH 249/299] ARM: dts: r8a7743: add Ether support
+
+Define the generic R8A7743 part of the Ether device node.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 75f97fb45e6297e3fbaf837fc30850cf724c8f83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -418,6 +418,18 @@
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
++
++ ether: ethernet@ee700000 {
++ compatible = "renesas,ether-r8a7743";
++ reg = <0 0xee700000 0 0x400>;
++ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 813>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ phy-mode = "rmii";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
diff --git a/patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch b/patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch
new file mode 100644
index 0000000..2bd5278
--- /dev/null
+++ b/patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch
@@ -0,0 +1,44 @@
+From 7cec0ddf3f0bc26608622302e02635d07a77ee81 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 22:58:12 +0300
+Subject: [PATCH 250/299] ARM: dts: r8a7743: add IRQC support
+
+Describe the IRQC interrupt controller in the R8A7743 device tree.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ef0ca50774495c4ca4d1211252c8ee5af5136187)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7743.dtsi | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7743.dtsi
++++ b/arch/arm/boot/dts/r8a7743.dtsi
+@@ -62,6 +62,25 @@
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
++ irqc: interrupt-controller@e61c0000 {
++ compatible = "renesas,irqc-r8a7743", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
++ };
++
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch b/patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch
new file mode 100644
index 0000000..22356a7
--- /dev/null
+++ b/patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch
@@ -0,0 +1,80 @@
+From 11f4974d19f259c9f03ca5683c8eb08c6c9c4fbb Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 22:59:03 +0300
+Subject: [PATCH 251/299] ARM: dts: sk-rzg1m: initial device tree
+
+Add the initial device tree for the R8A7743 SoC based SK-RZG1M board.
+The board has one debug serial port (SCIF0); include support for it, so
+that the serial console can work.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 22e69c4bfce712ab945ce6cd57951e3ba15a8e70)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1
+ arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 44 +++++++++++++++++++++++++++++++++
+ 2 files changed, 45 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -678,6 +678,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
+ r7s72100-rskrza1.dtb \
+ r8a73a4-ape6evm.dtb \
+ r8a7740-armadillo800eva.dtb \
++ r8a7743-sk-rzg1m.dtb \
+ r8a7778-bockw.dtb \
+ r8a7779-marzen.dtb \
+ r8a7790-lager.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
+@@ -0,0 +1,44 @@
++/*
++ * Device Tree Source for the SK-RZG1M board
++ *
++ * Copyright (C) 2016 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7743.dtsi"
++
++/ {
++ model = "SK-RZG1M";
++ compatible = "renesas,sk-rzg1m", "renesas,r8a7743";
++
++ aliases {
++ serial0 = &scif0;
++ };
++
++ chosen {
++ bootargs = "ignore_loglevel";
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x40000000>;
++ };
++
++ memory@200000000 {
++ device_type = "memory";
++ reg = <2 0x00000000 0 0x40000000>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
++&scif0 {
++ status = "okay";
++};
diff --git a/patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch b/patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch
new file mode 100644
index 0000000..871f1c1
--- /dev/null
+++ b/patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch
@@ -0,0 +1,48 @@
+From ed8b22b99ce5d243a2208009b62dfa4cb81e4561 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Mon, 31 Oct 2016 23:00:03 +0300
+Subject: [PATCH 252/299] ARM: dts: sk-rzg1m: add Ether support
+
+Define the SK-RZG1M board dependent part of the Ether device node.
+Enable DHCP and NFS root for the kernel booting.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d05ab65b1d0b7fdd0f25439a3bf234324a419d94)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 15 ++++++++++++++-
+ 1 file changed, 14 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
++++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
+@@ -20,7 +20,7 @@
+ };
+
+ chosen {
+- bootargs = "ignore_loglevel";
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
+
+@@ -42,3 +42,16 @@
+ &scif0 {
+ status = "okay";
+ };
++
++ðer {
++ phy-handle = <&phy1>;
++ renesas,ether-link-active-low;
++ status = "okay";
++
++ phy1: ethernet-phy@1 {
++ reg = <1>;
++ interrupt-parent = <&irqc>;
++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ micrel,led-mode = <1>;
++ };
++};
diff --git a/patches.renesas/0253-ARM-dts-r8a7745-initial-SoC-device-tree.patch b/patches.renesas/0253-ARM-dts-r8a7745-initial-SoC-device-tree.patch
new file mode 100644
index 0000000..71668c0
--- /dev/null
+++ b/patches.renesas/0253-ARM-dts-r8a7745-initial-SoC-device-tree.patch
@@ -0,0 +1,144 @@
+From 9d3e10885b5fdc66063e5a7eb1af624e78ad1ca6 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:53:38 +0300
+Subject: [PATCH 253/299] ARM: dts: r8a7745: initial SoC device tree
+
+The initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
+CPG, and the required clock descriptions.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c95360247bdd67d39b55f7e743153efa64e4efe3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 120 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 120 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7745.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -0,0 +1,120 @@
++/*
++ * Device Tree Source for the r8a7745 SoC
++ *
++ * Copyright (C) 2016 Cogent Embedded Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/clock/r8a7745-cpg-mssr.h>
++#include <dt-bindings/power/r8a7745-sysc.h>
++
++/ {
++ compatible = "renesas,r8a7745";
++ #address-cells = <2>;
++ #size-cells = <2>;
++
++ cpus {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ cpu0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a7";
++ reg = <0>;
++ clock-frequency = <1000000000>;
++ clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
++ power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
++ next-level-cache = <&L2_CA7>;
++ };
++
++ L2_CA7: cache-controller@0 {
++ compatible = "cache";
++ reg = <0>;
++ cache-unified;
++ cache-level = <2>;
++ power-domains = <&sysc R8A7745_PD_CA7_SCU>;
++ };
++ };
++
++ soc {
++ compatible = "simple-bus";
++ interrupt-parent = <&gic>;
++
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ gic: interrupt-controller@f1001000 {
++ compatible = "arm,gic-400";
++ #interrupt-cells = <3>;
++ #address-cells = <0>;
++ interrupt-controller;
++ reg = <0 0xf1001000 0 0x1000>,
++ <0 0xf1002000 0 0x1000>,
++ <0 0xf1004000 0 0x2000>,
++ <0 0xf1006000 0 0x2000>;
++ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_HIGH)>;
++ };
++
++ timer {
++ compatible = "arm,armv7-timer";
++ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>,
++ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
++ IRQ_TYPE_LEVEL_LOW)>;
++ };
++
++ cpg: clock-controller@e6150000 {
++ compatible = "renesas,r8a7745-cpg-mssr";
++ reg = <0 0xe6150000 0 0x1000>;
++ clocks = <&extal_clk>, <&usb_extal_clk>;
++ clock-names = "extal", "usb_extal";
++ #clock-cells = <2>;
++ #power-domain-cells = <0>;
++ };
++
++ sysc: system-controller@e6180000 {
++ compatible = "renesas,r8a7745-sysc";
++ reg = <0 0xe6180000 0 0x200>;
++ #power-domain-cells = <1>;
++ };
++
++ rst: reset-controller@e6160000 {
++ compatible = "renesas,r8a7745-rst";
++ reg = <0 0xe6160000 0 0x100>;
++ };
++ };
++
++ /* External root clock */
++ extal_clk: extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++
++ /* External USB clock - can be overridden by the board */
++ usb_extal_clk: usb_extal {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <48000000>;
++ };
++
++ /* External SCIF clock */
++ scif_clk: scif {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ /* This value must be overridden by the board. */
++ clock-frequency = <0>;
++ };
++};
diff --git a/patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch b/patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch
new file mode 100644
index 0000000..280a6b0
--- /dev/null
+++ b/patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch
@@ -0,0 +1,92 @@
+From fa2b137c858ad5a3994621db8e02c8f46ce79bce Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:54:51 +0300
+Subject: [PATCH 254/299] ARM: dts: r8a7745: add SYS-DMAC support
+
+Describe SYS-DMAC0/1 in the R8A7745 device tree.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 06a80bad04291b6e305ef521550581d62b4656a3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 64 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 64 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -93,6 +93,70 @@
+ compatible = "renesas,r8a7745-rst";
+ reg = <0 0xe6160000 0 0x100>;
+ };
++
++ dmac0: dma-controller@e6700000 {
++ compatible = "renesas,dmac-r8a7745",
++ "renesas,rcar-dmac";
++ reg = <0 0xe6700000 0 0x20000>;
++ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14";
++ clocks = <&cpg CPG_MOD 219>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <15>;
++ };
++
++ dmac1: dma-controller@e6720000 {
++ compatible = "renesas,dmac-r8a7745",
++ "renesas,rcar-dmac";
++ reg = <0 0xe6720000 0 0x20000>;
++ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
++ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "error",
++ "ch0", "ch1", "ch2", "ch3",
++ "ch4", "ch5", "ch6", "ch7",
++ "ch8", "ch9", "ch10", "ch11",
++ "ch12", "ch13", "ch14";
++ clocks = <&cpg CPG_MOD 218>;
++ clock-names = "fck";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ #dma-cells = <1>;
++ dma-channels = <15>;
++ };
+ };
+
+ /* External root clock */
diff --git a/patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch b/patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch
new file mode 100644
index 0000000..ef33ac7
--- /dev/null
+++ b/patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch
@@ -0,0 +1,291 @@
+From 05741c85b60f8261f0ed7f8a0d2466e96a90b01b Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:55:52 +0300
+Subject: [PATCH 255/299] ARM: dts: r8a7745: add [H]SCIF{|A|B} support
+
+Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+[simon: consistently use tabs for indentation]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit e0d2da54c4d01ba27a4f50c9da94f7a011c6056b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 261 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 261 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -157,6 +157,267 @@
+ #dma-cells = <1>;
+ dma-channels = <15>;
+ };
++
++ scifa0: serial@e6c40000 {
++ compatible = "renesas,scifa-r8a7745",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c40000 0 0x40>;
++ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 204>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x21>, <&dmac0 0x22>,
++ <&dmac1 0x21>, <&dmac1 0x22>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa1: serial@e6c50000 {
++ compatible = "renesas,scifa-r8a7745",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c50000 0 0x40>;
++ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 203>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x25>, <&dmac0 0x26>,
++ <&dmac1 0x25>, <&dmac1 0x26>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa2: serial@e6c60000 {
++ compatible = "renesas,scifa-r8a7745",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c60000 0 0x40>;
++ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 202>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x27>, <&dmac0 0x28>,
++ <&dmac1 0x27>, <&dmac1 0x28>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa3: serial@e6c70000 {
++ compatible = "renesas,scifa-r8a7745",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c70000 0 0x40>;
++ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 1106>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
++ <&dmac1 0x1b>, <&dmac1 0x1c>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa4: serial@e6c78000 {
++ compatible = "renesas,scifa-r8a7745",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c78000 0 0x40>;
++ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 1107>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
++ <&dmac1 0x1f>, <&dmac1 0x20>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifa5: serial@e6c80000 {
++ compatible = "renesas,scifa-r8a7745",
++ "renesas,rcar-gen2-scifa", "renesas,scifa";
++ reg = <0 0xe6c80000 0 0x40>;
++ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 1108>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x23>, <&dmac0 0x24>,
++ <&dmac1 0x23>, <&dmac1 0x24>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifb0: serial@e6c20000 {
++ compatible = "renesas,scifb-r8a7745",
++ "renesas,rcar-gen2-scifb", "renesas,scifb";
++ reg = <0 0xe6c20000 0 0x100>;
++ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 206>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
++ <&dmac1 0x3d>, <&dmac1 0x3e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifb1: serial@e6c30000 {
++ compatible = "renesas,scifb-r8a7745",
++ "renesas,rcar-gen2-scifb", "renesas,scifb";
++ reg = <0 0xe6c30000 0 0x100>;
++ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 207>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
++ <&dmac1 0x19>, <&dmac1 0x1a>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scifb2: serial@e6ce0000 {
++ compatible = "renesas,scifb-r8a7745",
++ "renesas,rcar-gen2-scifb", "renesas,scifb";
++ reg = <0 0xe6ce0000 0 0x100>;
++ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 216>;
++ clock-names = "fck";
++ dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
++ <&dmac1 0x1d>, <&dmac1 0x1e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif0: serial@e6e60000 {
++ compatible = "renesas,scif-r8a7745",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6e60000 0 0x40>;
++ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 721>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
++ <&dmac1 0x29>, <&dmac1 0x2a>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif1: serial@e6e68000 {
++ compatible = "renesas,scif-r8a7745",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6e68000 0 0x40>;
++ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 720>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
++ <&dmac1 0x2d>, <&dmac1 0x2e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif2: serial@e6e58000 {
++ compatible = "renesas,scif-r8a7745",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6e58000 0 0x40>;
++ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 719>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
++ <&dmac1 0x2b>, <&dmac1 0x2c>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif3: serial@e6ea8000 {
++ compatible = "renesas,scif-r8a7745",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6ea8000 0 0x40>;
++ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 718>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
++ <&dmac1 0x2f>, <&dmac1 0x30>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif4: serial@e6ee0000 {
++ compatible = "renesas,scif-r8a7745",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6ee0000 0 0x40>;
++ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 715>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
++ <&dmac1 0xfb>, <&dmac1 0xfc>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ scif5: serial@e6ee8000 {
++ compatible = "renesas,scif-r8a7745",
++ "renesas,rcar-gen2-scif", "renesas,scif";
++ reg = <0 0xe6ee8000 0 0x40>;
++ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 714>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
++ <&dmac1 0xfd>, <&dmac1 0xfe>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ hscif0: serial@e62c0000 {
++ compatible = "renesas,hscif-r8a7745",
++ "renesas,rcar-gen2-hscif", "renesas,hscif";
++ reg = <0 0xe62c0000 0 0x60>;
++ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 717>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
++ <&dmac1 0x39>, <&dmac1 0x3a>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ hscif1: serial@e62c8000 {
++ compatible = "renesas,hscif-r8a7745",
++ "renesas,rcar-gen2-hscif", "renesas,hscif";
++ reg = <0 0xe62c8000 0 0x60>;
++ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 716>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
++ <&dmac1 0x4d>, <&dmac1 0x4e>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
++
++ hscif2: serial@e62d0000 {
++ compatible = "renesas,hscif-r8a7745",
++ "renesas,rcar-gen2-hscif", "renesas,hscif";
++ reg = <0 0xe62d0000 0 0x60>;
++ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 713>,
++ <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
++ clock-names = "fck", "brg_int", "scif_clk";
++ dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
++ <&dmac1 0x3b>, <&dmac1 0x3c>;
++ dma-names = "tx", "rx", "tx", "rx";
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
diff --git a/patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch b/patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch
new file mode 100644
index 0000000..6c79e7f
--- /dev/null
+++ b/patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch
@@ -0,0 +1,40 @@
+From 59d0aac9d98b3cd6c6f949a6cd9c71741d852bff Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 4 Nov 2016 14:57:01 -0700
+Subject: [PATCH 256/299] ARM: dts: r8a7745: add Ether support
+
+Define the generic R8A7745 part of the Ether device node.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bed98a59b62d3e121da2d8372425fd4e424b0aa6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -418,6 +418,18 @@
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
++
++ ether: ethernet@ee700000 {
++ compatible = "renesas,ether-r8a7745";
++ reg = <0 0xee700000 0 0x400>;
++ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 813>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ phy-mode = "rmii";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
+ };
+
+ /* External root clock */
diff --git a/patches.renesas/0257-ARM-dts-r8a7745-add-IRQC-support.patch b/patches.renesas/0257-ARM-dts-r8a7745-add-IRQC-support.patch
new file mode 100644
index 0000000..06fdb1a
--- /dev/null
+++ b/patches.renesas/0257-ARM-dts-r8a7745-add-IRQC-support.patch
@@ -0,0 +1,47 @@
+From e9820b57258070c818d42906e2ef8344113d4aac Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 00:59:37 +0300
+Subject: [PATCH 257/299] ARM: dts: r8a7745: add IRQC support
+
+Describe the IRQC interrupt controller in the R8A7745 device tree.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 28c43fbb3ca0a9a8f547aece94dac8d791358444)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7745.dtsi | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7745.dtsi
++++ b/arch/arm/boot/dts/r8a7745.dtsi
+@@ -62,6 +62,25 @@
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
++ irqc: interrupt-controller@e61c0000 {
++ compatible = "renesas,irqc-r8a7745", "renesas,irqc";
++ #interrupt-cells = <2>;
++ interrupt-controller;
++ reg = <0 0xe61c0000 0 0x200>;
++ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
++ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 407>;
++ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
++ };
++
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch b/patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch
new file mode 100644
index 0000000..1be1c37
--- /dev/null
+++ b/patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch
@@ -0,0 +1,75 @@
+From 8fad1644964cb472a5a0def9880db095b5d8629c Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 01:04:32 +0300
+Subject: [PATCH 258/299] ARM: dts: sk-rzg1e: initial device tree
+
+Add the initial device tree for the R8A7745 SoC based SK-RZG1E board.
+The board has 1 debug serial port (SCIF2); include support for it,
+so that the serial console can work.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e9189e66dbdcd9705697c8b283b5b142b87da9aa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1
+ arch/arm/boot/dts/r8a7745-sk-rzg1e.dts | 39 +++++++++++++++++++++++++++++++++
+ 2 files changed, 40 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -679,6 +679,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
+ r8a73a4-ape6evm.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7743-sk-rzg1m.dtb \
++ r8a7745-sk-rzg1e.dtb \
+ r8a7778-bockw.dtb \
+ r8a7779-marzen.dtb \
+ r8a7790-lager.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+@@ -0,0 +1,39 @@
++/*
++ * Device Tree Source for the SK-RZG1E board
++ *
++ * Copyright (C) 2016 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7745.dtsi"
++
++/ {
++ model = "SK-RZG1E";
++ compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
++
++ aliases {
++ serial0 = &scif2;
++ };
++
++ chosen {
++ bootargs = "ignore_loglevel";
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x40000000>;
++ };
++};
++
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
++&scif2 {
++ status = "okay";
++};
diff --git a/patches.renesas/0259-ARM-dts-sk-rzg1e-add-Ether-support.patch b/patches.renesas/0259-ARM-dts-sk-rzg1e-add-Ether-support.patch
new file mode 100644
index 0000000..ff2bc67
--- /dev/null
+++ b/patches.renesas/0259-ARM-dts-sk-rzg1e-add-Ether-support.patch
@@ -0,0 +1,48 @@
+From 19255ec8084ada6370dfec9cdcb9a0ce13183949 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 5 Nov 2016 01:05:28 +0300
+Subject: [PATCH 259/299] ARM: dts: sk-rzg1e: add Ether support
+
+Define the SK-RZG1E board dependent part of the Ether device node.
+Enable DHCP and NFS root for the kernel booting.
+
+Based on the original (and large) patch by Dmitry Shifrin
+<dmitry.shifrin@cogentembedded.com>.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6b334366e63678c777367002eb87c297a10d2751)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7745-sk-rzg1e.dts | 15 ++++++++++++++-
+ 1 file changed, 14 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
++++ b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+@@ -20,7 +20,7 @@
+ };
+
+ chosen {
+- bootargs = "ignore_loglevel";
++ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
+
+@@ -37,3 +37,16 @@
+ &scif2 {
+ status = "okay";
+ };
++
++ðer {
++ phy-handle = <&phy1>;
++ renesas,ether-link-active-low;
++ status = "okay";
++
++ phy1: ethernet-phy@1 {
++ reg = <1>;
++ interrupt-parent = <&irqc>;
++ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
++ micrel,led-mode = <1>;
++ };
++};
diff --git a/patches.renesas/0260-ARM-dts-r8a73a4-Add-device-node-for-PRR.patch b/patches.renesas/0260-ARM-dts-r8a73a4-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..269edaf
--- /dev/null
+++ b/patches.renesas/0260-ARM-dts-r8a73a4-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From 074854a84ebb83ff66294384c8ab0f02df419901 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:09 +0100
+Subject: [PATCH 260/299] ARM: dts: r8a73a4: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f02703320698bf60c81c8b74aeed1e64442f29c5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -751,6 +751,11 @@
+ };
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile";
+ reg = <0 0xe6180000 0 0x8000>, <0 0xe6188000 0 0x8000>;
diff --git a/patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch b/patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..88600bd
--- /dev/null
+++ b/patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From eaf46b2fcf713f2d72e23085183b46ef71c76e79 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:10 +0100
+Subject: [PATCH 261/299] ARM: dts: r8a7779: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9ba368e2226e949e42596cc6027854656f6216a2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -590,6 +590,11 @@
+ };
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0xff000044 4>;
++ };
++
+ rst: reset-controller@ffcc0000 {
+ compatible = "renesas,r8a7779-reset-wdt";
+ reg = <0xffcc0000 0x48>;
diff --git a/patches.renesas/0262-ARM-dts-r8a7790-Add-device-node-for-PRR.patch b/patches.renesas/0262-ARM-dts-r8a7790-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..7514987
--- /dev/null
+++ b/patches.renesas/0262-ARM-dts-r8a7790-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From fdf527ea3202ceb0c972aed9f2017c9ff06afa88 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:11 +0100
+Subject: [PATCH 262/299] ARM: dts: r8a7790: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 328f39b84d4312f3bbc390524f6c6e8be5852500)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -1471,6 +1471,11 @@
+ };
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
++
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7790-rst";
+ reg = <0 0xe6160000 0 0x0100>;
diff --git a/patches.renesas/0263-ARM-dts-r8a7791-Add-device-node-for-PRR.patch b/patches.renesas/0263-ARM-dts-r8a7791-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..f235922
--- /dev/null
+++ b/patches.renesas/0263-ARM-dts-r8a7791-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From 9f9ab1e37c9f69e51da5e272da260c3b1e9a468b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:12 +0100
+Subject: [PATCH 263/299] ARM: dts: r8a7791: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 366cd112025838fbbb1be73b7efd7f70bed33b65)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -1485,6 +1485,11 @@
+ };
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
++
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7791-rst";
+ reg = <0 0xe6160000 0 0x0100>;
diff --git a/patches.renesas/0264-ARM-dts-r8a7792-Add-device-node-for-PRR.patch b/patches.renesas/0264-ARM-dts-r8a7792-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..eae5e11
--- /dev/null
+++ b/patches.renesas/0264-ARM-dts-r8a7792-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From f585f46cfa9ed563e3de33b3de6716550fa6c530 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:13 +0100
+Subject: [PATCH 264/299] ARM: dts: r8a7792: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7cbae74e641761ed117a5a8d903b97a9892a2426)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7792.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7792.dtsi
++++ b/arch/arm/boot/dts/r8a7792.dtsi
+@@ -125,6 +125,11 @@
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7792-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0265-ARM-dts-r8a7793-Add-device-node-for-PRR.patch b/patches.renesas/0265-ARM-dts-r8a7793-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..9f9d883
--- /dev/null
+++ b/patches.renesas/0265-ARM-dts-r8a7793-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From ec4a78b7d7be410222cb39c8757a84e53d20847c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:14 +0100
+Subject: [PATCH 265/299] ARM: dts: r8a7793: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c832999d3af2a9229c1c518997963def42fbaf4b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7793.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7793.dtsi
++++ b/arch/arm/boot/dts/r8a7793.dtsi
+@@ -1311,6 +1311,11 @@
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7793-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0266-ARM-dts-r8a7794-Add-device-node-for-PRR.patch b/patches.renesas/0266-ARM-dts-r8a7794-Add-device-node-for-PRR.patch
new file mode 100644
index 0000000..31bc7e3
--- /dev/null
+++ b/patches.renesas/0266-ARM-dts-r8a7794-Add-device-node-for-PRR.patch
@@ -0,0 +1,30 @@
+From e3abfa99a16595fbe63f7b3d7765159697ab602d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Nov 2016 19:37:15 +0100
+Subject: [PATCH 266/299] ARM: dts: r8a7794: Add device node for PRR
+
+Add a device node for the Product Register, which provides SoC product
+and revision information.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2357adb625f15e7f2b05a1464076c79876563636)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7794.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/r8a7794.dtsi
++++ b/arch/arm/boot/dts/r8a7794.dtsi
+@@ -1382,6 +1382,11 @@
+ reg = <0 0xe6160000 0 0x0100>;
+ };
+
++ prr: chipid@ff000044 {
++ compatible = "renesas,prr";
++ reg = <0 0xff000044 0 4>;
++ };
++
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7794-sysc";
+ reg = <0 0xe6180000 0 0x0200>;
diff --git a/patches.renesas/0267-media-v4l-ctrls-Add-deinterlacing-mode-control.patch b/patches.renesas/0267-media-v4l-ctrls-Add-deinterlacing-mode-control.patch
new file mode 100644
index 0000000..207f2f6
--- /dev/null
+++ b/patches.renesas/0267-media-v4l-ctrls-Add-deinterlacing-mode-control.patch
@@ -0,0 +1,73 @@
+From 7dcbc52ee91271e807daf73208caaf859a3e7a41 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 4 Aug 2016 13:14:02 -0300
+Subject: [PATCH 267/299] [media] v4l: ctrls: Add deinterlacing mode control
+
+The menu control selects the operation mode of a video deinterlacer. The
+menu entries are driver specific.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Reviewed-by: Kieran Bingham <kieran@bingham.xyz>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 446e412597217e937d33296e77eeba7379ab3008)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/media/uapi/v4l/extended-controls.rst | 4 ++++
+ Documentation/media/v4l-drivers/index.rst | 2 ++
+ drivers/media/v4l2-core/v4l2-ctrls.c | 2 ++
+ include/uapi/linux/v4l2-controls.h | 1 +
+ 4 files changed, 9 insertions(+)
+
+--- a/Documentation/media/uapi/v4l/extended-controls.rst
++++ b/Documentation/media/uapi/v4l/extended-controls.rst
+@@ -3017,6 +3017,10 @@ Image Process Control IDs
+ test pattern images. These hardware specific test patterns can be
+ used to test if a device is working properly.
+
++``V4L2_CID_DEINTERLACING_MODE (menu)``
++ The video deinterlacing mode (such as Bob, Weave, ...). The menu items are
++ driver specific and are documented in :ref:`v4l-drivers`.
++
+
+ .. _dv-controls:
+
+--- a/Documentation/media/v4l-drivers/index.rst
++++ b/Documentation/media/v4l-drivers/index.rst
+@@ -2,6 +2,8 @@
+
+ .. include:: <isonum.txt>
+
++.. _v4l-drivers:
++
+ ################################################
+ Video4Linux (V4L) driver-specific documentation
+ ################################################
+--- a/drivers/media/v4l2-core/v4l2-ctrls.c
++++ b/drivers/media/v4l2-core/v4l2-ctrls.c
+@@ -885,6 +885,7 @@ const char *v4l2_ctrl_get_name(u32 id)
+ case V4L2_CID_LINK_FREQ: return "Link Frequency";
+ case V4L2_CID_PIXEL_RATE: return "Pixel Rate";
+ case V4L2_CID_TEST_PATTERN: return "Test Pattern";
++ case V4L2_CID_DEINTERLACING_MODE: return "Deinterlacing Mode";
+
+ /* DV controls */
+ /* Keep the order of the 'case's the same as in v4l2-controls.h! */
+@@ -1058,6 +1059,7 @@ void v4l2_ctrl_fill(u32 id, const char *
+ case V4L2_CID_DV_RX_RGB_RANGE:
+ case V4L2_CID_DV_RX_IT_CONTENT_TYPE:
+ case V4L2_CID_TEST_PATTERN:
++ case V4L2_CID_DEINTERLACING_MODE:
+ case V4L2_CID_TUNE_DEEMPHASIS:
+ case V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL:
+ case V4L2_CID_DETECT_MD_MODE:
+--- a/include/uapi/linux/v4l2-controls.h
++++ b/include/uapi/linux/v4l2-controls.h
+@@ -892,6 +892,7 @@ enum v4l2_jpeg_chroma_subsampling {
+ #define V4L2_CID_LINK_FREQ (V4L2_CID_IMAGE_PROC_CLASS_BASE + 1)
+ #define V4L2_CID_PIXEL_RATE (V4L2_CID_IMAGE_PROC_CLASS_BASE + 2)
+ #define V4L2_CID_TEST_PATTERN (V4L2_CID_IMAGE_PROC_CLASS_BASE + 3)
++#define V4L2_CID_DEINTERLACING_MODE (V4L2_CID_IMAGE_PROC_CLASS_BASE + 4)
+
+
+ /* DV-class control IDs defined by V4L2 */
diff --git a/patches.renesas/0268-media-dt-bindings-Add-Renesas-R-Car-FDP1-bindings.patch b/patches.renesas/0268-media-dt-bindings-Add-Renesas-R-Car-FDP1-bindings.patch
new file mode 100644
index 0000000..7904667
--- /dev/null
+++ b/patches.renesas/0268-media-dt-bindings-Add-Renesas-R-Car-FDP1-bindings.patch
@@ -0,0 +1,61 @@
+From 7e37b15a658319eb90d692ed31a2f6f4d9b72d50 Mon Sep 17 00:00:00 2001
+From: Kieran Bingham <kieran+renesas@bingham.xyz>
+Date: Thu, 30 Jun 2016 13:50:30 -0300
+Subject: [PATCH 268/299] [media] dt-bindings: Add Renesas R-Car FDP1 bindings
+
+The FDP1 is a de-interlacing module which converts interlaced video to
+progressive video. It is also capable of performing pixel format conversion
+between YCbCr/YUV formats and RGB formats.
+
+Signed-off-by: Kieran Bingham <kieran+renesas@bingham.xyz>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 3547d32be04506ad23346eca6ce8b745ef146fab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/media/renesas,fdp1.txt | 37 +++++++++++++++
+ 1 file changed, 37 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
+@@ -0,0 +1,37 @@
++Renesas R-Car Fine Display Processor (FDP1)
++-------------------------------------------
++
++The FDP1 is a de-interlacing module which converts interlaced video to
++progressive video. It is capable of performing pixel format conversion between
++YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as
++an input to the module.
++
++Required properties:
++
++ - compatible: must be "renesas,fdp1"
++ - reg: the register base and size for the device registers
++ - interrupts : interrupt specifier for the FDP1 instance
++ - clocks: reference to the functional clock
++
++Optional properties:
++
++ - power-domains: reference to the power domain that the FDP1 belongs to, if
++ any.
++ - renesas,fcp: a phandle referencing the FCP that handles memory accesses
++ for the FDP1. Not needed on Gen2, mandatory on Gen3.
++
++Please refer to the binding documentation for the clock and/or power domain
++providers for more details.
++
++
++Device node example
++-------------------
++
++ fdp1@fe940000 {
++ compatible = "renesas,fdp1";
++ reg = <0 0xfe940000 0 0x2400>;
++ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&cpg CPG_MOD 119>;
++ power-domains = <&sysc R8A7795_PD_A3VP>;
++ renesas,fcp = <&fcpf0>;
++ };
diff --git a/patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch b/patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch
new file mode 100644
index 0000000..bd7be1a
--- /dev/null
+++ b/patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch
@@ -0,0 +1,2574 @@
+From 9db00c541882ee2e105badf30148265bd9ae6142 Mon Sep 17 00:00:00 2001
+From: Kieran Bingham <kieran+renesas@bingham.xyz>
+Date: Thu, 30 Jun 2016 10:41:23 -0300
+Subject: [PATCH 269/299] [media] v4l: Add Renesas R-Car FDP1 Driver
+
+The FDP1 driver performs advanced de-interlacing on a memory 2 memory
+based video stream, and supports conversion from YCbCr/YUV
+to RGB pixel formats
+
+Signed-off-by: Kieran Bingham <kieran+renesas@bingham.xyz>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit 4710b752e029f3f82dd4a84d9dc61fe72c97bf82)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/media/v4l-drivers/index.rst | 1
+ Documentation/media/v4l-drivers/rcar-fdp1.rst | 37
+ MAINTAINERS | 9
+ drivers/media/platform/Kconfig | 13
+ drivers/media/platform/Makefile | 1
+ drivers/media/platform/rcar_fdp1.c | 2445 ++++++++++++++++++++++++++
+ 6 files changed, 2506 insertions(+)
+ create mode 100644 Documentation/media/v4l-drivers/rcar-fdp1.rst
+ create mode 100644 drivers/media/platform/rcar_fdp1.c
+
+--- a/Documentation/media/v4l-drivers/index.rst
++++ b/Documentation/media/v4l-drivers/index.rst
+@@ -48,6 +48,7 @@ For more details see the file COPYING in
+ pvrusb2
+ pxa_camera
+ radiotrack
++ rcar-fdp1
+ saa7134
+ sh_mobile_ceu_camera
+ si470x
+--- /dev/null
++++ b/Documentation/media/v4l-drivers/rcar-fdp1.rst
+@@ -0,0 +1,37 @@
++Renesas R-Car Fine Display Processor (FDP1) Driver
++==================================================
++
++The R-Car FDP1 driver implements driver-specific controls as follows.
++
++``V4L2_CID_DEINTERLACING_MODE (menu)``
++ The video deinterlacing mode (such as Bob, Weave, ...). The R-Car FDP1
++ driver implements the following modes.
++
++.. flat-table::
++ :header-rows: 0
++ :stub-columns: 0
++ :widths: 1 4
++
++ * - ``"Progressive" (0)``
++ - The input image video stream is progressive (not interlaced). No
++ deinterlacing is performed. Apart from (optional) format and encoding
++ conversion output frames are identical to the input frames.
++ * - ``"Adaptive 2D/3D" (1)``
++ - Motion adaptive version of 2D and 3D deinterlacing. Use 3D deinterlacing
++ in the presence of fast motion and 2D deinterlacing with diagonal
++ interpolation otherwise.
++ * - ``"Fixed 2D" (2)``
++ - The current field is scaled vertically by averaging adjacent lines to
++ recover missing lines. This method is also known as blending or Line
++ Averaging (LAV).
++ * - ``"Fixed 3D" (3)``
++ - The previous and next fields are averaged to recover lines missing from
++ the current field. This method is also known as Field Averaging (FAV).
++ * - ``"Previous field" (4)``
++ - The current field is weaved with the previous field, i.e. the previous
++ field is used to fill missing lines from the current field. This method
++ is also known as weave deinterlacing.
++ * - ``"Next field" (5)``
++ - The current field is weaved with the next field, i.e. the next field is
++ used to fill missing lines from the current field. This method is also
++ known as weave deinterlacing.
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -7734,6 +7734,15 @@ F: Documentation/devicetree/bindings/med
+ F: drivers/media/platform/rcar-fcp.c
+ F: include/media/rcar-fcp.h
+
++MEDIA DRIVERS FOR RENESAS - FDP1
++M: Kieran Bingham <kieran@bingham.xyz>
++L: linux-media@vger.kernel.org
++L: linux-renesas-soc@vger.kernel.org
++T: git git://linuxtv.org/media_tree.git
++S: Supported
++F: Documentation/devicetree/bindings/media/renesas,fdp1.txt
++F: drivers/media/platform/rcar_fdp1.c
++
+ MEDIA DRIVERS FOR RENESAS - VIN
+ M: Niklas Söderlund <niklas.soderlund@ragnatech.se>
+ L: linux-media@vger.kernel.org
+--- a/drivers/media/platform/Kconfig
++++ b/drivers/media/platform/Kconfig
+@@ -290,6 +290,19 @@ config VIDEO_SH_VEU
+ Support for the Video Engine Unit (VEU) on SuperH and
+ SH-Mobile SoCs.
+
++config VIDEO_RENESAS_FDP1
++ tristate "Renesas Fine Display Processor"
++ depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
++ depends on ARCH_SHMOBILE || COMPILE_TEST
++ select VIDEOBUF2_DMA_CONTIG
++ select V4L2_MEM2MEM_DEV
++ ---help---
++ This is a V4L2 driver for the Renesas Fine Display Processor
++ providing colour space conversion, and de-interlacing features.
++
++ To compile this driver as a module, choose M here: the module
++ will be called rcar_fdp1.
++
+ config VIDEO_RENESAS_JPU
+ tristate "Renesas JPEG Processing Unit"
+ depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
+--- a/drivers/media/platform/Makefile
++++ b/drivers/media/platform/Makefile
+@@ -48,6 +48,7 @@ obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o
+ obj-$(CONFIG_SOC_CAMERA) += soc_camera/
+
+ obj-$(CONFIG_VIDEO_RENESAS_FCP) += rcar-fcp.o
++obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o
+ obj-$(CONFIG_VIDEO_RENESAS_JPU) += rcar_jpu.o
+ obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
+
+--- /dev/null
++++ b/drivers/media/platform/rcar_fdp1.c
+@@ -0,0 +1,2445 @@
++/*
++ * Renesas RCar Fine Display Processor
++ *
++ * Video format converter and frame deinterlacer device.
++ *
++ * Author: Kieran Bingham, <kieran@bingham.xyz>
++ * Copyright (c) 2016 Renesas Electronics Corporation.
++ *
++ * This code is developed and inspired from the vim2m, rcar_jpu,
++ * m2m-deinterlace, and vsp1 drivers.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version
++ */
++
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
++#include <linux/sched.h>
++#include <linux/slab.h>
++#include <linux/timer.h>
++#include <media/rcar-fcp.h>
++#include <media/v4l2-ctrls.h>
++#include <media/v4l2-device.h>
++#include <media/v4l2-event.h>
++#include <media/v4l2-ioctl.h>
++#include <media/v4l2-mem2mem.h>
++#include <media/videobuf2-dma-contig.h>
++
++static unsigned int debug;
++module_param(debug, uint, 0644);
++MODULE_PARM_DESC(debug, "activate debug info");
++
++/* Minimum and maximum frame width/height */
++#define FDP1_MIN_W 80U
++#define FDP1_MIN_H 80U
++
++#define FDP1_MAX_W 3840U
++#define FDP1_MAX_H 2160U
++
++#define FDP1_MAX_PLANES 3U
++#define FDP1_MAX_STRIDE 8190U
++
++/* Flags that indicate a format can be used for capture/output */
++#define FDP1_CAPTURE BIT(0)
++#define FDP1_OUTPUT BIT(1)
++
++#define DRIVER_NAME "rcar_fdp1"
++
++/* Number of Job's to have available on the processing queue */
++#define FDP1_NUMBER_JOBS 8
++
++#define dprintk(fdp1, fmt, arg...) \
++ v4l2_dbg(1, debug, &fdp1->v4l2_dev, "%s: " fmt, __func__, ## arg)
++
++/*
++ * FDP1 registers and bits
++ */
++
++/* FDP1 start register - Imm */
++#define FD1_CTL_CMD 0x0000
++#define FD1_CTL_CMD_STRCMD BIT(0)
++
++/* Sync generator register - Imm */
++#define FD1_CTL_SGCMD 0x0004
++#define FD1_CTL_SGCMD_SGEN BIT(0)
++
++/* Register set end register - Imm */
++#define FD1_CTL_REGEND 0x0008
++#define FD1_CTL_REGEND_REGEND BIT(0)
++
++/* Channel activation register - Vupdt */
++#define FD1_CTL_CHACT 0x000c
++#define FD1_CTL_CHACT_SMW BIT(9)
++#define FD1_CTL_CHACT_WR BIT(8)
++#define FD1_CTL_CHACT_SMR BIT(3)
++#define FD1_CTL_CHACT_RD2 BIT(2)
++#define FD1_CTL_CHACT_RD1 BIT(1)
++#define FD1_CTL_CHACT_RD0 BIT(0)
++
++/* Operation Mode Register - Vupdt */
++#define FD1_CTL_OPMODE 0x0010
++#define FD1_CTL_OPMODE_PRG BIT(4)
++#define FD1_CTL_OPMODE_VIMD_INTERRUPT (0 << 0)
++#define FD1_CTL_OPMODE_VIMD_BESTEFFORT (1 << 0)
++#define FD1_CTL_OPMODE_VIMD_NOINTERRUPT (2 << 0)
++
++#define FD1_CTL_VPERIOD 0x0014
++#define FD1_CTL_CLKCTRL 0x0018
++#define FD1_CTL_CLKCTRL_CSTP_N BIT(0)
++
++/* Software reset register */
++#define FD1_CTL_SRESET 0x001c
++#define FD1_CTL_SRESET_SRST BIT(0)
++
++/* Control status register (V-update-status) */
++#define FD1_CTL_STATUS 0x0024
++#define FD1_CTL_STATUS_VINT_CNT_MASK GENMASK(31, 16)
++#define FD1_CTL_STATUS_VINT_CNT_SHIFT 16
++#define FD1_CTL_STATUS_SGREGSET BIT(10)
++#define FD1_CTL_STATUS_SGVERR BIT(9)
++#define FD1_CTL_STATUS_SGFREND BIT(8)
++#define FD1_CTL_STATUS_BSY BIT(0)
++
++#define FD1_CTL_VCYCLE_STAT 0x0028
++
++/* Interrupt enable register */
++#define FD1_CTL_IRQENB 0x0038
++/* Interrupt status register */
++#define FD1_CTL_IRQSTA 0x003c
++/* Interrupt control register */
++#define FD1_CTL_IRQFSET 0x0040
++
++/* Common IRQ Bit settings */
++#define FD1_CTL_IRQ_VERE BIT(16)
++#define FD1_CTL_IRQ_VINTE BIT(4)
++#define FD1_CTL_IRQ_FREE BIT(0)
++#define FD1_CTL_IRQ_MASK (FD1_CTL_IRQ_VERE | \
++ FD1_CTL_IRQ_VINTE | \
++ FD1_CTL_IRQ_FREE)
++
++/* RPF */
++#define FD1_RPF_SIZE 0x0060
++#define FD1_RPF_SIZE_MASK GENMASK(12, 0)
++#define FD1_RPF_SIZE_H_SHIFT 16
++#define FD1_RPF_SIZE_V_SHIFT 0
++
++#define FD1_RPF_FORMAT 0x0064
++#define FD1_RPF_FORMAT_CIPM BIT(16)
++#define FD1_RPF_FORMAT_RSPYCS BIT(13)
++#define FD1_RPF_FORMAT_RSPUVS BIT(12)
++#define FD1_RPF_FORMAT_CF BIT(8)
++
++#define FD1_RPF_PSTRIDE 0x0068
++#define FD1_RPF_PSTRIDE_Y_SHIFT 16
++#define FD1_RPF_PSTRIDE_C_SHIFT 0
++
++/* RPF0 Source Component Y Address register */
++#define FD1_RPF0_ADDR_Y 0x006c
++
++/* RPF1 Current Picture Registers */
++#define FD1_RPF1_ADDR_Y 0x0078
++#define FD1_RPF1_ADDR_C0 0x007c
++#define FD1_RPF1_ADDR_C1 0x0080
++
++/* RPF2 next picture register */
++#define FD1_RPF2_ADDR_Y 0x0084
++
++#define FD1_RPF_SMSK_ADDR 0x0090
++#define FD1_RPF_SWAP 0x0094
++
++/* WPF */
++#define FD1_WPF_FORMAT 0x00c0
++#define FD1_WPF_FORMAT_PDV_SHIFT 24
++#define FD1_WPF_FORMAT_FCNL BIT(20)
++#define FD1_WPF_FORMAT_WSPYCS BIT(15)
++#define FD1_WPF_FORMAT_WSPUVS BIT(14)
++#define FD1_WPF_FORMAT_WRTM_601_16 (0 << 9)
++#define FD1_WPF_FORMAT_WRTM_601_0 (1 << 9)
++#define FD1_WPF_FORMAT_WRTM_709_16 (2 << 9)
++#define FD1_WPF_FORMAT_CSC BIT(8)
++
++#define FD1_WPF_RNDCTL 0x00c4
++#define FD1_WPF_RNDCTL_CBRM BIT(28)
++#define FD1_WPF_RNDCTL_CLMD_NOCLIP (0 << 12)
++#define FD1_WPF_RNDCTL_CLMD_CLIP_16_235 (1 << 12)
++#define FD1_WPF_RNDCTL_CLMD_CLIP_1_254 (2 << 12)
++
++#define FD1_WPF_PSTRIDE 0x00c8
++#define FD1_WPF_PSTRIDE_Y_SHIFT 16
++#define FD1_WPF_PSTRIDE_C_SHIFT 0
++
++/* WPF Destination picture */
++#define FD1_WPF_ADDR_Y 0x00cc
++#define FD1_WPF_ADDR_C0 0x00d0
++#define FD1_WPF_ADDR_C1 0x00d4
++#define FD1_WPF_SWAP 0x00d8
++#define FD1_WPF_SWAP_OSWAP_SHIFT 0
++#define FD1_WPF_SWAP_SSWAP_SHIFT 4
++
++/* WPF/RPF Common */
++#define FD1_RWPF_SWAP_BYTE BIT(0)
++#define FD1_RWPF_SWAP_WORD BIT(1)
++#define FD1_RWPF_SWAP_LWRD BIT(2)
++#define FD1_RWPF_SWAP_LLWD BIT(3)
++
++/* IPC */
++#define FD1_IPC_MODE 0x0100
++#define FD1_IPC_MODE_DLI BIT(8)
++#define FD1_IPC_MODE_DIM_ADAPT2D3D (0 << 0)
++#define FD1_IPC_MODE_DIM_FIXED2D (1 << 0)
++#define FD1_IPC_MODE_DIM_FIXED3D (2 << 0)
++#define FD1_IPC_MODE_DIM_PREVFIELD (3 << 0)
++#define FD1_IPC_MODE_DIM_NEXTFIELD (4 << 0)
++
++#define FD1_IPC_SMSK_THRESH 0x0104
++#define FD1_IPC_SMSK_THRESH_CONST 0x00010002
++
++#define FD1_IPC_COMB_DET 0x0108
++#define FD1_IPC_COMB_DET_CONST 0x00200040
++
++#define FD1_IPC_MOTDEC 0x010c
++#define FD1_IPC_MOTDEC_CONST 0x00008020
++
++/* DLI registers */
++#define FD1_IPC_DLI_BLEND 0x0120
++#define FD1_IPC_DLI_BLEND_CONST 0x0080ff02
++
++#define FD1_IPC_DLI_HGAIN 0x0124
++#define FD1_IPC_DLI_HGAIN_CONST 0x001000ff
++
++#define FD1_IPC_DLI_SPRS 0x0128
++#define FD1_IPC_DLI_SPRS_CONST 0x009004ff
++
++#define FD1_IPC_DLI_ANGLE 0x012c
++#define FD1_IPC_DLI_ANGLE_CONST 0x0004080c
++
++#define FD1_IPC_DLI_ISOPIX0 0x0130
++#define FD1_IPC_DLI_ISOPIX0_CONST 0xff10ff10
++
++#define FD1_IPC_DLI_ISOPIX1 0x0134
++#define FD1_IPC_DLI_ISOPIX1_CONST 0x0000ff10
++
++/* Sensor registers */
++#define FD1_IPC_SENSOR_TH0 0x0140
++#define FD1_IPC_SENSOR_TH0_CONST 0x20208080
++
++#define FD1_IPC_SENSOR_TH1 0x0144
++#define FD1_IPC_SENSOR_TH1_CONST 0
++
++#define FD1_IPC_SENSOR_CTL0 0x0170
++#define FD1_IPC_SENSOR_CTL0_CONST 0x00002201
++
++#define FD1_IPC_SENSOR_CTL1 0x0174
++#define FD1_IPC_SENSOR_CTL1_CONST 0
++
++#define FD1_IPC_SENSOR_CTL2 0x0178
++#define FD1_IPC_SENSOR_CTL2_X_SHIFT 16
++#define FD1_IPC_SENSOR_CTL2_Y_SHIFT 0
++
++#define FD1_IPC_SENSOR_CTL3 0x017c
++#define FD1_IPC_SENSOR_CTL3_0_SHIFT 16
++#define FD1_IPC_SENSOR_CTL3_1_SHIFT 0
++
++/* Line memory pixel number register */
++#define FD1_IPC_LMEM 0x01e0
++#define FD1_IPC_LMEM_LINEAR 1024
++#define FD1_IPC_LMEM_TILE 960
++
++/* Internal Data (HW Version) */
++#define FD1_IP_INTDATA 0x0800
++#define FD1_IP_H3 0x02010101
++#define FD1_IP_M3W 0x02010202
++
++/* LUTs */
++#define FD1_LUT_DIF_ADJ 0x1000
++#define FD1_LUT_SAD_ADJ 0x1400
++#define FD1_LUT_BLD_GAIN 0x1800
++#define FD1_LUT_DIF_GAIN 0x1c00
++#define FD1_LUT_MDET 0x2000
++
++/**
++ * struct fdp1_fmt - The FDP1 internal format data
++ * @fourcc: the fourcc code, to match the V4L2 API
++ * @bpp: bits per pixel per plane
++ * @num_planes: number of planes
++ * @hsub: horizontal subsampling factor
++ * @vsub: vertical subsampling factor
++ * @fmt: 7-bit format code for the fdp1 hardware
++ * @swap_yc: the Y and C components are swapped (Y comes before C)
++ * @swap_uv: the U and V components are swapped (V comes before U)
++ * @swap: swap register control
++ * @types: types of queue this format is applicable to
++ */
++struct fdp1_fmt {
++ u32 fourcc;
++ u8 bpp[3];
++ u8 num_planes;
++ u8 hsub;
++ u8 vsub;
++ u8 fmt;
++ bool swap_yc;
++ bool swap_uv;
++ u8 swap;
++ u8 types;
++};
++
++static const struct fdp1_fmt fdp1_formats[] = {
++ /* RGB formats are only supported by the Write Pixel Formatter */
++
++ { V4L2_PIX_FMT_RGB332, { 8, 0, 0 }, 1, 1, 1, 0x00, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_XRGB444, { 16, 0, 0 }, 1, 1, 1, 0x01, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_XRGB555, { 16, 0, 0 }, 1, 1, 1, 0x04, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_RGB565, { 16, 0, 0 }, 1, 1, 1, 0x06, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_ABGR32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_XBGR32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_ARGB32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_XRGB32, { 32, 0, 0 }, 1, 1, 1, 0x13, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_RGB24, { 24, 0, 0 }, 1, 1, 1, 0x15, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_BGR24, { 24, 0, 0 }, 1, 1, 1, 0x18, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_ARGB444, { 16, 0, 0 }, 1, 1, 1, 0x19, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD,
++ FDP1_CAPTURE },
++ { V4L2_PIX_FMT_ARGB555, { 16, 0, 0 }, 1, 1, 1, 0x1b, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD,
++ FDP1_CAPTURE },
++
++ /* YUV Formats are supported by Read and Write Pixel Formatters */
++
++ { V4L2_PIX_FMT_NV16M, { 8, 16, 0 }, 2, 2, 1, 0x41, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_NV61M, { 8, 16, 0 }, 2, 2, 1, 0x41, false, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_NV12M, { 8, 16, 0 }, 2, 2, 2, 0x42, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_NV21M, { 8, 16, 0 }, 2, 2, 2, 0x42, false, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_UYVY, { 16, 0, 0 }, 1, 2, 1, 0x47, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_VYUY, { 16, 0, 0 }, 1, 2, 1, 0x47, false, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YUYV, { 16, 0, 0 }, 1, 2, 1, 0x47, true, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YVYU, { 16, 0, 0 }, 1, 2, 1, 0x47, true, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YUV444M, { 8, 8, 8 }, 3, 1, 1, 0x4a, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YVU444M, { 8, 8, 8 }, 3, 1, 1, 0x4a, false, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YUV422M, { 8, 8, 8 }, 3, 2, 1, 0x4b, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YVU422M, { 8, 8, 8 }, 3, 2, 1, 0x4b, false, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YUV420M, { 8, 8, 8 }, 3, 2, 2, 0x4c, false, false,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++ { V4L2_PIX_FMT_YVU420M, { 8, 8, 8 }, 3, 2, 2, 0x4c, false, true,
++ FD1_RWPF_SWAP_LLWD | FD1_RWPF_SWAP_LWRD |
++ FD1_RWPF_SWAP_WORD | FD1_RWPF_SWAP_BYTE,
++ FDP1_CAPTURE | FDP1_OUTPUT },
++};
++
++static int fdp1_fmt_is_rgb(const struct fdp1_fmt *fmt)
++{
++ return fmt->fmt <= 0x1b; /* Last RGB code */
++}
++
++/*
++ * FDP1 Lookup tables range from 0...255 only
++ *
++ * Each table must be less than 256 entries, and all tables
++ * are padded out to 256 entries by duplicating the last value.
++ */
++static const u8 fdp1_diff_adj[] = {
++ 0x00, 0x24, 0x43, 0x5e, 0x76, 0x8c, 0x9e, 0xaf,
++ 0xbd, 0xc9, 0xd4, 0xdd, 0xe4, 0xea, 0xef, 0xf3,
++ 0xf6, 0xf9, 0xfb, 0xfc, 0xfd, 0xfe, 0xfe, 0xff,
++};
++
++static const u8 fdp1_sad_adj[] = {
++ 0x00, 0x24, 0x43, 0x5e, 0x76, 0x8c, 0x9e, 0xaf,
++ 0xbd, 0xc9, 0xd4, 0xdd, 0xe4, 0xea, 0xef, 0xf3,
++ 0xf6, 0xf9, 0xfb, 0xfc, 0xfd, 0xfe, 0xfe, 0xff,
++};
++
++static const u8 fdp1_bld_gain[] = {
++ 0x80,
++};
++
++static const u8 fdp1_dif_gain[] = {
++ 0x80,
++};
++
++static const u8 fdp1_mdet[] = {
++ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
++ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
++ 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
++ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
++ 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
++ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
++ 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
++ 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
++ 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
++ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
++ 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
++ 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
++ 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
++ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
++ 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
++ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
++ 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
++ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
++ 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
++ 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
++ 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
++ 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
++ 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
++ 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
++ 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
++ 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
++ 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
++ 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
++ 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
++ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
++ 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff
++};
++
++/* Per-queue, driver-specific private data */
++struct fdp1_q_data {
++ const struct fdp1_fmt *fmt;
++ struct v4l2_pix_format_mplane format;
++
++ unsigned int vsize;
++ unsigned int stride_y;
++ unsigned int stride_c;
++};
++
++static const struct fdp1_fmt *fdp1_find_format(u32 pixelformat)
++{
++ const struct fdp1_fmt *fmt;
++ unsigned int i;
++
++ for (i = 0; i < ARRAY_SIZE(fdp1_formats); i++) {
++ fmt = &fdp1_formats[i];
++ if (fmt->fourcc == pixelformat)
++ return fmt;
++ }
++
++ return NULL;
++}
++
++enum fdp1_deint_mode {
++ FDP1_PROGRESSIVE = 0, /* Must be zero when !deinterlacing */
++ FDP1_ADAPT2D3D,
++ FDP1_FIXED2D,
++ FDP1_FIXED3D,
++ FDP1_PREVFIELD,
++ FDP1_NEXTFIELD,
++};
++
++#define FDP1_DEINT_MODE_USES_NEXT(mode) \
++ (mode == FDP1_ADAPT2D3D || \
++ mode == FDP1_FIXED3D || \
++ mode == FDP1_NEXTFIELD)
++
++#define FDP1_DEINT_MODE_USES_PREV(mode) \
++ (mode == FDP1_ADAPT2D3D || \
++ mode == FDP1_FIXED3D || \
++ mode == FDP1_PREVFIELD)
++
++/*
++ * FDP1 operates on potentially 3 fields, which are tracked
++ * from the VB buffers using this context structure.
++ * Will always be a field or a full frame, never two fields.
++ */
++struct fdp1_field_buffer {
++ struct vb2_v4l2_buffer *vb;
++ dma_addr_t addrs[3];
++
++ /* Should be NONE:TOP:BOTTOM only */
++ enum v4l2_field field;
++
++ /* Flag to indicate this is the last field in the vb */
++ bool last_field;
++
++ /* Buffer queue lists */
++ struct list_head list;
++};
++
++struct fdp1_buffer {
++ struct v4l2_m2m_buffer m2m_buf;
++ struct fdp1_field_buffer fields[2];
++ unsigned int num_fields;
++};
++
++static inline struct fdp1_buffer *to_fdp1_buffer(struct vb2_v4l2_buffer *vb)
++{
++ return container_of(vb, struct fdp1_buffer, m2m_buf.vb);
++}
++
++struct fdp1_job {
++ struct fdp1_field_buffer *previous;
++ struct fdp1_field_buffer *active;
++ struct fdp1_field_buffer *next;
++ struct fdp1_field_buffer *dst;
++
++ /* A job can only be on one list at a time */
++ struct list_head list;
++};
++
++struct fdp1_dev {
++ struct v4l2_device v4l2_dev;
++ struct video_device vfd;
++
++ struct mutex dev_mutex;
++ spinlock_t irqlock;
++ spinlock_t device_process_lock;
++
++ void __iomem *regs;
++ unsigned int irq;
++ struct device *dev;
++
++ /* Job Queues */
++ struct fdp1_job jobs[FDP1_NUMBER_JOBS];
++ struct list_head free_job_list;
++ struct list_head queued_job_list;
++ struct list_head hw_job_list;
++
++ unsigned int clk_rate;
++
++ struct rcar_fcp_device *fcp;
++ struct v4l2_m2m_dev *m2m_dev;
++};
++
++struct fdp1_ctx {
++ struct v4l2_fh fh;
++ struct fdp1_dev *fdp1;
++
++ struct v4l2_ctrl_handler hdl;
++ unsigned int sequence;
++
++ /* Processed buffers in this transaction */
++ u8 num_processed;
++
++ /* Transaction length (i.e. how many buffers per transaction) */
++ u32 translen;
++
++ /* Abort requested by m2m */
++ int aborting;
++
++ /* Deinterlace processing mode */
++ enum fdp1_deint_mode deint_mode;
++
++ /*
++ * Adaptive 2D/3D mode uses a shared mask
++ * This is allocated at streamon, if the ADAPT2D3D mode
++ * is requested
++ */
++ unsigned int smsk_size;
++ dma_addr_t smsk_addr[2];
++ void *smsk_cpu;
++
++ /* Capture pipeline, can specify an alpha value
++ * for supported formats. 0-255 only
++ */
++ unsigned char alpha;
++
++ /* Source and destination queue data */
++ struct fdp1_q_data out_q; /* HW Source */
++ struct fdp1_q_data cap_q; /* HW Destination */
++
++ /*
++ * Field Queues
++ * Interlaced fields are used on 3 occasions, and tracked in this list.
++ *
++ * V4L2 Buffers are tracked inside the fdp1_buffer
++ * and released when the last 'field' completes
++ */
++ struct list_head fields_queue;
++ unsigned int buffers_queued;
++
++ /*
++ * For de-interlacing we need to track our previous buffer
++ * while preparing our job lists.
++ */
++ struct fdp1_field_buffer *previous;
++};
++
++static inline struct fdp1_ctx *fh_to_ctx(struct v4l2_fh *fh)
++{
++ return container_of(fh, struct fdp1_ctx, fh);
++}
++
++static struct fdp1_q_data *get_q_data(struct fdp1_ctx *ctx,
++ enum v4l2_buf_type type)
++{
++ if (V4L2_TYPE_IS_OUTPUT(type))
++ return &ctx->out_q;
++ else
++ return &ctx->cap_q;
++}
++
++/*
++ * list_remove_job: Take the first item off the specified job list
++ *
++ * Returns: pointer to a job, or NULL if the list is empty.
++ */
++static struct fdp1_job *list_remove_job(struct fdp1_dev *fdp1,
++ struct list_head *list)
++{
++ struct fdp1_job *job;
++ unsigned long flags;
++
++ spin_lock_irqsave(&fdp1->irqlock, flags);
++ job = list_first_entry_or_null(list, struct fdp1_job, list);
++ if (job)
++ list_del(&job->list);
++ spin_unlock_irqrestore(&fdp1->irqlock, flags);
++
++ return job;
++}
++
++/*
++ * list_add_job: Add a job to the specified job list
++ *
++ * Returns: void - always succeeds
++ */
++static void list_add_job(struct fdp1_dev *fdp1,
++ struct list_head *list,
++ struct fdp1_job *job)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&fdp1->irqlock, flags);
++ list_add_tail(&job->list, list);
++ spin_unlock_irqrestore(&fdp1->irqlock, flags);
++}
++
++static struct fdp1_job *fdp1_job_alloc(struct fdp1_dev *fdp1)
++{
++ return list_remove_job(fdp1, &fdp1->free_job_list);
++}
++
++static void fdp1_job_free(struct fdp1_dev *fdp1, struct fdp1_job *job)
++{
++ /* Ensure that all residue from previous jobs is gone */
++ memset(job, 0, sizeof(struct fdp1_job));
++
++ list_add_job(fdp1, &fdp1->free_job_list, job);
++}
++
++static void queue_job(struct fdp1_dev *fdp1, struct fdp1_job *job)
++{
++ list_add_job(fdp1, &fdp1->queued_job_list, job);
++}
++
++static struct fdp1_job *get_queued_job(struct fdp1_dev *fdp1)
++{
++ return list_remove_job(fdp1, &fdp1->queued_job_list);
++}
++
++static void queue_hw_job(struct fdp1_dev *fdp1, struct fdp1_job *job)
++{
++ list_add_job(fdp1, &fdp1->hw_job_list, job);
++}
++
++static struct fdp1_job *get_hw_queued_job(struct fdp1_dev *fdp1)
++{
++ return list_remove_job(fdp1, &fdp1->hw_job_list);
++}
++
++/*
++ * Buffer lists handling
++ */
++static void fdp1_field_complete(struct fdp1_ctx *ctx,
++ struct fdp1_field_buffer *fbuf)
++{
++ /* job->previous may be on the first field */
++ if (!fbuf)
++ return;
++
++ if (fbuf->last_field)
++ v4l2_m2m_buf_done(fbuf->vb, VB2_BUF_STATE_DONE);
++}
++
++static void fdp1_queue_field(struct fdp1_ctx *ctx,
++ struct fdp1_field_buffer *fbuf)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
++ list_add_tail(&fbuf->list, &ctx->fields_queue);
++ spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
++
++ ctx->buffers_queued++;
++}
++
++static struct fdp1_field_buffer *fdp1_dequeue_field(struct fdp1_ctx *ctx)
++{
++ struct fdp1_field_buffer *fbuf;
++ unsigned long flags;
++
++ ctx->buffers_queued--;
++
++ spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
++ fbuf = list_first_entry_or_null(&ctx->fields_queue,
++ struct fdp1_field_buffer, list);
++ if (fbuf)
++ list_del(&fbuf->list);
++ spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
++
++ return fbuf;
++}
++
++/*
++ * Return the next field in the queue - or NULL,
++ * without removing the item from the list
++ */
++static struct fdp1_field_buffer *fdp1_peek_queued_field(struct fdp1_ctx *ctx)
++{
++ struct fdp1_field_buffer *fbuf;
++ unsigned long flags;
++
++ spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
++ fbuf = list_first_entry_or_null(&ctx->fields_queue,
++ struct fdp1_field_buffer, list);
++ spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
++
++ return fbuf;
++}
++
++static u32 fdp1_read(struct fdp1_dev *fdp1, unsigned int reg)
++{
++ u32 value = ioread32(fdp1->regs + reg);
++
++ if (debug >= 2)
++ dprintk(fdp1, "Read 0x%08x from 0x%04x\n", value, reg);
++
++ return value;
++}
++
++static void fdp1_write(struct fdp1_dev *fdp1, u32 val, unsigned int reg)
++{
++ if (debug >= 2)
++ dprintk(fdp1, "Write 0x%08x to 0x%04x\n", val, reg);
++
++ iowrite32(val, fdp1->regs + reg);
++}
++
++/* IPC registers are to be programmed with constant values */
++static void fdp1_set_ipc_dli(struct fdp1_ctx *ctx)
++{
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++
++ fdp1_write(fdp1, FD1_IPC_SMSK_THRESH_CONST, FD1_IPC_SMSK_THRESH);
++ fdp1_write(fdp1, FD1_IPC_COMB_DET_CONST, FD1_IPC_COMB_DET);
++ fdp1_write(fdp1, FD1_IPC_MOTDEC_CONST, FD1_IPC_MOTDEC);
++
++ fdp1_write(fdp1, FD1_IPC_DLI_BLEND_CONST, FD1_IPC_DLI_BLEND);
++ fdp1_write(fdp1, FD1_IPC_DLI_HGAIN_CONST, FD1_IPC_DLI_HGAIN);
++ fdp1_write(fdp1, FD1_IPC_DLI_SPRS_CONST, FD1_IPC_DLI_SPRS);
++ fdp1_write(fdp1, FD1_IPC_DLI_ANGLE_CONST, FD1_IPC_DLI_ANGLE);
++ fdp1_write(fdp1, FD1_IPC_DLI_ISOPIX0_CONST, FD1_IPC_DLI_ISOPIX0);
++ fdp1_write(fdp1, FD1_IPC_DLI_ISOPIX1_CONST, FD1_IPC_DLI_ISOPIX1);
++}
++
++
++static void fdp1_set_ipc_sensor(struct fdp1_ctx *ctx)
++{
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ struct fdp1_q_data *src_q_data = &ctx->out_q;
++ unsigned int x0, x1;
++ unsigned int hsize = src_q_data->format.width;
++ unsigned int vsize = src_q_data->format.height;
++
++ x0 = hsize / 3;
++ x1 = 2 * hsize / 3;
++
++ fdp1_write(fdp1, FD1_IPC_SENSOR_TH0_CONST, FD1_IPC_SENSOR_TH0);
++ fdp1_write(fdp1, FD1_IPC_SENSOR_TH1_CONST, FD1_IPC_SENSOR_TH1);
++ fdp1_write(fdp1, FD1_IPC_SENSOR_CTL0_CONST, FD1_IPC_SENSOR_CTL0);
++ fdp1_write(fdp1, FD1_IPC_SENSOR_CTL1_CONST, FD1_IPC_SENSOR_CTL1);
++
++ fdp1_write(fdp1, ((hsize - 1) << FD1_IPC_SENSOR_CTL2_X_SHIFT) |
++ ((vsize - 1) << FD1_IPC_SENSOR_CTL2_Y_SHIFT),
++ FD1_IPC_SENSOR_CTL2);
++
++ fdp1_write(fdp1, (x0 << FD1_IPC_SENSOR_CTL3_0_SHIFT) |
++ (x1 << FD1_IPC_SENSOR_CTL3_1_SHIFT),
++ FD1_IPC_SENSOR_CTL3);
++}
++
++/*
++ * fdp1_write_lut: Write a padded LUT to the hw
++ *
++ * FDP1 uses constant data for de-interlacing processing,
++ * with large tables. These hardware tables are all 256 bytes
++ * long, however they often contain repeated data at the end.
++ *
++ * The last byte of the table is written to all remaining entries.
++ */
++static void fdp1_write_lut(struct fdp1_dev *fdp1, const u8 *lut,
++ unsigned int len, unsigned int base)
++{
++ unsigned int i;
++ u8 pad;
++
++ /* Tables larger than the hw are clipped */
++ len = min(len, 256u);
++
++ for (i = 0; i < len; i++)
++ fdp1_write(fdp1, lut[i], base + (i*4));
++
++ /* Tables are padded with the last entry */
++ pad = lut[i-1];
++
++ for (; i < 256; i++)
++ fdp1_write(fdp1, pad, base + (i*4));
++}
++
++static void fdp1_set_lut(struct fdp1_dev *fdp1)
++{
++ fdp1_write_lut(fdp1, fdp1_diff_adj, ARRAY_SIZE(fdp1_diff_adj),
++ FD1_LUT_DIF_ADJ);
++ fdp1_write_lut(fdp1, fdp1_sad_adj, ARRAY_SIZE(fdp1_sad_adj),
++ FD1_LUT_SAD_ADJ);
++ fdp1_write_lut(fdp1, fdp1_bld_gain, ARRAY_SIZE(fdp1_bld_gain),
++ FD1_LUT_BLD_GAIN);
++ fdp1_write_lut(fdp1, fdp1_dif_gain, ARRAY_SIZE(fdp1_dif_gain),
++ FD1_LUT_DIF_GAIN);
++ fdp1_write_lut(fdp1, fdp1_mdet, ARRAY_SIZE(fdp1_mdet),
++ FD1_LUT_MDET);
++}
++
++static void fdp1_configure_rpf(struct fdp1_ctx *ctx,
++ struct fdp1_job *job)
++{
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ u32 picture_size;
++ u32 pstride;
++ u32 format;
++ u32 smsk_addr;
++
++ struct fdp1_q_data *q_data = &ctx->out_q;
++
++ /* Picture size is common to Source and Destination frames */
++ picture_size = (q_data->format.width << FD1_RPF_SIZE_H_SHIFT)
++ | (q_data->vsize << FD1_RPF_SIZE_V_SHIFT);
++
++ /* Strides */
++ pstride = q_data->stride_y << FD1_RPF_PSTRIDE_Y_SHIFT;
++ if (q_data->format.num_planes > 1)
++ pstride |= q_data->stride_c << FD1_RPF_PSTRIDE_C_SHIFT;
++
++ /* Format control */
++ format = q_data->fmt->fmt;
++ if (q_data->fmt->swap_yc)
++ format |= FD1_RPF_FORMAT_RSPYCS;
++
++ if (q_data->fmt->swap_uv)
++ format |= FD1_RPF_FORMAT_RSPUVS;
++
++ if (job->active->field == V4L2_FIELD_BOTTOM) {
++ format |= FD1_RPF_FORMAT_CF; /* Set for Bottom field */
++ smsk_addr = ctx->smsk_addr[0];
++ } else {
++ smsk_addr = ctx->smsk_addr[1];
++ }
++
++ /* Deint mode is non-zero when deinterlacing */
++ if (ctx->deint_mode)
++ format |= FD1_RPF_FORMAT_CIPM;
++
++ fdp1_write(fdp1, format, FD1_RPF_FORMAT);
++ fdp1_write(fdp1, q_data->fmt->swap, FD1_RPF_SWAP);
++ fdp1_write(fdp1, picture_size, FD1_RPF_SIZE);
++ fdp1_write(fdp1, pstride, FD1_RPF_PSTRIDE);
++ fdp1_write(fdp1, smsk_addr, FD1_RPF_SMSK_ADDR);
++
++ /* Previous Field Channel (CH0) */
++ if (job->previous)
++ fdp1_write(fdp1, job->previous->addrs[0], FD1_RPF0_ADDR_Y);
++
++ /* Current Field Channel (CH1) */
++ fdp1_write(fdp1, job->active->addrs[0], FD1_RPF1_ADDR_Y);
++ fdp1_write(fdp1, job->active->addrs[1], FD1_RPF1_ADDR_C0);
++ fdp1_write(fdp1, job->active->addrs[2], FD1_RPF1_ADDR_C1);
++
++ /* Next Field Channel (CH2) */
++ if (job->next)
++ fdp1_write(fdp1, job->next->addrs[0], FD1_RPF2_ADDR_Y);
++}
++
++static void fdp1_configure_wpf(struct fdp1_ctx *ctx,
++ struct fdp1_job *job)
++{
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ struct fdp1_q_data *src_q_data = &ctx->out_q;
++ struct fdp1_q_data *q_data = &ctx->cap_q;
++ u32 pstride;
++ u32 format;
++ u32 swap;
++ u32 rndctl;
++
++ pstride = q_data->format.plane_fmt[0].bytesperline
++ << FD1_WPF_PSTRIDE_Y_SHIFT;
++
++ if (q_data->format.num_planes > 1)
++ pstride |= q_data->format.plane_fmt[1].bytesperline
++ << FD1_WPF_PSTRIDE_C_SHIFT;
++
++ format = q_data->fmt->fmt; /* Output Format Code */
++
++ if (q_data->fmt->swap_yc)
++ format |= FD1_WPF_FORMAT_WSPYCS;
++
++ if (q_data->fmt->swap_uv)
++ format |= FD1_WPF_FORMAT_WSPUVS;
++
++ if (fdp1_fmt_is_rgb(q_data->fmt)) {
++ /* Enable Colour Space conversion */
++ format |= FD1_WPF_FORMAT_CSC;
++
++ /* Set WRTM */
++ if (src_q_data->format.ycbcr_enc == V4L2_YCBCR_ENC_709)
++ format |= FD1_WPF_FORMAT_WRTM_709_16;
++ else if (src_q_data->format.quantization ==
++ V4L2_QUANTIZATION_FULL_RANGE)
++ format |= FD1_WPF_FORMAT_WRTM_601_0;
++ else
++ format |= FD1_WPF_FORMAT_WRTM_601_16;
++ }
++
++ /* Set an alpha value into the Pad Value */
++ format |= ctx->alpha << FD1_WPF_FORMAT_PDV_SHIFT;
++
++ /* Determine picture rounding and clipping */
++ rndctl = FD1_WPF_RNDCTL_CBRM; /* Rounding Off */
++ rndctl |= FD1_WPF_RNDCTL_CLMD_NOCLIP;
++
++ /* WPF Swap needs both ISWAP and OSWAP setting */
++ swap = q_data->fmt->swap << FD1_WPF_SWAP_OSWAP_SHIFT;
++ swap |= src_q_data->fmt->swap << FD1_WPF_SWAP_SSWAP_SHIFT;
++
++ fdp1_write(fdp1, format, FD1_WPF_FORMAT);
++ fdp1_write(fdp1, rndctl, FD1_WPF_RNDCTL);
++ fdp1_write(fdp1, swap, FD1_WPF_SWAP);
++ fdp1_write(fdp1, pstride, FD1_WPF_PSTRIDE);
++
++ fdp1_write(fdp1, job->dst->addrs[0], FD1_WPF_ADDR_Y);
++ fdp1_write(fdp1, job->dst->addrs[1], FD1_WPF_ADDR_C0);
++ fdp1_write(fdp1, job->dst->addrs[2], FD1_WPF_ADDR_C1);
++}
++
++static void fdp1_configure_deint_mode(struct fdp1_ctx *ctx,
++ struct fdp1_job *job)
++{
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ u32 opmode = FD1_CTL_OPMODE_VIMD_NOINTERRUPT;
++ u32 ipcmode = FD1_IPC_MODE_DLI; /* Always set */
++ u32 channels = FD1_CTL_CHACT_WR | FD1_CTL_CHACT_RD1; /* Always on */
++
++ /* De-interlacing Mode */
++ switch (ctx->deint_mode) {
++ default:
++ case FDP1_PROGRESSIVE:
++ dprintk(fdp1, "Progressive Mode\n");
++ opmode |= FD1_CTL_OPMODE_PRG;
++ ipcmode |= FD1_IPC_MODE_DIM_FIXED2D;
++ break;
++ case FDP1_ADAPT2D3D:
++ dprintk(fdp1, "Adapt2D3D Mode\n");
++ if (ctx->sequence == 0 || ctx->aborting)
++ ipcmode |= FD1_IPC_MODE_DIM_FIXED2D;
++ else
++ ipcmode |= FD1_IPC_MODE_DIM_ADAPT2D3D;
++
++ if (ctx->sequence > 1) {
++ channels |= FD1_CTL_CHACT_SMW;
++ channels |= FD1_CTL_CHACT_RD0 | FD1_CTL_CHACT_RD2;
++ }
++
++ if (ctx->sequence > 2)
++ channels |= FD1_CTL_CHACT_SMR;
++
++ break;
++ case FDP1_FIXED3D:
++ dprintk(fdp1, "Fixed 3D Mode\n");
++ ipcmode |= FD1_IPC_MODE_DIM_FIXED3D;
++ /* Except for first and last frame, enable all channels */
++ if (!(ctx->sequence == 0 || ctx->aborting))
++ channels |= FD1_CTL_CHACT_RD0 | FD1_CTL_CHACT_RD2;
++ break;
++ case FDP1_FIXED2D:
++ dprintk(fdp1, "Fixed 2D Mode\n");
++ ipcmode |= FD1_IPC_MODE_DIM_FIXED2D;
++ /* No extra channels enabled */
++ break;
++ case FDP1_PREVFIELD:
++ dprintk(fdp1, "Previous Field Mode\n");
++ ipcmode |= FD1_IPC_MODE_DIM_PREVFIELD;
++ channels |= FD1_CTL_CHACT_RD0; /* Previous */
++ break;
++ case FDP1_NEXTFIELD:
++ dprintk(fdp1, "Next Field Mode\n");
++ ipcmode |= FD1_IPC_MODE_DIM_NEXTFIELD;
++ channels |= FD1_CTL_CHACT_RD2; /* Next */
++ break;
++ }
++
++ fdp1_write(fdp1, channels, FD1_CTL_CHACT);
++ fdp1_write(fdp1, opmode, FD1_CTL_OPMODE);
++ fdp1_write(fdp1, ipcmode, FD1_IPC_MODE);
++}
++
++/*
++ * fdp1_device_process() - Run the hardware
++ *
++ * Configure and start the hardware to generate a single frame
++ * of output given our input parameters.
++ */
++static int fdp1_device_process(struct fdp1_ctx *ctx)
++
++{
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ struct fdp1_job *job;
++ unsigned long flags;
++
++ spin_lock_irqsave(&fdp1->device_process_lock, flags);
++
++ /* Get a job to process */
++ job = get_queued_job(fdp1);
++ if (!job) {
++ /*
++ * VINT can call us to see if we can queue another job.
++ * If we have no work to do, we simply return.
++ */
++ spin_unlock_irqrestore(&fdp1->device_process_lock, flags);
++ return 0;
++ }
++
++ /* First Frame only? ... */
++ fdp1_write(fdp1, FD1_CTL_CLKCTRL_CSTP_N, FD1_CTL_CLKCTRL);
++
++ /* Set the mode, and configuration */
++ fdp1_configure_deint_mode(ctx, job);
++
++ /* DLI Static Configuration */
++ fdp1_set_ipc_dli(ctx);
++
++ /* Sensor Configuration */
++ fdp1_set_ipc_sensor(ctx);
++
++ /* Setup the source picture */
++ fdp1_configure_rpf(ctx, job);
++
++ /* Setup the destination picture */
++ fdp1_configure_wpf(ctx, job);
++
++ /* Line Memory Pixel Number Register for linear access */
++ fdp1_write(fdp1, FD1_IPC_LMEM_LINEAR, FD1_IPC_LMEM);
++
++ /* Enable Interrupts */
++ fdp1_write(fdp1, FD1_CTL_IRQ_MASK, FD1_CTL_IRQENB);
++
++ /* Finally, the Immediate Registers */
++
++ /* This job is now in the HW queue */
++ queue_hw_job(fdp1, job);
++
++ /* Start the command */
++ fdp1_write(fdp1, FD1_CTL_CMD_STRCMD, FD1_CTL_CMD);
++
++ /* Registers will update to HW at next VINT */
++ fdp1_write(fdp1, FD1_CTL_REGEND_REGEND, FD1_CTL_REGEND);
++
++ /* Enable VINT Generator */
++ fdp1_write(fdp1, FD1_CTL_SGCMD_SGEN, FD1_CTL_SGCMD);
++
++ spin_unlock_irqrestore(&fdp1->device_process_lock, flags);
++
++ return 0;
++}
++
++/*
++ * mem2mem callbacks
++ */
++
++/**
++ * job_ready() - check whether an instance is ready to be scheduled to run
++ */
++static int fdp1_m2m_job_ready(void *priv)
++{
++ struct fdp1_ctx *ctx = priv;
++ struct fdp1_q_data *src_q_data = &ctx->out_q;
++ int srcbufs = 1;
++ int dstbufs = 1;
++
++ dprintk(ctx->fdp1, "+ Src: %d : Dst: %d\n",
++ v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx),
++ v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx));
++
++ /* One output buffer is required for each field */
++ if (V4L2_FIELD_HAS_BOTH(src_q_data->format.field))
++ dstbufs = 2;
++
++ if (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) < srcbufs
++ || v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx) < dstbufs) {
++ dprintk(ctx->fdp1, "Not enough buffers available\n");
++ return 0;
++ }
++
++ return 1;
++}
++
++static void fdp1_m2m_job_abort(void *priv)
++{
++ struct fdp1_ctx *ctx = priv;
++
++ dprintk(ctx->fdp1, "+\n");
++
++ /* Will cancel the transaction in the next interrupt handler */
++ ctx->aborting = 1;
++
++ /* Immediate abort sequence */
++ fdp1_write(ctx->fdp1, 0, FD1_CTL_SGCMD);
++ fdp1_write(ctx->fdp1, FD1_CTL_SRESET_SRST, FD1_CTL_SRESET);
++}
++
++/*
++ * fdp1_prepare_job: Prepare and queue a new job for a single action of work
++ *
++ * Prepare the next field, (or frame in progressive) and an output
++ * buffer for the hardware to perform a single operation.
++ */
++static struct fdp1_job *fdp1_prepare_job(struct fdp1_ctx *ctx)
++{
++ struct vb2_v4l2_buffer *vbuf;
++ struct fdp1_buffer *fbuf;
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ struct fdp1_job *job;
++ unsigned int buffers_required = 1;
++
++ dprintk(fdp1, "+\n");
++
++ if (FDP1_DEINT_MODE_USES_NEXT(ctx->deint_mode))
++ buffers_required = 2;
++
++ if (ctx->buffers_queued < buffers_required)
++ return NULL;
++
++ job = fdp1_job_alloc(fdp1);
++ if (!job) {
++ dprintk(fdp1, "No free jobs currently available\n");
++ return NULL;
++ }
++
++ job->active = fdp1_dequeue_field(ctx);
++ if (!job->active) {
++ /* Buffer check should prevent this ever happening */
++ dprintk(fdp1, "No input buffers currently available\n");
++
++ fdp1_job_free(fdp1, job);
++ return NULL;
++ }
++
++ dprintk(fdp1, "+ Buffer en-route...\n");
++
++ /* Source buffers have been prepared on our buffer_queue
++ * Prepare our Output buffer
++ */
++ vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
++ fbuf = to_fdp1_buffer(vbuf);
++ job->dst = &fbuf->fields[0];
++
++ job->active->vb->sequence = ctx->sequence;
++ job->dst->vb->sequence = ctx->sequence;
++ ctx->sequence++;
++
++ if (FDP1_DEINT_MODE_USES_PREV(ctx->deint_mode)) {
++ job->previous = ctx->previous;
++
++ /* Active buffer becomes the next job's previous buffer */
++ ctx->previous = job->active;
++ }
++
++ if (FDP1_DEINT_MODE_USES_NEXT(ctx->deint_mode)) {
++ /* Must be called after 'active' is dequeued */
++ job->next = fdp1_peek_queued_field(ctx);
++ }
++
++ /* Transfer timestamps and flags from src->dst */
++
++ job->dst->vb->vb2_buf.timestamp = job->active->vb->vb2_buf.timestamp;
++
++ job->dst->vb->flags = job->active->vb->flags &
++ V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
++
++ /* Ideally, the frame-end function will just 'check' to see
++ * if there are more jobs instead
++ */
++ ctx->translen++;
++
++ /* Finally, Put this job on the processing queue */
++ queue_job(fdp1, job);
++
++ dprintk(fdp1, "Job Queued translen = %d\n", ctx->translen);
++
++ return job;
++}
++
++/* fdp1_m2m_device_run() - prepares and starts the device for an M2M task
++ *
++ * A single input buffer is taken and serialised into our fdp1_buffer
++ * queue. The queue is then processed to create as many jobs as possible
++ * from our available input.
++ */
++static void fdp1_m2m_device_run(void *priv)
++{
++ struct fdp1_ctx *ctx = priv;
++ struct fdp1_dev *fdp1 = ctx->fdp1;
++ struct vb2_v4l2_buffer *src_vb;
++ struct fdp1_buffer *buf;
++ unsigned int i;
++
++ dprintk(fdp1, "+\n");
++
++ ctx->translen = 0;
++
++ /* Get our incoming buffer of either one or two fields, or one frame */
++ src_vb = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
++ buf = to_fdp1_buffer(src_vb);
++
++ for (i = 0; i < buf->num_fields; i++) {
++ struct fdp1_field_buffer *fbuf = &buf->fields[i];
++
++ fdp1_queue_field(ctx, fbuf);
++ dprintk(fdp1, "Queued Buffer [%d] last_field:%d\n",
++ i, fbuf->last_field);
++ }
++
++ /* Queue as many jobs as our data provides for */
++ while (fdp1_prepare_job(ctx))
++ ;
++
++ if (ctx->translen == 0) {
++ dprintk(fdp1, "No jobs were processed. M2M action complete\n");
++ v4l2_m2m_job_finish(fdp1->m2m_dev, ctx->fh.m2m_ctx);
++ return;
++ }
++
++ /* Kick the job processing action */
++ fdp1_device_process(ctx);
++}
++
++/*
++ * device_frame_end:
++ *
++ * Handles the M2M level after a buffer completion event.
++ */
++static void device_frame_end(struct fdp1_dev *fdp1,
++ enum vb2_buffer_state state)
++{
++ struct fdp1_ctx *ctx;
++ unsigned long flags;
++ struct fdp1_job *job = get_hw_queued_job(fdp1);
++
++ dprintk(fdp1, "+\n");
++
++ ctx = v4l2_m2m_get_curr_priv(fdp1->m2m_dev);
++
++ if (ctx == NULL) {
++ v4l2_err(&fdp1->v4l2_dev,
++ "Instance released before the end of transaction\n");
++ return;
++ }
++
++ ctx->num_processed++;
++
++ /*
++ * fdp1_field_complete will call buf_done only when the last vb2_buffer
++ * reference is complete
++ */
++ if (FDP1_DEINT_MODE_USES_PREV(ctx->deint_mode))
++ fdp1_field_complete(ctx, job->previous);
++ else
++ fdp1_field_complete(ctx, job->active);
++
++ spin_lock_irqsave(&fdp1->irqlock, flags);
++ v4l2_m2m_buf_done(job->dst->vb, state);
++ job->dst = NULL;
++ spin_unlock_irqrestore(&fdp1->irqlock, flags);
++
++ /* Move this job back to the free job list */
++ fdp1_job_free(fdp1, job);
++
++ dprintk(fdp1, "curr_ctx->num_processed %d curr_ctx->translen %d\n",
++ ctx->num_processed, ctx->translen);
++
++ if (ctx->num_processed == ctx->translen ||
++ ctx->aborting) {
++ dprintk(ctx->fdp1, "Finishing transaction\n");
++ ctx->num_processed = 0;
++ v4l2_m2m_job_finish(fdp1->m2m_dev, ctx->fh.m2m_ctx);
++ } else {
++ /*
++ * For pipelined performance support, this would
++ * be called from a VINT handler
++ */
++ fdp1_device_process(ctx);
++ }
++}
++
++/*
++ * video ioctls
++ */
++static int fdp1_vidioc_querycap(struct file *file, void *priv,
++ struct v4l2_capability *cap)
++{
++ strlcpy(cap->driver, DRIVER_NAME, sizeof(cap->driver));
++ strlcpy(cap->card, DRIVER_NAME, sizeof(cap->card));
++ snprintf(cap->bus_info, sizeof(cap->bus_info),
++ "platform:%s", DRIVER_NAME);
++ return 0;
++}
++
++static int fdp1_enum_fmt(struct v4l2_fmtdesc *f, u32 type)
++{
++ unsigned int i, num;
++
++ num = 0;
++
++ for (i = 0; i < ARRAY_SIZE(fdp1_formats); ++i) {
++ if (fdp1_formats[i].types & type) {
++ if (num == f->index)
++ break;
++ ++num;
++ }
++ }
++
++ /* Format not found */
++ if (i >= ARRAY_SIZE(fdp1_formats))
++ return -EINVAL;
++
++ /* Format found */
++ f->pixelformat = fdp1_formats[i].fourcc;
++
++ return 0;
++}
++
++static int fdp1_enum_fmt_vid_cap(struct file *file, void *priv,
++ struct v4l2_fmtdesc *f)
++{
++ return fdp1_enum_fmt(f, FDP1_CAPTURE);
++}
++
++static int fdp1_enum_fmt_vid_out(struct file *file, void *priv,
++ struct v4l2_fmtdesc *f)
++{
++ return fdp1_enum_fmt(f, FDP1_OUTPUT);
++}
++
++static int fdp1_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
++{
++ struct fdp1_q_data *q_data;
++ struct fdp1_ctx *ctx = fh_to_ctx(priv);
++
++ if (!v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type))
++ return -EINVAL;
++
++ q_data = get_q_data(ctx, f->type);
++ f->fmt.pix_mp = q_data->format;
++
++ return 0;
++}
++
++static void fdp1_compute_stride(struct v4l2_pix_format_mplane *pix,
++ const struct fdp1_fmt *fmt)
++{
++ unsigned int i;
++
++ /* Compute and clamp the stride and image size. */
++ for (i = 0; i < min_t(unsigned int, fmt->num_planes, 2U); ++i) {
++ unsigned int hsub = i > 0 ? fmt->hsub : 1;
++ unsigned int vsub = i > 0 ? fmt->vsub : 1;
++ /* From VSP : TODO: Confirm alignment limits for FDP1 */
++ unsigned int align = 128;
++ unsigned int bpl;
++
++ bpl = clamp_t(unsigned int, pix->plane_fmt[i].bytesperline,
++ pix->width / hsub * fmt->bpp[i] / 8,
++ round_down(FDP1_MAX_STRIDE, align));
++
++ pix->plane_fmt[i].bytesperline = round_up(bpl, align);
++ pix->plane_fmt[i].sizeimage = pix->plane_fmt[i].bytesperline
++ * pix->height / vsub;
++
++ memset(pix->plane_fmt[i].reserved, 0,
++ sizeof(pix->plane_fmt[i].reserved));
++ }
++
++ if (fmt->num_planes == 3) {
++ /* The two chroma planes must have the same stride. */
++ pix->plane_fmt[2].bytesperline = pix->plane_fmt[1].bytesperline;
++ pix->plane_fmt[2].sizeimage = pix->plane_fmt[1].sizeimage;
++
++ memset(pix->plane_fmt[2].reserved, 0,
++ sizeof(pix->plane_fmt[2].reserved));
++ }
++}
++
++static void fdp1_try_fmt_output(struct fdp1_ctx *ctx,
++ const struct fdp1_fmt **fmtinfo,
++ struct v4l2_pix_format_mplane *pix)
++{
++ const struct fdp1_fmt *fmt;
++ unsigned int width;
++ unsigned int height;
++
++ /* Validate the pixel format to ensure the output queue supports it. */
++ fmt = fdp1_find_format(pix->pixelformat);
++ if (!fmt || !(fmt->types & FDP1_OUTPUT))
++ fmt = fdp1_find_format(V4L2_PIX_FMT_YUYV);
++
++ if (fmtinfo)
++ *fmtinfo = fmt;
++
++ pix->pixelformat = fmt->fourcc;
++ pix->num_planes = fmt->num_planes;
++
++ /*
++ * Progressive video and all interlaced field orders are acceptable.
++ * Default to V4L2_FIELD_INTERLACED.
++ */
++ if (pix->field != V4L2_FIELD_NONE &&
++ pix->field != V4L2_FIELD_ALTERNATE &&
++ !V4L2_FIELD_HAS_BOTH(pix->field))
++ pix->field = V4L2_FIELD_INTERLACED;
++
++ /*
++ * The deinterlacer doesn't care about the colorspace, accept all values
++ * and default to V4L2_COLORSPACE_SMPTE170M. The YUV to RGB conversion
++ * at the output of the deinterlacer supports a subset of encodings and
++ * quantization methods and will only be available when the colorspace
++ * allows it.
++ */
++ if (pix->colorspace == V4L2_COLORSPACE_DEFAULT)
++ pix->colorspace = V4L2_COLORSPACE_SMPTE170M;
++
++ /*
++ * Align the width and height for YUV 4:2:2 and 4:2:0 formats and clamp
++ * them to the supported frame size range. The height boundary are
++ * related to the full frame, divide them by two when the format passes
++ * fields in separate buffers.
++ */
++ width = round_down(pix->width, fmt->hsub);
++ pix->width = clamp(width, FDP1_MIN_W, FDP1_MAX_W);
++
++ height = round_down(pix->height, fmt->vsub);
++ if (pix->field == V4L2_FIELD_ALTERNATE)
++ pix->height = clamp(height, FDP1_MIN_H / 2, FDP1_MAX_H / 2);
++ else
++ pix->height = clamp(height, FDP1_MIN_H, FDP1_MAX_H);
++
++ fdp1_compute_stride(pix, fmt);
++}
++
++static void fdp1_try_fmt_capture(struct fdp1_ctx *ctx,
++ const struct fdp1_fmt **fmtinfo,
++ struct v4l2_pix_format_mplane *pix)
++{
++ struct fdp1_q_data *src_data = &ctx->out_q;
++ enum v4l2_colorspace colorspace;
++ enum v4l2_ycbcr_encoding ycbcr_enc;
++ enum v4l2_quantization quantization;
++ const struct fdp1_fmt *fmt;
++ bool allow_rgb;
++
++ /*
++ * Validate the pixel format. We can only accept RGB output formats if
++ * the input encoding and quantization are compatible with the format
++ * conversions supported by the hardware. The supported combinations are
++ *
++ * V4L2_YCBCR_ENC_601 + V4L2_QUANTIZATION_LIM_RANGE
++ * V4L2_YCBCR_ENC_601 + V4L2_QUANTIZATION_FULL_RANGE
++ * V4L2_YCBCR_ENC_709 + V4L2_QUANTIZATION_LIM_RANGE
++ */
++ colorspace = src_data->format.colorspace;
++
++ ycbcr_enc = src_data->format.ycbcr_enc;
++ if (ycbcr_enc == V4L2_YCBCR_ENC_DEFAULT)
++ ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(colorspace);
++
++ quantization = src_data->format.quantization;
++ if (quantization == V4L2_QUANTIZATION_DEFAULT)
++ quantization = V4L2_MAP_QUANTIZATION_DEFAULT(false, colorspace,
++ ycbcr_enc);
++
++ allow_rgb = ycbcr_enc == V4L2_YCBCR_ENC_601 ||
++ (ycbcr_enc == V4L2_YCBCR_ENC_709 &&
++ quantization == V4L2_QUANTIZATION_LIM_RANGE);
++
++ fmt = fdp1_find_format(pix->pixelformat);
++ if (!fmt || (!allow_rgb && fdp1_fmt_is_rgb(fmt)))
++ fmt = fdp1_find_format(V4L2_PIX_FMT_YUYV);
++
++ if (fmtinfo)
++ *fmtinfo = fmt;
++
++ pix->pixelformat = fmt->fourcc;
++ pix->num_planes = fmt->num_planes;
++ pix->field = V4L2_FIELD_NONE;
++
++ /*
++ * The colorspace on the capture queue is copied from the output queue
++ * as the hardware can't change the colorspace. It can convert YCbCr to
++ * RGB though, in which case the encoding and quantization are set to
++ * default values as anything else wouldn't make sense.
++ */
++ pix->colorspace = src_data->format.colorspace;
++ pix->xfer_func = src_data->format.xfer_func;
++
++ if (fdp1_fmt_is_rgb(fmt)) {
++ pix->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
++ pix->quantization = V4L2_QUANTIZATION_DEFAULT;
++ } else {
++ pix->ycbcr_enc = src_data->format.ycbcr_enc;
++ pix->quantization = src_data->format.quantization;
++ }
++
++ /*
++ * The frame width is identical to the output queue, and the height is
++ * either doubled or identical depending on whether the output queue
++ * field order contains one or two fields per frame.
++ */
++ pix->width = src_data->format.width;
++ if (src_data->format.field == V4L2_FIELD_ALTERNATE)
++ pix->height = 2 * src_data->format.height;
++ else
++ pix->height = src_data->format.height;
++
++ fdp1_compute_stride(pix, fmt);
++}
++
++static int fdp1_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
++{
++ struct fdp1_ctx *ctx = fh_to_ctx(priv);
++
++ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
++ fdp1_try_fmt_output(ctx, NULL, &f->fmt.pix_mp);
++ else
++ fdp1_try_fmt_capture(ctx, NULL, &f->fmt.pix_mp);
++
++ dprintk(ctx->fdp1, "Try %s format: %4s (0x%08x) %ux%u field %u\n",
++ V4L2_TYPE_IS_OUTPUT(f->type) ? "output" : "capture",
++ (char *)&f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat,
++ f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.field);
++
++ return 0;
++}
++
++static void fdp1_set_format(struct fdp1_ctx *ctx,
++ struct v4l2_pix_format_mplane *pix,
++ enum v4l2_buf_type type)
++{
++ struct fdp1_q_data *q_data = get_q_data(ctx, type);
++ const struct fdp1_fmt *fmtinfo;
++
++ if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
++ fdp1_try_fmt_output(ctx, &fmtinfo, pix);
++ else
++ fdp1_try_fmt_capture(ctx, &fmtinfo, pix);
++
++ q_data->fmt = fmtinfo;
++ q_data->format = *pix;
++
++ q_data->vsize = pix->height;
++ if (pix->field != V4L2_FIELD_NONE)
++ q_data->vsize /= 2;
++
++ q_data->stride_y = pix->plane_fmt[0].bytesperline;
++ q_data->stride_c = pix->plane_fmt[1].bytesperline;
++
++ /* Adjust strides for interleaved buffers */
++ if (pix->field == V4L2_FIELD_INTERLACED ||
++ pix->field == V4L2_FIELD_INTERLACED_TB ||
++ pix->field == V4L2_FIELD_INTERLACED_BT) {
++ q_data->stride_y *= 2;
++ q_data->stride_c *= 2;
++ }
++
++ /* Propagate the format from the output node to the capture node. */
++ if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
++ struct fdp1_q_data *dst_data = &ctx->cap_q;
++
++ /*
++ * Copy the format, clear the per-plane bytes per line and image
++ * size, override the field and double the height if needed.
++ */
++ dst_data->format = q_data->format;
++ memset(dst_data->format.plane_fmt, 0,
++ sizeof(dst_data->format.plane_fmt));
++
++ dst_data->format.field = V4L2_FIELD_NONE;
++ if (pix->field == V4L2_FIELD_ALTERNATE)
++ dst_data->format.height *= 2;
++
++ fdp1_try_fmt_capture(ctx, &dst_data->fmt, &dst_data->format);
++
++ dst_data->vsize = dst_data->format.height;
++ dst_data->stride_y = dst_data->format.plane_fmt[0].bytesperline;
++ dst_data->stride_c = dst_data->format.plane_fmt[1].bytesperline;
++ }
++}
++
++static int fdp1_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
++{
++ struct fdp1_ctx *ctx = fh_to_ctx(priv);
++ struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
++ struct vb2_queue *vq = v4l2_m2m_get_vq(m2m_ctx, f->type);
++
++ if (vb2_is_busy(vq)) {
++ v4l2_err(&ctx->fdp1->v4l2_dev, "%s queue busy\n", __func__);
++ return -EBUSY;
++ }
++
++ fdp1_set_format(ctx, &f->fmt.pix_mp, f->type);
++
++ dprintk(ctx->fdp1, "Set %s format: %4s (0x%08x) %ux%u field %u\n",
++ V4L2_TYPE_IS_OUTPUT(f->type) ? "output" : "capture",
++ (char *)&f->fmt.pix_mp.pixelformat, f->fmt.pix_mp.pixelformat,
++ f->fmt.pix_mp.width, f->fmt.pix_mp.height, f->fmt.pix_mp.field);
++
++ return 0;
++}
++
++static int fdp1_g_ctrl(struct v4l2_ctrl *ctrl)
++{
++ struct fdp1_ctx *ctx =
++ container_of(ctrl->handler, struct fdp1_ctx, hdl);
++ struct fdp1_q_data *src_q_data = &ctx->out_q;
++
++ switch (ctrl->id) {
++ case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
++ if (V4L2_FIELD_HAS_BOTH(src_q_data->format.field))
++ ctrl->val = 2;
++ else
++ ctrl->val = 1;
++ return 0;
++ }
++
++ return 1;
++}
++
++static int fdp1_s_ctrl(struct v4l2_ctrl *ctrl)
++{
++ struct fdp1_ctx *ctx =
++ container_of(ctrl->handler, struct fdp1_ctx, hdl);
++
++ switch (ctrl->id) {
++ case V4L2_CID_ALPHA_COMPONENT:
++ ctx->alpha = ctrl->val;
++ break;
++
++ case V4L2_CID_DEINTERLACING_MODE:
++ ctx->deint_mode = ctrl->val;
++ break;
++ }
++
++ return 0;
++}
++
++static const struct v4l2_ctrl_ops fdp1_ctrl_ops = {
++ .s_ctrl = fdp1_s_ctrl,
++ .g_volatile_ctrl = fdp1_g_ctrl,
++};
++
++static const char * const fdp1_ctrl_deint_menu[] = {
++ "Progressive",
++ "Adaptive 2D/3D",
++ "Fixed 2D",
++ "Fixed 3D",
++ "Previous field",
++ "Next field",
++ NULL
++};
++
++static const struct v4l2_ioctl_ops fdp1_ioctl_ops = {
++ .vidioc_querycap = fdp1_vidioc_querycap,
++
++ .vidioc_enum_fmt_vid_cap_mplane = fdp1_enum_fmt_vid_cap,
++ .vidioc_enum_fmt_vid_out_mplane = fdp1_enum_fmt_vid_out,
++ .vidioc_g_fmt_vid_cap_mplane = fdp1_g_fmt,
++ .vidioc_g_fmt_vid_out_mplane = fdp1_g_fmt,
++ .vidioc_try_fmt_vid_cap_mplane = fdp1_try_fmt,
++ .vidioc_try_fmt_vid_out_mplane = fdp1_try_fmt,
++ .vidioc_s_fmt_vid_cap_mplane = fdp1_s_fmt,
++ .vidioc_s_fmt_vid_out_mplane = fdp1_s_fmt,
++
++ .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
++ .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
++ .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
++ .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
++ .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
++ .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
++ .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
++
++ .vidioc_streamon = v4l2_m2m_ioctl_streamon,
++ .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
++
++ .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
++ .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
++};
++
++/*
++ * Queue operations
++ */
++
++static int fdp1_queue_setup(struct vb2_queue *vq,
++ unsigned int *nbuffers, unsigned int *nplanes,
++ unsigned int sizes[],
++ struct device *alloc_ctxs[])
++{
++ struct fdp1_ctx *ctx = vb2_get_drv_priv(vq);
++ struct fdp1_q_data *q_data;
++ unsigned int i;
++
++ q_data = get_q_data(ctx, vq->type);
++
++ if (*nplanes) {
++ if (*nplanes > FDP1_MAX_PLANES)
++ return -EINVAL;
++
++ return 0;
++ }
++
++ *nplanes = q_data->format.num_planes;
++
++ for (i = 0; i < *nplanes; i++)
++ sizes[i] = q_data->format.plane_fmt[i].sizeimage;
++
++ return 0;
++}
++
++static void fdp1_buf_prepare_field(struct fdp1_q_data *q_data,
++ struct vb2_v4l2_buffer *vbuf,
++ unsigned int field_num)
++{
++ struct fdp1_buffer *buf = to_fdp1_buffer(vbuf);
++ struct fdp1_field_buffer *fbuf = &buf->fields[field_num];
++ unsigned int num_fields;
++ unsigned int i;
++
++ num_fields = V4L2_FIELD_HAS_BOTH(vbuf->field) ? 2 : 1;
++
++ fbuf->vb = vbuf;
++ fbuf->last_field = (field_num + 1) == num_fields;
++
++ for (i = 0; i < vbuf->vb2_buf.num_planes; ++i)
++ fbuf->addrs[i] = vb2_dma_contig_plane_dma_addr(&vbuf->vb2_buf, i);
++
++ switch (vbuf->field) {
++ case V4L2_FIELD_INTERLACED:
++ /*
++ * Interlaced means bottom-top for 60Hz TV standards (NTSC) and
++ * top-bottom for 50Hz. As TV standards are not applicable to
++ * the mem-to-mem API, use the height as a heuristic.
++ */
++ fbuf->field = (q_data->format.height < 576) == field_num
++ ? V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM;
++ break;
++ case V4L2_FIELD_INTERLACED_TB:
++ case V4L2_FIELD_SEQ_TB:
++ fbuf->field = field_num ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
++ break;
++ case V4L2_FIELD_INTERLACED_BT:
++ case V4L2_FIELD_SEQ_BT:
++ fbuf->field = field_num ? V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM;
++ break;
++ default:
++ fbuf->field = vbuf->field;
++ break;
++ }
++
++ /* Buffer is completed */
++ if (!field_num)
++ return;
++
++ /* Adjust buffer addresses for second field */
++ switch (vbuf->field) {
++ case V4L2_FIELD_INTERLACED:
++ case V4L2_FIELD_INTERLACED_TB:
++ case V4L2_FIELD_INTERLACED_BT:
++ for (i = 0; i < vbuf->vb2_buf.num_planes; i++)
++ fbuf->addrs[i] +=
++ (i == 0 ? q_data->stride_y : q_data->stride_c);
++ break;
++ case V4L2_FIELD_SEQ_TB:
++ case V4L2_FIELD_SEQ_BT:
++ for (i = 0; i < vbuf->vb2_buf.num_planes; i++)
++ fbuf->addrs[i] += q_data->vsize *
++ (i == 0 ? q_data->stride_y : q_data->stride_c);
++ break;
++ }
++}
++
++static int fdp1_buf_prepare(struct vb2_buffer *vb)
++{
++ struct fdp1_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
++ struct fdp1_q_data *q_data = get_q_data(ctx, vb->vb2_queue->type);
++ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
++ struct fdp1_buffer *buf = to_fdp1_buffer(vbuf);
++ unsigned int i;
++
++ if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) {
++ bool field_valid = true;
++
++ /* Validate the buffer field. */
++ switch (q_data->format.field) {
++ case V4L2_FIELD_NONE:
++ if (vbuf->field != V4L2_FIELD_NONE)
++ field_valid = false;
++ break;
++
++ case V4L2_FIELD_ALTERNATE:
++ if (vbuf->field != V4L2_FIELD_TOP &&
++ vbuf->field != V4L2_FIELD_BOTTOM)
++ field_valid = false;
++ break;
++
++ case V4L2_FIELD_INTERLACED:
++ case V4L2_FIELD_SEQ_TB:
++ case V4L2_FIELD_SEQ_BT:
++ case V4L2_FIELD_INTERLACED_TB:
++ case V4L2_FIELD_INTERLACED_BT:
++ if (vbuf->field != q_data->format.field)
++ field_valid = false;
++ break;
++ }
++
++ if (!field_valid) {
++ dprintk(ctx->fdp1,
++ "buffer field %u invalid for format field %u\n",
++ vbuf->field, q_data->format.field);
++ return -EINVAL;
++ }
++ } else {
++ vbuf->field = V4L2_FIELD_NONE;
++ }
++
++ /* Validate the planes sizes. */
++ for (i = 0; i < q_data->format.num_planes; i++) {
++ unsigned long size = q_data->format.plane_fmt[i].sizeimage;
++
++ if (vb2_plane_size(vb, i) < size) {
++ dprintk(ctx->fdp1,
++ "data will not fit into plane [%u/%u] (%lu < %lu)\n",
++ i, q_data->format.num_planes,
++ vb2_plane_size(vb, i), size);
++ return -EINVAL;
++ }
++
++ /* We have known size formats all around */
++ vb2_set_plane_payload(vb, i, size);
++ }
++
++ buf->num_fields = V4L2_FIELD_HAS_BOTH(vbuf->field) ? 2 : 1;
++ for (i = 0; i < buf->num_fields; ++i)
++ fdp1_buf_prepare_field(q_data, vbuf, i);
++
++ return 0;
++}
++
++static void fdp1_buf_queue(struct vb2_buffer *vb)
++{
++ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
++ struct fdp1_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
++
++ v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
++}
++
++static int fdp1_start_streaming(struct vb2_queue *q, unsigned int count)
++{
++ struct fdp1_ctx *ctx = vb2_get_drv_priv(q);
++ struct fdp1_q_data *q_data = get_q_data(ctx, q->type);
++
++ if (V4L2_TYPE_IS_OUTPUT(q->type)) {
++ /*
++ * Force our deint_mode when we are progressive,
++ * ignoring any setting on the device from the user,
++ * Otherwise, lock in the requested de-interlace mode.
++ */
++ if (q_data->format.field == V4L2_FIELD_NONE)
++ ctx->deint_mode = FDP1_PROGRESSIVE;
++
++ if (ctx->deint_mode == FDP1_ADAPT2D3D) {
++ u32 stride;
++ dma_addr_t smsk_base;
++ const u32 bpp = 2; /* bytes per pixel */
++
++ stride = round_up(q_data->format.width, 8);
++
++ ctx->smsk_size = bpp * stride * q_data->vsize;
++
++ ctx->smsk_cpu = dma_alloc_coherent(ctx->fdp1->dev,
++ ctx->smsk_size, &smsk_base, GFP_KERNEL);
++
++ if (ctx->smsk_cpu == NULL) {
++ dprintk(ctx->fdp1, "Failed to alloc smsk\n");
++ return -ENOMEM;
++ }
++
++ ctx->smsk_addr[0] = smsk_base;
++ ctx->smsk_addr[1] = smsk_base + (ctx->smsk_size/2);
++ }
++ }
++
++ return 0;
++}
++
++static void fdp1_stop_streaming(struct vb2_queue *q)
++{
++ struct fdp1_ctx *ctx = vb2_get_drv_priv(q);
++ struct vb2_v4l2_buffer *vbuf;
++ unsigned long flags;
++
++ while (1) {
++ if (V4L2_TYPE_IS_OUTPUT(q->type))
++ vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
++ else
++ vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
++ if (vbuf == NULL)
++ break;
++ spin_lock_irqsave(&ctx->fdp1->irqlock, flags);
++ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR);
++ spin_unlock_irqrestore(&ctx->fdp1->irqlock, flags);
++ }
++
++ /* Empty Output queues */
++ if (V4L2_TYPE_IS_OUTPUT(q->type)) {
++ /* Empty our internal queues */
++ struct fdp1_field_buffer *fbuf;
++
++ /* Free any queued buffers */
++ fbuf = fdp1_dequeue_field(ctx);
++ while (fbuf != NULL) {
++ fdp1_field_complete(ctx, fbuf);
++ fbuf = fdp1_dequeue_field(ctx);
++ }
++
++ /* Free smsk_data */
++ if (ctx->smsk_cpu) {
++ dma_free_coherent(ctx->fdp1->dev, ctx->smsk_size,
++ ctx->smsk_cpu, ctx->smsk_addr[0]);
++ ctx->smsk_addr[0] = ctx->smsk_addr[1] = 0;
++ ctx->smsk_cpu = NULL;
++ }
++
++ WARN(!list_empty(&ctx->fields_queue),
++ "Buffer queue not empty");
++ } else {
++ /* Empty Capture queues (Jobs) */
++ struct fdp1_job *job;
++
++ job = get_queued_job(ctx->fdp1);
++ while (job) {
++ if (FDP1_DEINT_MODE_USES_PREV(ctx->deint_mode))
++ fdp1_field_complete(ctx, job->previous);
++ else
++ fdp1_field_complete(ctx, job->active);
++
++ v4l2_m2m_buf_done(job->dst->vb, VB2_BUF_STATE_ERROR);
++ job->dst = NULL;
++
++ job = get_queued_job(ctx->fdp1);
++ }
++
++ /* Free any held buffer in the ctx */
++ fdp1_field_complete(ctx, ctx->previous);
++
++ WARN(!list_empty(&ctx->fdp1->queued_job_list),
++ "Queued Job List not empty");
++
++ WARN(!list_empty(&ctx->fdp1->hw_job_list),
++ "HW Job list not empty");
++ }
++}
++
++static struct vb2_ops fdp1_qops = {
++ .queue_setup = fdp1_queue_setup,
++ .buf_prepare = fdp1_buf_prepare,
++ .buf_queue = fdp1_buf_queue,
++ .start_streaming = fdp1_start_streaming,
++ .stop_streaming = fdp1_stop_streaming,
++ .wait_prepare = vb2_ops_wait_prepare,
++ .wait_finish = vb2_ops_wait_finish,
++};
++
++static int queue_init(void *priv, struct vb2_queue *src_vq,
++ struct vb2_queue *dst_vq)
++{
++ struct fdp1_ctx *ctx = priv;
++ int ret;
++
++ src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
++ src_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
++ src_vq->drv_priv = ctx;
++ src_vq->buf_struct_size = sizeof(struct fdp1_buffer);
++ src_vq->ops = &fdp1_qops;
++ src_vq->mem_ops = &vb2_dma_contig_memops;
++ src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
++ src_vq->lock = &ctx->fdp1->dev_mutex;
++ src_vq->dev = ctx->fdp1->dev;
++
++ ret = vb2_queue_init(src_vq);
++ if (ret)
++ return ret;
++
++ dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
++ dst_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
++ dst_vq->drv_priv = ctx;
++ dst_vq->buf_struct_size = sizeof(struct fdp1_buffer);
++ dst_vq->ops = &fdp1_qops;
++ dst_vq->mem_ops = &vb2_dma_contig_memops;
++ dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
++ dst_vq->lock = &ctx->fdp1->dev_mutex;
++ dst_vq->dev = ctx->fdp1->dev;
++
++ return vb2_queue_init(dst_vq);
++}
++
++/*
++ * File operations
++ */
++static int fdp1_open(struct file *file)
++{
++ struct fdp1_dev *fdp1 = video_drvdata(file);
++ struct v4l2_pix_format_mplane format;
++ struct fdp1_ctx *ctx = NULL;
++ struct v4l2_ctrl *ctrl;
++ int ret = 0;
++
++ if (mutex_lock_interruptible(&fdp1->dev_mutex))
++ return -ERESTARTSYS;
++
++ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
++ if (!ctx) {
++ ret = -ENOMEM;
++ goto done;
++ }
++
++ v4l2_fh_init(&ctx->fh, video_devdata(file));
++ file->private_data = &ctx->fh;
++ ctx->fdp1 = fdp1;
++
++ /* Initialise Queues */
++ INIT_LIST_HEAD(&ctx->fields_queue);
++
++ ctx->translen = 1;
++ ctx->sequence = 0;
++
++ /* Initialise controls */
++
++ v4l2_ctrl_handler_init(&ctx->hdl, 3);
++ v4l2_ctrl_new_std_menu_items(&ctx->hdl, &fdp1_ctrl_ops,
++ V4L2_CID_DEINTERLACING_MODE,
++ FDP1_NEXTFIELD, BIT(0), FDP1_FIXED3D,
++ fdp1_ctrl_deint_menu);
++
++ ctrl = v4l2_ctrl_new_std(&ctx->hdl, &fdp1_ctrl_ops,
++ V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 2, 1, 1);
++ if (ctrl)
++ ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
++
++ v4l2_ctrl_new_std(&ctx->hdl, &fdp1_ctrl_ops,
++ V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 255);
++
++ if (ctx->hdl.error) {
++ ret = ctx->hdl.error;
++ v4l2_ctrl_handler_free(&ctx->hdl);
++ goto done;
++ }
++
++ ctx->fh.ctrl_handler = &ctx->hdl;
++ v4l2_ctrl_handler_setup(&ctx->hdl);
++
++ /* Configure default parameters. */
++ memset(&format, 0, sizeof(format));
++ fdp1_set_format(ctx, &format, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
++
++ ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(fdp1->m2m_dev, ctx, &queue_init);
++
++ if (IS_ERR(ctx->fh.m2m_ctx)) {
++ ret = PTR_ERR(ctx->fh.m2m_ctx);
++
++ v4l2_ctrl_handler_free(&ctx->hdl);
++ kfree(ctx);
++ goto done;
++ }
++
++ /* Perform any power management required */
++ pm_runtime_get_sync(fdp1->dev);
++
++ v4l2_fh_add(&ctx->fh);
++
++ dprintk(fdp1, "Created instance: %p, m2m_ctx: %p\n",
++ ctx, ctx->fh.m2m_ctx);
++
++done:
++ mutex_unlock(&fdp1->dev_mutex);
++ return ret;
++}
++
++static int fdp1_release(struct file *file)
++{
++ struct fdp1_dev *fdp1 = video_drvdata(file);
++ struct fdp1_ctx *ctx = fh_to_ctx(file->private_data);
++
++ dprintk(fdp1, "Releasing instance %p\n", ctx);
++
++ v4l2_fh_del(&ctx->fh);
++ v4l2_fh_exit(&ctx->fh);
++ v4l2_ctrl_handler_free(&ctx->hdl);
++ mutex_lock(&fdp1->dev_mutex);
++ v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
++ mutex_unlock(&fdp1->dev_mutex);
++ kfree(ctx);
++
++ pm_runtime_put(fdp1->dev);
++
++ return 0;
++}
++
++static const struct v4l2_file_operations fdp1_fops = {
++ .owner = THIS_MODULE,
++ .open = fdp1_open,
++ .release = fdp1_release,
++ .poll = v4l2_m2m_fop_poll,
++ .unlocked_ioctl = video_ioctl2,
++ .mmap = v4l2_m2m_fop_mmap,
++};
++
++static const struct video_device fdp1_videodev = {
++ .name = DRIVER_NAME,
++ .vfl_dir = VFL_DIR_M2M,
++ .fops = &fdp1_fops,
++ .device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING,
++ .ioctl_ops = &fdp1_ioctl_ops,
++ .minor = -1,
++ .release = video_device_release_empty,
++};
++
++static const struct v4l2_m2m_ops m2m_ops = {
++ .device_run = fdp1_m2m_device_run,
++ .job_ready = fdp1_m2m_job_ready,
++ .job_abort = fdp1_m2m_job_abort,
++};
++
++static irqreturn_t fdp1_irq_handler(int irq, void *dev_id)
++{
++ struct fdp1_dev *fdp1 = dev_id;
++ u32 int_status;
++ u32 ctl_status;
++ u32 vint_cnt;
++ u32 cycles;
++
++ int_status = fdp1_read(fdp1, FD1_CTL_IRQSTA);
++ cycles = fdp1_read(fdp1, FD1_CTL_VCYCLE_STAT);
++ ctl_status = fdp1_read(fdp1, FD1_CTL_STATUS);
++ vint_cnt = (ctl_status & FD1_CTL_STATUS_VINT_CNT_MASK) >>
++ FD1_CTL_STATUS_VINT_CNT_SHIFT;
++
++ /* Clear interrupts */
++ fdp1_write(fdp1, ~(int_status) & FD1_CTL_IRQ_MASK, FD1_CTL_IRQSTA);
++
++ if (debug >= 2) {
++ dprintk(fdp1, "IRQ: 0x%x %s%s%s\n", int_status,
++ int_status & FD1_CTL_IRQ_VERE ? "[Error]" : "[!E]",
++ int_status & FD1_CTL_IRQ_VINTE ? "[VSync]" : "[!V]",
++ int_status & FD1_CTL_IRQ_FREE ? "[FrameEnd]" : "[!F]");
++
++ dprintk(fdp1, "CycleStatus = %d (%dms)\n",
++ cycles, cycles/(fdp1->clk_rate/1000));
++
++ dprintk(fdp1,
++ "Control Status = 0x%08x : VINT_CNT = %d %s:%s:%s:%s\n",
++ ctl_status, vint_cnt,
++ ctl_status & FD1_CTL_STATUS_SGREGSET ? "RegSet" : "",
++ ctl_status & FD1_CTL_STATUS_SGVERR ? "Vsync Error" : "",
++ ctl_status & FD1_CTL_STATUS_SGFREND ? "FrameEnd" : "",
++ ctl_status & FD1_CTL_STATUS_BSY ? "Busy" : "");
++ dprintk(fdp1, "***********************************\n");
++ }
++
++ /* Spurious interrupt */
++ if (!(FD1_CTL_IRQ_MASK & int_status))
++ return IRQ_NONE;
++
++ /* Work completed, release the frame */
++ if (FD1_CTL_IRQ_VERE & int_status)
++ device_frame_end(fdp1, VB2_BUF_STATE_ERROR);
++ else if (FD1_CTL_IRQ_FREE & int_status)
++ device_frame_end(fdp1, VB2_BUF_STATE_DONE);
++
++ return IRQ_HANDLED;
++}
++
++static int fdp1_probe(struct platform_device *pdev)
++{
++ struct fdp1_dev *fdp1;
++ struct video_device *vfd;
++ struct device_node *fcp_node;
++ struct resource *res;
++ struct clk *clk;
++ unsigned int i;
++
++ int ret;
++ int hw_version;
++
++ fdp1 = devm_kzalloc(&pdev->dev, sizeof(*fdp1), GFP_KERNEL);
++ if (!fdp1)
++ return -ENOMEM;
++
++ INIT_LIST_HEAD(&fdp1->free_job_list);
++ INIT_LIST_HEAD(&fdp1->queued_job_list);
++ INIT_LIST_HEAD(&fdp1->hw_job_list);
++
++ /* Initialise the jobs on the free list */
++ for (i = 0; i < ARRAY_SIZE(fdp1->jobs); i++)
++ list_add(&fdp1->jobs[i].list, &fdp1->free_job_list);
++
++ mutex_init(&fdp1->dev_mutex);
++
++ spin_lock_init(&fdp1->irqlock);
++ spin_lock_init(&fdp1->device_process_lock);
++ fdp1->dev = &pdev->dev;
++ platform_set_drvdata(pdev, fdp1);
++
++ /* Memory-mapped registers */
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ fdp1->regs = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(fdp1->regs))
++ return PTR_ERR(fdp1->regs);
++
++ /* Interrupt service routine registration */
++ fdp1->irq = ret = platform_get_irq(pdev, 0);
++ if (ret < 0) {
++ dev_err(&pdev->dev, "cannot find IRQ\n");
++ return ret;
++ }
++
++ ret = devm_request_irq(&pdev->dev, fdp1->irq, fdp1_irq_handler, 0,
++ dev_name(&pdev->dev), fdp1);
++ if (ret) {
++ dev_err(&pdev->dev, "cannot claim IRQ %d\n", fdp1->irq);
++ return ret;
++ }
++
++ /* FCP */
++ fcp_node = of_parse_phandle(pdev->dev.of_node, "renesas,fcp", 0);
++ if (fcp_node) {
++ fdp1->fcp = rcar_fcp_get(fcp_node);
++ of_node_put(fcp_node);
++ if (IS_ERR(fdp1->fcp)) {
++ dev_err(&pdev->dev, "FCP not found (%ld)\n",
++ PTR_ERR(fdp1->fcp));
++ return PTR_ERR(fdp1->fcp);
++ }
++ }
++
++ /* Determine our clock rate */
++ clk = clk_get(&pdev->dev, NULL);
++ if (IS_ERR(clk))
++ return PTR_ERR(clk);
++
++ fdp1->clk_rate = clk_get_rate(clk);
++ clk_put(clk);
++
++ /* V4L2 device registration */
++ ret = v4l2_device_register(&pdev->dev, &fdp1->v4l2_dev);
++ if (ret) {
++ v4l2_err(&fdp1->v4l2_dev, "Failed to register video device\n");
++ return ret;
++ }
++
++ /* M2M registration */
++ fdp1->m2m_dev = v4l2_m2m_init(&m2m_ops);
++ if (IS_ERR(fdp1->m2m_dev)) {
++ v4l2_err(&fdp1->v4l2_dev, "Failed to init mem2mem device\n");
++ ret = PTR_ERR(fdp1->m2m_dev);
++ goto unreg_dev;
++ }
++
++ /* Video registration */
++ fdp1->vfd = fdp1_videodev;
++ vfd = &fdp1->vfd;
++ vfd->lock = &fdp1->dev_mutex;
++ vfd->v4l2_dev = &fdp1->v4l2_dev;
++ video_set_drvdata(vfd, fdp1);
++ strlcpy(vfd->name, fdp1_videodev.name, sizeof(vfd->name));
++
++ ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
++ if (ret) {
++ v4l2_err(&fdp1->v4l2_dev, "Failed to register video device\n");
++ goto release_m2m;
++ }
++
++ v4l2_info(&fdp1->v4l2_dev,
++ "Device registered as /dev/video%d\n", vfd->num);
++
++ /* Power up the cells to read HW */
++ pm_runtime_enable(&pdev->dev);
++ pm_runtime_get_sync(fdp1->dev);
++
++ hw_version = fdp1_read(fdp1, FD1_IP_INTDATA);
++ switch (hw_version) {
++ case FD1_IP_H3:
++ dprintk(fdp1, "FDP1 Version R-Car H3\n");
++ break;
++ case FD1_IP_M3W:
++ dprintk(fdp1, "FDP1 Version R-Car M3-W\n");
++ break;
++ default:
++ dev_err(fdp1->dev, "FDP1 Unidentifiable (0x%08x)\n",
++ hw_version);
++ }
++
++ /* Allow the hw to sleep until an open call puts it to use */
++ pm_runtime_put(fdp1->dev);
++
++ return 0;
++
++release_m2m:
++ v4l2_m2m_release(fdp1->m2m_dev);
++
++unreg_dev:
++ v4l2_device_unregister(&fdp1->v4l2_dev);
++
++ return ret;
++}
++
++static int fdp1_remove(struct platform_device *pdev)
++{
++ struct fdp1_dev *fdp1 = platform_get_drvdata(pdev);
++
++ v4l2_m2m_release(fdp1->m2m_dev);
++ video_unregister_device(&fdp1->vfd);
++ v4l2_device_unregister(&fdp1->v4l2_dev);
++ pm_runtime_disable(&pdev->dev);
++
++ return 0;
++}
++
++static int fdp1_pm_runtime_suspend(struct device *dev)
++{
++ struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
++
++ rcar_fcp_disable(fdp1->fcp);
++
++ return 0;
++}
++
++static int fdp1_pm_runtime_resume(struct device *dev)
++{
++ struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
++
++ /* Program in the static LUTs */
++ fdp1_set_lut(fdp1);
++
++ return rcar_fcp_enable(fdp1->fcp);
++}
++
++static const struct dev_pm_ops fdp1_pm_ops = {
++ SET_RUNTIME_PM_OPS(fdp1_pm_runtime_suspend,
++ fdp1_pm_runtime_resume,
++ NULL)
++};
++
++static const struct of_device_id fdp1_dt_ids[] = {
++ { .compatible = "renesas,fdp1" },
++ { },
++};
++MODULE_DEVICE_TABLE(of, fdp1_dt_ids);
++
++static struct platform_driver fdp1_pdrv = {
++ .probe = fdp1_probe,
++ .remove = fdp1_remove,
++ .driver = {
++ .name = DRIVER_NAME,
++ .of_match_table = fdp1_dt_ids,
++ .pm = &fdp1_pm_ops,
++ },
++};
++
++module_platform_driver(fdp1_pdrv);
++
++MODULE_DESCRIPTION("Renesas R-Car Fine Display Processor Driver");
++MODULE_AUTHOR("Kieran Bingham <kieran@bingham.xyz>");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch b/patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch
new file mode 100644
index 0000000..ae230f1
--- /dev/null
+++ b/patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch
@@ -0,0 +1,43 @@
+From d7c7b9cb449c8853c9aa68bb80cd0a5c5e860f77 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 18 Nov 2016 14:16:04 -0200
+Subject: [PATCH 270/299] [media] v4l: rcar_fdp1: mark PM functions as
+ __maybe_unused
+
+The new driver produces a warning when CONFIG_PM is disabled:
+
+platform/rcar_fdp1.c:2408:12: error: 'fdp1_pm_runtime_resume' defined but not used [-Werror=unused-function]
+platform/rcar_fdp1.c:2399:12: error: 'fdp1_pm_runtime_suspend' defined but not used [-Werror=unused-function]
+
+This marks the two functions as __maybe_unused.
+
+Fixes: 4710b752e029 ("[media] v4l: Add Renesas R-Car FDP1 Driver")
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
+(cherry picked from commit fa4a2fd17dc5d2d1fbad7ace78d39d7fea20d78e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/rcar_fdp1.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/media/platform/rcar_fdp1.c
++++ b/drivers/media/platform/rcar_fdp1.c
+@@ -2396,7 +2396,7 @@ static int fdp1_remove(struct platform_d
+ return 0;
+ }
+
+-static int fdp1_pm_runtime_suspend(struct device *dev)
++static int __maybe_unused fdp1_pm_runtime_suspend(struct device *dev)
+ {
+ struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
+
+@@ -2405,7 +2405,7 @@ static int fdp1_pm_runtime_suspend(struc
+ return 0;
+ }
+
+-static int fdp1_pm_runtime_resume(struct device *dev)
++static int __maybe_unused fdp1_pm_runtime_resume(struct device *dev)
+ {
+ struct fdp1_dev *fdp1 = dev_get_drvdata(dev);
+
diff --git a/patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch b/patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch
new file mode 100644
index 0000000..14c613c
--- /dev/null
+++ b/patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch
@@ -0,0 +1,67 @@
+From 881a8863ea168c60e037ef687cadb87e3bbe9c4b Mon Sep 17 00:00:00 2001
+From: Felipe Balbi <felipe.balbi@linux.intel.com>
+Date: Mon, 26 Sep 2016 10:51:18 +0300
+Subject: [PATCH 271/299] usb: add helper to extract bits 12:11 of
+ wMaxPacketSize
+
+According to USB Specification 2.0 table 9-4,
+wMaxPacketSize is a bitfield. Endpoint's maxpacket
+is laid out in bits 10:0. For high-speed,
+high-bandwidth isochronous endpoints, bits 12:11
+contain a multiplier to tell us how many
+transactions we want to try per uframe.
+
+This means that if we want an isochronous endpoint
+to issue 3 transfers of 1024 bytes per uframe,
+wMaxPacketSize should contain the value:
+
+ 1024 | (2 << 11)
+
+or 5120 (0x1400). In order to make Host and
+Peripheral controller drivers' life easier, we're
+adding a helper which returns bits 12:11. Note that
+no care is made WRT to checking endpoint type and
+gadget's speed. That's left for drivers to handle.
+
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit 541b6fe63023f3059cf85d47ff2767a3e42a8e44)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/uapi/linux/usb/ch9.h | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/include/uapi/linux/usb/ch9.h
++++ b/include/uapi/linux/usb/ch9.h
+@@ -423,6 +423,11 @@ struct usb_endpoint_descriptor {
+ #define USB_ENDPOINT_XFER_INT 3
+ #define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
+
++#define USB_EP_MAXP_MULT_SHIFT 11
++#define USB_EP_MAXP_MULT_MASK (3 << USB_EP_MAXP_MULT_SHIFT)
++#define USB_EP_MAXP_MULT(m) \
++ (((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT)
++
+ /* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
+ #define USB_ENDPOINT_INTRTYPE 0x30
+ #define USB_ENDPOINT_INTR_PERIODIC (0 << 4)
+@@ -630,6 +635,20 @@ static inline int usb_endpoint_maxp(cons
+ return __le16_to_cpu(epd->wMaxPacketSize);
+ }
+
++/**
++ * usb_endpoint_maxp_mult - get endpoint's transactional opportunities
++ * @epd: endpoint to be checked
++ *
++ * Return @epd's wMaxPacketSize[12:11] + 1
++ */
++static inline int
++usb_endpoint_maxp_mult(const struct usb_endpoint_descriptor *epd)
++{
++ int maxp = __le16_to_cpu(epd->wMaxPacketSize);
++
++ return USB_EP_MAXP_MULT(maxp) + 1;
++}
++
+ static inline int usb_endpoint_interrupt_type(
+ const struct usb_endpoint_descriptor *epd)
+ {
diff --git a/patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch b/patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch
new file mode 100644
index 0000000..c90d2d8
--- /dev/null
+++ b/patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch
@@ -0,0 +1,41 @@
+From 64be689600684985c8c2569f2486fc6a65fe49db Mon Sep 17 00:00:00 2001
+From: Felipe Balbi <felipe.balbi@linux.intel.com>
+Date: Wed, 28 Sep 2016 13:39:22 +0300
+Subject: [PATCH 272/299] usb: host: xhci: make use of new
+ usb_endpoint_maxp_mult()
+
+We have introduced a helper to calculate multiplier
+value from wMaxPacketSize. Start using it.
+
+Cc: Mathias Nyman <mathias.nyman@intel.com>
+Cc: <linux-usb@vger.kernel.org>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit dcf5228c1c78c217eedade8455e20af32d359e00)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-mem.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -1404,7 +1404,7 @@ static u32 xhci_get_endpoint_max_burst(s
+ if (udev->speed == USB_SPEED_HIGH &&
+ (usb_endpoint_xfer_isoc(&ep->desc) ||
+ usb_endpoint_xfer_int(&ep->desc)))
+- return (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11;
++ return usb_endpoint_maxp_mult(&ep->desc) - 1;
+
+ return 0;
+ }
+@@ -1450,9 +1450,9 @@ static u32 xhci_get_max_esit_payload(str
+ return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
+
+ max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
+- max_burst = (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11;
++ max_burst = usb_endpoint_maxp_mult(&ep->desc);
+ /* A 0 in max burst means 1 transfer per ESIT */
+- return max_packet * (max_burst + 1);
++ return max_packet * max_burst;
+ }
+
+ /* Set up an endpoint with one ring segment. Do not allocate stream rings.
diff --git a/patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch b/patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch
new file mode 100644
index 0000000..befe425
--- /dev/null
+++ b/patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch
@@ -0,0 +1,114 @@
+From f858de149c1845ca7c0b81e9172febfa6b09e81a Mon Sep 17 00:00:00 2001
+From: Felipe Balbi <felipe.balbi@linux.intel.com>
+Date: Wed, 28 Sep 2016 13:46:37 +0300
+Subject: [PATCH 273/299] usb: host: xhci: purge GET_MAX_PACKET()
+
+usb_endpoint_maxp() is now returning maxpacket
+correctly - iow only bits 10:0. We can finaly remove
+XHCI's private GET_MAX_PACKET macro.
+
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+(cherry picked from commit 734d3ddd81902d839e5bba50601b011f6ae40d05)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-mem.c | 4 ++--
+ drivers/usb/host/xhci-mtk-sch.c | 4 ++--
+ drivers/usb/host/xhci-ring.c | 6 +++---
+ drivers/usb/host/xhci.c | 2 +-
+ drivers/usb/host/xhci.h | 5 -----
+ 5 files changed, 8 insertions(+), 13 deletions(-)
+
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -1449,7 +1449,7 @@ static u32 xhci_get_max_esit_payload(str
+ else if (udev->speed >= USB_SPEED_SUPER)
+ return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
+
+- max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
++ max_packet = usb_endpoint_maxp(&ep->desc);
+ max_burst = usb_endpoint_maxp_mult(&ep->desc);
+ /* A 0 in max burst means 1 transfer per ESIT */
+ return max_packet * max_burst;
+@@ -1506,7 +1506,7 @@ int xhci_endpoint_init(struct xhci_hcd *
+ }
+
+ mult = xhci_get_endpoint_mult(udev, ep);
+- max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
++ max_packet = usb_endpoint_maxp(&ep->desc);
+ max_burst = xhci_get_endpoint_max_burst(udev, ep);
+ avg_trb_len = max_esit_payload;
+
+--- a/drivers/usb/host/xhci-mtk-sch.c
++++ b/drivers/usb/host/xhci-mtk-sch.c
+@@ -337,7 +337,7 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd
+
+ xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
+ __func__, usb_endpoint_type(&ep->desc), udev->speed,
+- GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
++ usb_endpoint_maxp(&ep->desc),
+ usb_endpoint_dir_in(&ep->desc), ep);
+
+ if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
+@@ -403,7 +403,7 @@ void xhci_mtk_drop_ep_quirk(struct usb_h
+
+ xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
+ __func__, usb_endpoint_type(&ep->desc), udev->speed,
+- GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
++ usb_endpoint_maxp(&ep->desc),
+ usb_endpoint_dir_in(&ep->desc), ep);
+
+ if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -3145,7 +3145,7 @@ static u32 xhci_td_remainder(struct xhci
+ if (xhci->quirks & XHCI_MTK_HOST)
+ trb_buff_len = 0;
+
+- maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
++ maxp = usb_endpoint_maxp(&urb->ep->desc);
+ total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
+
+ /* Queueing functions don't count the current TRB into transferred */
+@@ -3161,7 +3161,7 @@ static int xhci_align_td(struct xhci_hcd
+ unsigned int max_pkt;
+ u32 new_buff_len;
+
+- max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
++ max_pkt = usb_endpoint_maxp(&urb->ep->desc);
+ unalign = (enqd_len + *trb_buff_len) % max_pkt;
+
+ /* we got lucky, last normal TRB data on segment is packet aligned */
+@@ -3675,7 +3675,7 @@ static int xhci_queue_isoc_tx(struct xhc
+ addr = start_addr + urb->iso_frame_desc[i].offset;
+ td_len = urb->iso_frame_desc[i].length;
+ td_remain_len = td_len;
+- max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
++ max_pkt = usb_endpoint_maxp(&urb->ep->desc);
+ total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
+
+ /* A zero-length transfer still involves at least one packet. */
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3202,7 +3202,7 @@ int xhci_alloc_streams(struct usb_hcd *h
+
+ for (i = 0; i < num_eps; i++) {
+ ep_index = xhci_get_endpoint_index(&eps[i]->desc);
+- max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&eps[i]->desc));
++ max_packet = usb_endpoint_maxp(&eps[i]->desc);
+ vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
+ num_stream_ctxs,
+ num_streams,
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -747,11 +747,6 @@ struct xhci_ep_ctx {
+ #define MAX_PACKET_MASK (0xffff << 16)
+ #define MAX_PACKET_DECODED(p) (((p) >> 16) & 0xffff)
+
+-/* Get max packet size from ep desc. Bit 10..0 specify the max packet size.
+- * USB2.0 spec 9.6.6.
+- */
+-#define GET_MAX_PACKET(p) ((p) & 0x7ff)
+-
+ /* tx_info bitmasks */
+ #define EP_AVG_TRB_LENGTH(p) ((p) & 0xffff)
+ #define EP_MAX_ESIT_PAYLOAD_LO(p) (((p) & 0xffff) << 16)
diff --git a/patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch b/patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch
new file mode 100644
index 0000000..e39f414
--- /dev/null
+++ b/patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch
@@ -0,0 +1,27 @@
+From bfe973d01f2cd833198a3ccd034e7e77a597c77a Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:10 +0200
+Subject: [PATCH 274/299] xhci: remove unnecessary xhci_quiesce call before
+ xhci_halt
+
+Fist function called in xhci_halt is xhci_quiesce, so no point
+in calling it twice
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit cf5d344e13655df2fcb049ae212fe59c617349a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -353,7 +353,6 @@ static int xhci_abort_cmd_ring(struct xh
+ xhci_err(xhci, "Stopped the command ring failed, "
+ "maybe the host is dead\n");
+ xhci->xhc_state |= XHCI_STATE_DYING;
+- xhci_quiesce(xhci);
+ xhci_halt(xhci);
+ return -ESHUTDOWN;
+ }
diff --git a/patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch b/patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch
new file mode 100644
index 0000000..c86b6b9
--- /dev/null
+++ b/patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch
@@ -0,0 +1,44 @@
+From 195c24ab81243af67b47c005f057f768952ab37a Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:11 +0200
+Subject: [PATCH 275/299] xhci: cleanup error message if halting the host
+ failed.
+
+The old error message always stated that host was not halted
+even after trying a certain time.
+
+Host may fail the halt immediately as well with -ENODEV if device
+is removed and returns 0xffffffff.
+
+Use a more generic error message and show return value to know if we
+failed with -ETIMEDOUT or -ENODEV
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 99154fd3aa9ce49f0fb842f2b07f174ae7345b64)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -113,12 +113,12 @@ int xhci_halt(struct xhci_hcd *xhci)
+
+ ret = xhci_handshake(&xhci->op_regs->status,
+ STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
+- if (!ret) {
+- xhci->xhc_state |= XHCI_STATE_HALTED;
+- xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
+- } else
+- xhci_warn(xhci, "Host not halted after %u microseconds.\n",
+- XHCI_MAX_HALT_USEC);
++ if (ret) {
++ xhci_warn(xhci, "Host halt failed, %d\n", ret);
++ return ret;
++ }
++ xhci->xhc_state |= XHCI_STATE_HALTED;
++ xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
+ return ret;
+ }
+
diff --git a/patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch b/patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch
new file mode 100644
index 0000000..8410b24
--- /dev/null
+++ b/patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch
@@ -0,0 +1,42 @@
+From 3de4e7dbb9279d8e161873ad0c2f7394656d3d2a Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:12 +0200
+Subject: [PATCH 276/299] xhci: don't try to reset the host if it is
+ unaccessible
+
+There is no point in trying to reset the host controller by writing
+to its registers if host is removed and registers just return 0xffffffff
+
+bail out and return -ENODEV instead
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit c11ae038d62bf07231be7b813435e5067c978ddc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -167,6 +167,12 @@ int xhci_reset(struct xhci_hcd *xhci)
+ int ret, i;
+
+ state = readl(&xhci->op_regs->status);
++
++ if (state == ~(u32)0) {
++ xhci_warn(xhci, "Host not accessible, reset failed.\n");
++ return -ENODEV;
++ }
++
+ if ((state & STS_HALT) == 0) {
+ xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
+ return 0;
+@@ -693,7 +699,6 @@ void xhci_stop(struct usb_hcd *hcd)
+ xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
+ xhci_halt(xhci);
+ xhci_reset(xhci);
+-
+ spin_unlock_irq(&xhci->lock);
+ }
+
diff --git a/patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch b/patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch
new file mode 100644
index 0000000..681f71c
--- /dev/null
+++ b/patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch
@@ -0,0 +1,59 @@
+From 411d7545e4cd57406461fad928dbf4fb266da044 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:13 +0200
+Subject: [PATCH 277/299] xhci: use trb helper functions when possible
+
+Use the trb_is_link() and link_trb_toggles_cycle() helpers to
+make the code more readable
+
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 3495e451d1375f74bd6f9ee851c740e2c96118ae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 11 +++++------
+ 1 file changed, 5 insertions(+), 6 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -539,9 +539,8 @@ void xhci_find_new_dequeue_state(struct
+ if (new_deq == cur_td->last_trb)
+ td_last_trb_found = true;
+
+- if (cycle_found &&
+- TRB_TYPE_LINK_LE32(new_deq->generic.field[3]) &&
+- new_deq->generic.field[3] & cpu_to_le32(LINK_TOGGLE))
++ if (cycle_found && trb_is_link(new_deq) &&
++ link_trb_toggles_cycle(new_deq))
+ state->new_cycle_state ^= 0x1;
+
+ next_trb(xhci, ep_ring, &new_seg, &new_deq);
+@@ -585,7 +584,7 @@ static void td_to_noop(struct xhci_hcd *
+ for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
+ true;
+ next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+- if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) {
++ if (trb_is_link(cur_trb)) {
+ /* Unchain any chained Link TRBs, but
+ * leave the pointers intact.
+ */
+@@ -2139,7 +2138,7 @@ static int process_isoc_td(struct xhci_h
+ cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
+ next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+ if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
+- !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
++ !trb_is_link(cur_trb))
+ len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+ }
+ len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
+@@ -2285,7 +2284,7 @@ static int process_bulk_intr_td(struct x
+ cur_trb != event_trb;
+ next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+ if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
+- !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
++ !trb_is_link(cur_trb))
+ td->urb->actual_length +=
+ TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+ }
diff --git a/patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch b/patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch
new file mode 100644
index 0000000..15c2a2f
--- /dev/null
+++ b/patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch
@@ -0,0 +1,64 @@
+From 8f079ac2ec06abd4fe55df20038bf1e4a997d4a5 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:14 +0200
+Subject: [PATCH 278/299] xhci: add trb_is_noop() helper function
+
+replace the complex check for noop with a simple helper
+Improve code readability
+
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 0ce5749959c627442b062809e91f0320d92517b2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 16 +++++++++-------
+ 1 file changed, 9 insertions(+), 7 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -89,6 +89,11 @@ dma_addr_t xhci_trb_virt_to_dma(struct x
+ return seg->dma + (segment_offset * sizeof(*trb));
+ }
+
++static bool trb_is_noop(union xhci_trb *trb)
++{
++ return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
++}
++
+ static bool trb_is_link(union xhci_trb *trb)
+ {
+ return TRB_TYPE_LINK_LE32(trb->link.control);
+@@ -2137,8 +2142,7 @@ static int process_isoc_td(struct xhci_h
+ for (cur_trb = ep_ring->dequeue,
+ cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
+ next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+- if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
+- !trb_is_link(cur_trb))
++ if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
+ len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+ }
+ len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
+@@ -2283,8 +2287,7 @@ static int process_bulk_intr_td(struct x
+ for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
+ cur_trb != event_trb;
+ next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+- if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
+- !trb_is_link(cur_trb))
++ if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
+ td->urb->actual_length +=
+ TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+ }
+@@ -2584,9 +2587,8 @@ static int handle_tx_event(struct xhci_h
+ * corresponding TD has been cancelled. Just ignore
+ * the TD.
+ */
+- if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) {
+- xhci_dbg(xhci,
+- "event_trb is a no-op TRB. Skip it\n");
++ if (trb_is_noop(event_trb)) {
++ xhci_dbg(xhci, "event_trb is a no-op TRB. Skip it\n");
+ goto cleanup;
+ }
+
diff --git a/patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch b/patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch
new file mode 100644
index 0000000..1a0c192
--- /dev/null
+++ b/patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch
@@ -0,0 +1,123 @@
+From 39c396a88f7e74af27f0379390bd86a9abce7c52 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:15 +0200
+Subject: [PATCH 279/299] xhci: remove extra URB_SHORT_NOT_OK checks in xhci,
+ core handles most cases
+
+We only check for the URB_SHORT_NOT_OK urb flag to set the urb status
+to -EREMOTEIO for transfers that didn't transfer all data.
+
+This will be done in __usb_hcd_giveback() for other than isoc tranfers,
+so remove the redundant check from xhci.
+
+Also fix a couple split lines in debug messages to make them greppable.
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 52ab86852f74c21a8f7fc5f2eb7f70b81d99eb99)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 54 +++++--------------------------------------
+ 1 file changed, 7 insertions(+), 47 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1921,9 +1921,6 @@ td_cleanup:
+ urb->transfer_buffer_length,
+ urb->actual_length);
+ urb->actual_length = 0;
+- if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
+- *status = -EREMOTEIO;
+- else
+ *status = 0;
+ }
+ list_del_init(&td->td_list);
+@@ -1983,9 +1980,6 @@ static int process_ctrl_td(struct xhci_h
+ }
+ break;
+ case COMP_SHORT_TX:
+- if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
+- *status = -EREMOTEIO;
+- else
+ *status = 0;
+ break;
+ case COMP_STOP_SHORT:
+@@ -2032,16 +2026,7 @@ static int process_ctrl_td(struct xhci_h
+ if (event_trb != ep_ring->dequeue) {
+ /* The event was for the status stage */
+ if (event_trb == td->last_trb) {
+- if (td->urb_length_set) {
+- /* Don't overwrite a previously set error code
+- */
+- if ((*status == -EINPROGRESS || *status == 0) &&
+- (td->urb->transfer_flags
+- & URB_SHORT_NOT_OK))
+- /* Did we already see a short data
+- * stage? */
+- *status = -EREMOTEIO;
+- } else {
++ if (!td->urb_length_set) {
+ td->urb->actual_length =
+ td->urb->transfer_buffer_length;
+ }
+@@ -2205,24 +2190,15 @@ static int process_bulk_intr_td(struct x
+ /* Double check that the HW transferred everything. */
+ if (event_trb != td->last_trb ||
+ EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
+- xhci_warn(xhci, "WARN Successful completion "
+- "on short TX\n");
+- if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
+- *status = -EREMOTEIO;
+- else
+- *status = 0;
++ xhci_warn(xhci, "WARN Successful completion on short TX\n");
+ if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
+ trb_comp_code = COMP_SHORT_TX;
+- } else {
+- *status = 0;
+ }
++ *status = 0;
+ break;
+ case COMP_STOP_SHORT:
+ case COMP_SHORT_TX:
+- if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
+- *status = -EREMOTEIO;
+- else
+- *status = 0;
++ *status = 0;
+ break;
+ default:
+ /* Others already handled above */
+@@ -2254,29 +2230,13 @@ static int process_bulk_intr_td(struct x
+ EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+ if (td->urb->transfer_buffer_length <
+ td->urb->actual_length) {
+- xhci_warn(xhci, "HC gave bad length "
+- "of %d bytes left\n",
++ xhci_warn(xhci, "HC gave bad length of %d bytes left\n",
+ EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
+ td->urb->actual_length = 0;
+- if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
+- *status = -EREMOTEIO;
+- else
+- *status = 0;
++ *status = 0;
+ }
+ /* Don't overwrite a previously set error code */
+- if (*status == -EINPROGRESS) {
+- if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
+- *status = -EREMOTEIO;
+- else
+- *status = 0;
+- }
+- } else {
+- td->urb->actual_length =
+- td->urb->transfer_buffer_length;
+- /* Ignore a short packet completion if the
+- * untransferred length was zero.
+- */
+- if (*status == -EREMOTEIO)
++ if (*status == -EINPROGRESS)
+ *status = 0;
+ }
+ } else {
diff --git a/patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch b/patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch
new file mode 100644
index 0000000..12acd53
--- /dev/null
+++ b/patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch
@@ -0,0 +1,160 @@
+From 74689c2344e6b0b5232b7cf167aebd2e0a4ecbf7 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:16 +0200
+Subject: [PATCH 280/299] xhci: cleanup and refactor process_ctrl_td()
+
+Refactor pricess_ctrl_tx() to make it more readable
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 0b6c324c8b6097b482decff8183f67c9a8a6e2a3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 103 ++++++++++++++++++-------------------------
+ 1 file changed, 45 insertions(+), 58 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1957,6 +1957,8 @@ static int process_ctrl_td(struct xhci_h
+ int ep_index;
+ struct xhci_ep_ctx *ep_ctx;
+ u32 trb_comp_code;
++ u32 remaining, requested;
++ bool on_data_stage;
+
+ slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
+ xdev = xhci->devs[slot_id];
+@@ -1964,89 +1966,74 @@ static int process_ctrl_td(struct xhci_h
+ ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
+ ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
+ trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
++ requested = td->urb->transfer_buffer_length;
++ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
++
++ /* not setup (dequeue), or status stage means we are at data stage */
++ on_data_stage = (event_trb != ep_ring->dequeue &&
++ event_trb != td->last_trb);
+
+ switch (trb_comp_code) {
+ case COMP_SUCCESS:
+- if (event_trb == ep_ring->dequeue) {
+- xhci_warn(xhci, "WARN: Success on ctrl setup TRB "
+- "without IOC set??\n");
+- *status = -ESHUTDOWN;
+- } else if (event_trb != td->last_trb) {
+- xhci_warn(xhci, "WARN: Success on ctrl data TRB "
+- "without IOC set??\n");
++ if (event_trb != td->last_trb) {
++ xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
++ on_data_stage ? "data" : "setup");
+ *status = -ESHUTDOWN;
+- } else {
+- *status = 0;
++ break;
+ }
++ *status = 0;
+ break;
+ case COMP_SHORT_TX:
+- *status = 0;
++ *status = 0;
+ break;
+ case COMP_STOP_SHORT:
+- if (event_trb == ep_ring->dequeue || event_trb == td->last_trb)
+- xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
++ if (on_data_stage)
++ td->urb->actual_length = remaining;
+ else
+- td->urb->actual_length =
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+-
+- return finish_td(xhci, td, event_trb, event, ep, status, false);
++ xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
++ goto finish_td;
+ case COMP_STOP:
+- /* Did we stop at data stage? */
+- if (event_trb != ep_ring->dequeue && event_trb != td->last_trb)
+- td->urb->actual_length =
+- td->urb->transfer_buffer_length -
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+- /* fall through */
++ if (on_data_stage)
++ td->urb->actual_length = requested - remaining;
++ goto finish_td;
+ case COMP_STOP_INVAL:
+- return finish_td(xhci, td, event_trb, event, ep, status, false);
++ goto finish_td;
+ default:
+ if (!xhci_requires_manual_halt_cleanup(xhci,
+- ep_ctx, trb_comp_code))
++ ep_ctx, trb_comp_code))
+ break;
+- xhci_dbg(xhci, "TRB error code %u, "
+- "halted endpoint index = %u\n",
+- trb_comp_code, ep_index);
++ xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
++ trb_comp_code, ep_index);
+ /* else fall through */
+ case COMP_STALL:
+ /* Did we transfer part of the data (middle) phase? */
+- if (event_trb != ep_ring->dequeue &&
+- event_trb != td->last_trb)
+- td->urb->actual_length =
+- td->urb->transfer_buffer_length -
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
++ if (on_data_stage)
++ td->urb->actual_length = requested - remaining;
+ else if (!td->urb_length_set)
+ td->urb->actual_length = 0;
+-
+- return finish_td(xhci, td, event_trb, event, ep, status, false);
++ goto finish_td;
+ }
++
++ /* stopped at setup stage, no data transferred */
++ if (event_trb == ep_ring->dequeue)
++ goto finish_td;
++
+ /*
+- * Did we transfer any data, despite the errors that might have
+- * happened? I.e. did we get past the setup stage?
++ * if on data stage then update the actual_length of the URB and flag it
++ * as set, so it won't be overwritten in the event for the last TRB.
+ */
+- if (event_trb != ep_ring->dequeue) {
+- /* The event was for the status stage */
+- if (event_trb == td->last_trb) {
+- if (!td->urb_length_set) {
+- td->urb->actual_length =
+- td->urb->transfer_buffer_length;
+- }
+- } else {
+- /*
+- * Maybe the event was for the data stage? If so, update
+- * already the actual_length of the URB and flag it as
+- * set, so that it is not overwritten in the event for
+- * the last TRB.
+- */
+- td->urb_length_set = true;
+- td->urb->actual_length =
+- td->urb->transfer_buffer_length -
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+- xhci_dbg(xhci, "Waiting for status "
+- "stage event\n");
+- return 0;
+- }
++ if (on_data_stage) {
++ td->urb_length_set = true;
++ td->urb->actual_length = requested - remaining;
++ xhci_dbg(xhci, "Waiting for status stage event\n");
++ return 0;
+ }
+
++ /* at status stage */
++ if (!td->urb_length_set)
++ td->urb->actual_length = requested;
++
++finish_td:
+ return finish_td(xhci, td, event_trb, event, ep, status, false);
+ }
+
diff --git a/patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch b/patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch
new file mode 100644
index 0000000..27a0d0f
--- /dev/null
+++ b/patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch
@@ -0,0 +1,162 @@
+From d6882162971f3b10808477b84bd2207802bf6ec6 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:17 +0200
+Subject: [PATCH 281/299] xhci: cleanup and refactor process_bulk_intr_td()
+
+mostly refactoring, but does also change error message if
+we get a bad length in the event trb.
+
+Adds a helper function to sum trb lengths of partial TDs
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 30a65b45bfb1a978f5576eeb8280d332c0aada74)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 108 ++++++++++++++++++-------------------------
+ 1 file changed, 46 insertions(+), 62 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1944,6 +1944,21 @@ td_cleanup:
+ return ret;
+ }
+
++/* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
++static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
++ union xhci_trb *stop_trb)
++{
++ u32 sum;
++ union xhci_trb *trb = ring->dequeue;
++ struct xhci_segment *seg = ring->deq_seg;
++
++ for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
++ if (!trb_is_noop(trb) && !trb_is_link(trb))
++ sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
++ }
++ return sum;
++}
++
+ /*
+ * Process control tds, update urb status and actual_length.
+ */
+@@ -2165,88 +2180,57 @@ static int process_bulk_intr_td(struct x
+ struct xhci_virt_ep *ep, int *status)
+ {
+ struct xhci_ring *ep_ring;
+- union xhci_trb *cur_trb;
+- struct xhci_segment *cur_seg;
+ u32 trb_comp_code;
++ u32 remaining, requested, event_trb_len;
+
+ ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
+ trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
++ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
++ event_trb_len = TRB_LEN(le32_to_cpu(event_trb->generic.field[2]));
++ requested = td->urb->transfer_buffer_length;
+
+ switch (trb_comp_code) {
+ case COMP_SUCCESS:
+- /* Double check that the HW transferred everything. */
+- if (event_trb != td->last_trb ||
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
++ /* handle success with untransferred data as short packet */
++ if (event_trb != td->last_trb || remaining) {
+ xhci_warn(xhci, "WARN Successful completion on short TX\n");
+- if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
+- trb_comp_code = COMP_SHORT_TX;
++ xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
++ td->urb->ep->desc.bEndpointAddress,
++ requested, remaining);
+ }
+ *status = 0;
+ break;
+- case COMP_STOP_SHORT:
+ case COMP_SHORT_TX:
++ xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
++ td->urb->ep->desc.bEndpointAddress,
++ requested, remaining);
+ *status = 0;
+ break;
++ case COMP_STOP_SHORT:
++ td->urb->actual_length = remaining;
++ goto finish_td;
++ case COMP_STOP_INVAL:
++ /* stopped on ep trb with invalid length, exclude it */
++ event_trb_len = 0;
++ remaining = 0;
++ break;
+ default:
+- /* Others already handled above */
++ /* do nothing */
+ break;
+ }
+- if (trb_comp_code == COMP_SHORT_TX)
+- xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
+- "%d bytes untransferred\n",
+- td->urb->ep->desc.bEndpointAddress,
+- td->urb->transfer_buffer_length,
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
+- /* Stopped - short packet completion */
+- if (trb_comp_code == COMP_STOP_SHORT) {
+- td->urb->actual_length =
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+
+- if (td->urb->transfer_buffer_length <
+- td->urb->actual_length) {
+- xhci_warn(xhci, "HC gave bad length of %d bytes txed\n",
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
+- td->urb->actual_length = 0;
+- /* status will be set by usb core for canceled urbs */
+- }
+- /* Fast path - was this the last TRB in the TD for this URB? */
+- } else if (event_trb == td->last_trb) {
+- if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
+- td->urb->actual_length =
+- td->urb->transfer_buffer_length -
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+- if (td->urb->transfer_buffer_length <
+- td->urb->actual_length) {
+- xhci_warn(xhci, "HC gave bad length of %d bytes left\n",
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
+- td->urb->actual_length = 0;
+- *status = 0;
+- }
+- /* Don't overwrite a previously set error code */
+- if (*status == -EINPROGRESS)
+- *status = 0;
+- }
+- } else {
+- /* Slow path - walk the list, starting from the dequeue
+- * pointer, to get the actual length transferred.
+- */
++ if (event_trb == td->last_trb)
++ td->urb->actual_length = requested - remaining;
++ else
++ td->urb->actual_length =
++ sum_trb_lengths(xhci, ep_ring, event_trb) +
++ event_trb_len - remaining;
++finish_td:
++ if (remaining > requested) {
++ xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
++ remaining);
+ td->urb->actual_length = 0;
+- for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
+- cur_trb != event_trb;
+- next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+- if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
+- td->urb->actual_length +=
+- TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+- }
+- /* If the ring didn't stop on a Link or No-op TRB, add
+- * in the actual bytes transferred from the Normal TRB
+- */
+- if (trb_comp_code != COMP_STOP_INVAL)
+- td->urb->actual_length +=
+- TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+ }
+-
+ return finish_td(xhci, td, event_trb, event, ep, status, false);
+ }
+
diff --git a/patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch b/patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch
new file mode 100644
index 0000000..c80d939
--- /dev/null
+++ b/patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch
@@ -0,0 +1,290 @@
+From bab340dadee90112f8d1930e59534d3107a44fcf Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:18 +0200
+Subject: [PATCH 282/299] xhci: rename endpoint related trb variables
+
+Renaming variables, no functional changes
+
+Event trbs on the event ring cointain a pointer to the transfer trb
+on a endpoint ring that caused the event.
+
+The naming has been very confusing as the event trb was called "event"
+and the endpoint transfer trb was called "event_trb".
+
+rename all variables that are realated to the endpoint transfer trb
+from event_* to ep_*
+
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit f97c08ae329bcf0016379235e3f0bd6b8b2adbf9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 77 +++++++++++++++++++++----------------------
+ 1 file changed, 38 insertions(+), 39 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1787,7 +1787,7 @@ struct xhci_segment *trb_in_td(struct xh
+ static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
+ unsigned int slot_id, unsigned int ep_index,
+ unsigned int stream_id,
+- struct xhci_td *td, union xhci_trb *event_trb)
++ struct xhci_td *td, union xhci_trb *ep_trb)
+ {
+ struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
+ struct xhci_command *command;
+@@ -1852,7 +1852,7 @@ int xhci_is_vendor_info_code(struct xhci
+ * Return 1 if the urb can be given back.
+ */
+ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
+- union xhci_trb *event_trb, struct xhci_transfer_event *event,
++ union xhci_trb *ep_trb, struct xhci_transfer_event *event,
+ struct xhci_virt_ep *ep, int *status, bool skip)
+ {
+ struct xhci_virt_device *xdev;
+@@ -1894,7 +1894,7 @@ static int finish_td(struct xhci_hcd *xh
+ * The class driver clears the device side halt later.
+ */
+ xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
+- ep_ring->stream_id, td, event_trb);
++ ep_ring->stream_id, td, ep_trb);
+ } else {
+ /* Update ring dequeue pointer */
+ while (ep_ring->dequeue != td->last_trb)
+@@ -1963,7 +1963,7 @@ static int sum_trb_lengths(struct xhci_h
+ * Process control tds, update urb status and actual_length.
+ */
+ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
+- union xhci_trb *event_trb, struct xhci_transfer_event *event,
++ union xhci_trb *ep_trb, struct xhci_transfer_event *event,
+ struct xhci_virt_ep *ep, int *status)
+ {
+ struct xhci_virt_device *xdev;
+@@ -1985,12 +1985,11 @@ static int process_ctrl_td(struct xhci_h
+ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+
+ /* not setup (dequeue), or status stage means we are at data stage */
+- on_data_stage = (event_trb != ep_ring->dequeue &&
+- event_trb != td->last_trb);
++ on_data_stage = (ep_trb != ep_ring->dequeue && ep_trb != td->last_trb);
+
+ switch (trb_comp_code) {
+ case COMP_SUCCESS:
+- if (event_trb != td->last_trb) {
++ if (ep_trb != td->last_trb) {
+ xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
+ on_data_stage ? "data" : "setup");
+ *status = -ESHUTDOWN;
+@@ -2030,7 +2029,7 @@ static int process_ctrl_td(struct xhci_h
+ }
+
+ /* stopped at setup stage, no data transferred */
+- if (event_trb == ep_ring->dequeue)
++ if (ep_trb == ep_ring->dequeue)
+ goto finish_td;
+
+ /*
+@@ -2049,14 +2048,14 @@ static int process_ctrl_td(struct xhci_h
+ td->urb->actual_length = requested;
+
+ finish_td:
+- return finish_td(xhci, td, event_trb, event, ep, status, false);
++ return finish_td(xhci, td, ep_trb, event, ep, status, false);
+ }
+
+ /*
+ * Process isochronous tds, update urb packet status and actual_length.
+ */
+ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
+- union xhci_trb *event_trb, struct xhci_transfer_event *event,
++ union xhci_trb *ep_trb, struct xhci_transfer_event *event,
+ struct xhci_virt_ep *ep, int *status)
+ {
+ struct xhci_ring *ep_ring;
+@@ -2106,7 +2105,7 @@ static int process_isoc_td(struct xhci_h
+ break;
+ case COMP_TX_ERR:
+ frame->status = -EPROTO;
+- if (event_trb != td->last_trb)
++ if (ep_trb != td->last_trb)
+ return 0;
+ skip_td = true;
+ break;
+@@ -2127,7 +2126,7 @@ static int process_isoc_td(struct xhci_h
+ td->urb->actual_length += frame->actual_length;
+ } else {
+ for (cur_trb = ep_ring->dequeue,
+- cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
++ cur_seg = ep_ring->deq_seg; cur_trb != ep_trb;
+ next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+ if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
+ len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+@@ -2141,7 +2140,7 @@ static int process_isoc_td(struct xhci_h
+ }
+ }
+
+- return finish_td(xhci, td, event_trb, event, ep, status, false);
++ return finish_td(xhci, td, ep_trb, event, ep, status, false);
+ }
+
+ static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
+@@ -2176,23 +2175,23 @@ static int skip_isoc_td(struct xhci_hcd
+ * Process bulk and interrupt tds, update urb status and actual_length.
+ */
+ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
+- union xhci_trb *event_trb, struct xhci_transfer_event *event,
++ union xhci_trb *ep_trb, struct xhci_transfer_event *event,
+ struct xhci_virt_ep *ep, int *status)
+ {
+ struct xhci_ring *ep_ring;
+ u32 trb_comp_code;
+- u32 remaining, requested, event_trb_len;
++ u32 remaining, requested, ep_trb_len;
+
+ ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
+ trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
+ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+- event_trb_len = TRB_LEN(le32_to_cpu(event_trb->generic.field[2]));
++ ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
+ requested = td->urb->transfer_buffer_length;
+
+ switch (trb_comp_code) {
+ case COMP_SUCCESS:
+ /* handle success with untransferred data as short packet */
+- if (event_trb != td->last_trb || remaining) {
++ if (ep_trb != td->last_trb || remaining) {
+ xhci_warn(xhci, "WARN Successful completion on short TX\n");
+ xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
+ td->urb->ep->desc.bEndpointAddress,
+@@ -2211,7 +2210,7 @@ static int process_bulk_intr_td(struct x
+ goto finish_td;
+ case COMP_STOP_INVAL:
+ /* stopped on ep trb with invalid length, exclude it */
+- event_trb_len = 0;
++ ep_trb_len = 0;
+ remaining = 0;
+ break;
+ default:
+@@ -2219,19 +2218,19 @@ static int process_bulk_intr_td(struct x
+ break;
+ }
+
+- if (event_trb == td->last_trb)
++ if (ep_trb == td->last_trb)
+ td->urb->actual_length = requested - remaining;
+ else
+ td->urb->actual_length =
+- sum_trb_lengths(xhci, ep_ring, event_trb) +
+- event_trb_len - remaining;
++ sum_trb_lengths(xhci, ep_ring, ep_trb) +
++ ep_trb_len - remaining;
+ finish_td:
+ if (remaining > requested) {
+ xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
+ remaining);
+ td->urb->actual_length = 0;
+ }
+- return finish_td(xhci, td, event_trb, event, ep, status, false);
++ return finish_td(xhci, td, ep_trb, event, ep, status, false);
+ }
+
+ /*
+@@ -2250,9 +2249,9 @@ static int handle_tx_event(struct xhci_h
+ unsigned int slot_id;
+ int ep_index;
+ struct xhci_td *td = NULL;
+- dma_addr_t event_dma;
+- struct xhci_segment *event_seg;
+- union xhci_trb *event_trb;
++ dma_addr_t ep_trb_dma;
++ struct xhci_segment *ep_seg;
++ union xhci_trb *ep_trb;
+ struct urb *urb = NULL;
+ int status = -EINPROGRESS;
+ struct urb_priv *urb_priv;
+@@ -2309,7 +2308,7 @@ static int handle_tx_event(struct xhci_h
+ td_num++;
+ }
+
+- event_dma = le64_to_cpu(event->buffer);
++ ep_trb_dma = le64_to_cpu(event->buffer);
+ trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
+ /* Look for common error cases */
+ switch (trb_comp_code) {
+@@ -2455,8 +2454,8 @@ static int handle_tx_event(struct xhci_h
+ td_num--;
+
+ /* Is this a TRB in the currently executing TD? */
+- event_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
+- td->last_trb, event_dma, false);
++ ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
++ td->last_trb, ep_trb_dma, false);
+
+ /*
+ * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
+@@ -2466,13 +2465,13 @@ static int handle_tx_event(struct xhci_h
+ * last TRB of the previous TD. The command completion handle
+ * will take care the rest.
+ */
+- if (!event_seg && (trb_comp_code == COMP_STOP ||
++ if (!ep_seg && (trb_comp_code == COMP_STOP ||
+ trb_comp_code == COMP_STOP_INVAL)) {
+ ret = 0;
+ goto cleanup;
+ }
+
+- if (!event_seg) {
++ if (!ep_seg) {
+ if (!ep->skip ||
+ !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
+ /* Some host controllers give a spurious
+@@ -2493,7 +2492,7 @@ static int handle_tx_event(struct xhci_h
+ trb_comp_code);
+ trb_in_td(xhci, ep_ring->deq_seg,
+ ep_ring->dequeue, td->last_trb,
+- event_dma, true);
++ ep_trb_dma, true);
+ return -ESHUTDOWN;
+ }
+
+@@ -2510,16 +2509,16 @@ static int handle_tx_event(struct xhci_h
+ ep->skip = false;
+ }
+
+- event_trb = &event_seg->trbs[(event_dma - event_seg->dma) /
+- sizeof(*event_trb)];
++ ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
++ sizeof(*ep_trb)];
+ /*
+ * No-op TRB should not trigger interrupts.
+- * If event_trb is a no-op TRB, it means the
++ * If ep_trb is a no-op TRB, it means the
+ * corresponding TD has been cancelled. Just ignore
+ * the TD.
+ */
+- if (trb_is_noop(event_trb)) {
+- xhci_dbg(xhci, "event_trb is a no-op TRB. Skip it\n");
++ if (trb_is_noop(ep_trb)) {
++ xhci_dbg(xhci, "ep_trb is a no-op TRB. Skip it\n");
+ goto cleanup;
+ }
+
+@@ -2527,13 +2526,13 @@ static int handle_tx_event(struct xhci_h
+ * the core
+ */
+ if (usb_endpoint_xfer_control(&td->urb->ep->desc))
+- ret = process_ctrl_td(xhci, td, event_trb, event, ep,
++ ret = process_ctrl_td(xhci, td, ep_trb, event, ep,
+ &status);
+ else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
+- ret = process_isoc_td(xhci, td, event_trb, event, ep,
++ ret = process_isoc_td(xhci, td, ep_trb, event, ep,
+ &status);
+ else
+- ret = process_bulk_intr_td(xhci, td, event_trb, event,
++ ret = process_bulk_intr_td(xhci, td, ep_trb, event,
+ ep, &status);
+
+ cleanup:
diff --git a/patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch b/patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch
new file mode 100644
index 0000000..2c3cefc
--- /dev/null
+++ b/patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch
@@ -0,0 +1,134 @@
+From 764f0cb7bf5ec97d64bb8914a423673e2ddbe6cb Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:19 +0200
+Subject: [PATCH 283/299] xhci: refactor and cleanup process_isoc_td()
+
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 36da3a1dd8d96644ac548358dbd524440a5ba153)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 69 +++++++++++++++++++------------------------
+ 1 file changed, 32 insertions(+), 37 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -2061,84 +2061,79 @@ static int process_isoc_td(struct xhci_h
+ struct xhci_ring *ep_ring;
+ struct urb_priv *urb_priv;
+ int idx;
+- int len = 0;
+- union xhci_trb *cur_trb;
+- struct xhci_segment *cur_seg;
+ struct usb_iso_packet_descriptor *frame;
+ u32 trb_comp_code;
+- bool skip_td = false;
++ bool sum_trbs_for_length = false;
++ u32 remaining, requested, ep_trb_len;
++ int short_framestatus;
+
+ ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
+ trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
+ urb_priv = td->urb->hcpriv;
+ idx = urb_priv->td_cnt;
+ frame = &td->urb->iso_frame_desc[idx];
++ requested = frame->length;
++ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
++ ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
++ short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
++ -EREMOTEIO : 0;
+
+ /* handle completion code */
+ switch (trb_comp_code) {
+ case COMP_SUCCESS:
+- if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) {
+- frame->status = 0;
++ if (remaining) {
++ frame->status = short_framestatus;
++ if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
++ sum_trbs_for_length = true;
+ break;
+ }
+- if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
+- trb_comp_code = COMP_SHORT_TX;
+- /* fallthrough */
+- case COMP_STOP_SHORT:
++ frame->status = 0;
++ break;
+ case COMP_SHORT_TX:
+- frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
+- -EREMOTEIO : 0;
++ frame->status = short_framestatus;
++ sum_trbs_for_length = true;
+ break;
+ case COMP_BW_OVER:
+ frame->status = -ECOMM;
+- skip_td = true;
+ break;
+ case COMP_BUFF_OVER:
+ case COMP_BABBLE:
+ frame->status = -EOVERFLOW;
+- skip_td = true;
+ break;
+ case COMP_DEV_ERR:
+ case COMP_STALL:
+ frame->status = -EPROTO;
+- skip_td = true;
+ break;
+ case COMP_TX_ERR:
+ frame->status = -EPROTO;
+ if (ep_trb != td->last_trb)
+ return 0;
+- skip_td = true;
+ break;
+ case COMP_STOP:
++ sum_trbs_for_length = true;
++ break;
++ case COMP_STOP_SHORT:
++ /* field normally containing residue now contains tranferred */
++ frame->status = short_framestatus;
++ requested = remaining;
++ break;
+ case COMP_STOP_INVAL:
++ requested = 0;
++ remaining = 0;
+ break;
+ default:
++ sum_trbs_for_length = true;
+ frame->status = -1;
+ break;
+ }
+
+- if (trb_comp_code == COMP_SUCCESS || skip_td) {
+- frame->actual_length = frame->length;
+- td->urb->actual_length += frame->length;
+- } else if (trb_comp_code == COMP_STOP_SHORT) {
+- frame->actual_length =
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+- td->urb->actual_length += frame->actual_length;
+- } else {
+- for (cur_trb = ep_ring->dequeue,
+- cur_seg = ep_ring->deq_seg; cur_trb != ep_trb;
+- next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+- if (!trb_is_noop(cur_trb) && !trb_is_link(cur_trb))
+- len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
+- }
+- len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
+- EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
++ if (sum_trbs_for_length)
++ frame->actual_length = sum_trb_lengths(xhci, ep_ring, ep_trb) +
++ ep_trb_len - remaining;
++ else
++ frame->actual_length = requested;
+
+- if (trb_comp_code != COMP_STOP_INVAL) {
+- frame->actual_length = len;
+- td->urb->actual_length += len;
+- }
+- }
++ td->urb->actual_length += frame->actual_length;
+
+ return finish_td(xhci, td, ep_trb, event, ep, status, false);
+ }
diff --git a/patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch b/patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch
new file mode 100644
index 0000000..eff2cce
--- /dev/null
+++ b/patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch
@@ -0,0 +1,91 @@
+From 36636c72248ed09c0c2aaa524f6150f58ff22a71 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:20 +0200
+Subject: [PATCH 284/299] xhci: cleanup and refactor td_to_noop()
+
+No functional changes but a few debugging outputs removed
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 0d58a1a047fb897d963faea0112089378285def5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 60 +++++++++++++------------------------------
+ 1 file changed, 19 insertions(+), 41 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -581,54 +581,32 @@ void xhci_find_new_dequeue_state(struct
+ * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
+ */
+ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
+- struct xhci_td *cur_td, bool flip_cycle)
++ struct xhci_td *td, bool flip_cycle)
+ {
+- struct xhci_segment *cur_seg;
+- union xhci_trb *cur_trb;
++ struct xhci_segment *seg = td->start_seg;
++ union xhci_trb *trb = td->first_trb;
+
+- for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb;
+- true;
+- next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
+- if (trb_is_link(cur_trb)) {
+- /* Unchain any chained Link TRBs, but
+- * leave the pointers intact.
+- */
+- cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
+- /* Flip the cycle bit (link TRBs can't be the first
+- * or last TRB).
+- */
+- if (flip_cycle)
+- cur_trb->generic.field[3] ^=
+- cpu_to_le32(TRB_CYCLE);
+- xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
+- "Cancel (unchain) link TRB");
+- xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
+- "Address = %p (0x%llx dma); "
+- "in seg %p (0x%llx dma)",
+- cur_trb,
+- (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
+- cur_seg,
+- (unsigned long long)cur_seg->dma);
++ while (1) {
++ if (trb_is_link(trb)) {
++ /* unchain chained link TRBs */
++ trb->link.control &= cpu_to_le32(~TRB_CHAIN);
+ } else {
+- cur_trb->generic.field[0] = 0;
+- cur_trb->generic.field[1] = 0;
+- cur_trb->generic.field[2] = 0;
++ trb->generic.field[0] = 0;
++ trb->generic.field[1] = 0;
++ trb->generic.field[2] = 0;
+ /* Preserve only the cycle bit of this TRB */
+- cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
+- /* Flip the cycle bit except on the first or last TRB */
+- if (flip_cycle && cur_trb != cur_td->first_trb &&
+- cur_trb != cur_td->last_trb)
+- cur_trb->generic.field[3] ^=
+- cpu_to_le32(TRB_CYCLE);
+- cur_trb->generic.field[3] |= cpu_to_le32(
++ trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
++ trb->generic.field[3] |= cpu_to_le32(
+ TRB_TYPE(TRB_TR_NOOP));
+- xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
+- "TRB to noop at offset 0x%llx",
+- (unsigned long long)
+- xhci_trb_virt_to_dma(cur_seg, cur_trb));
+ }
+- if (cur_trb == cur_td->last_trb)
++ /* flip cycle if asked to */
++ if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
++ trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
++
++ if (trb == td->last_trb)
+ break;
++
++ next_trb(xhci, ep_ring, &seg, &trb);
+ }
+ }
+
diff --git a/patches.renesas/0285-xhci-fix-non-static-symbol-warning.patch b/patches.renesas/0285-xhci-fix-non-static-symbol-warning.patch
new file mode 100644
index 0000000..e967cdc
--- /dev/null
+++ b/patches.renesas/0285-xhci-fix-non-static-symbol-warning.patch
@@ -0,0 +1,33 @@
+From 064174f9a631fae05598d530ac80898a3fde5443 Mon Sep 17 00:00:00 2001
+From: Wei Yongjun <weiyj.lk@gmail.com>
+Date: Fri, 11 Nov 2016 15:13:21 +0200
+Subject: [PATCH 285/299] xhci: fix non static symbol warning
+
+Fixes the following sparse warning:
+
+drivers/usb/host/xhci-ring.c:608:6: warning:
+ symbol 'xhci_unmap_td_bounce_buffer' was not declared.
+ Should it be static?
+
+Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 2d6d5769f82dc266e86a06f70eaae23265f757d6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -653,8 +653,8 @@ static void xhci_giveback_urb_in_irq(str
+ }
+ }
+
+-void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci, struct xhci_ring *ring,
+- struct xhci_td *td)
++static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
++ struct xhci_ring *ring, struct xhci_td *td)
+ {
+ struct device *dev = xhci_to_hcd(xhci)->self.controller;
+ struct xhci_segment *seg = td->bounce_seg;
diff --git a/patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch b/patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch
new file mode 100644
index 0000000..c6952ca
--- /dev/null
+++ b/patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch
@@ -0,0 +1,108 @@
+From bce395855b37503c7118a6915adef77a8b7f15da Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:22 +0200
+Subject: [PATCH 286/299] xhci: refactor handle_tx_event() urb giveback
+
+Move giving back the urb to a separate function
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 446b31419cb122f12900fe2004fb59e413008a8e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 61 ++++++++++++++++++++++---------------------
+ 1 file changed, 32 insertions(+), 29 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -622,6 +622,7 @@ static void xhci_stop_watchdog_timer_in_
+ ep->stop_cmds_pending--;
+ }
+
++
+ /* Must be called with xhci->lock held in interrupt context */
+ static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
+ struct xhci_td *cur_td, int status)
+@@ -653,6 +654,35 @@ static void xhci_giveback_urb_in_irq(str
+ }
+ }
+
++/*
++ * giveback urb, must be called with xhci->lock held.
++ * releases and re-aquires xhci->lock
++ */
++static void xhci_giveback_urb_locked(struct xhci_hcd *xhci, struct xhci_td *td,
++ int status)
++{
++ struct urb *urb = td->urb;
++ struct urb_priv *urb_priv = urb->hcpriv;
++
++ xhci_urb_free_priv(urb_priv);
++
++ usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
++ if ((urb->actual_length != urb->transfer_buffer_length &&
++ (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
++ (status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
++ xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
++ urb, urb->actual_length,
++ urb->transfer_buffer_length, status);
++ spin_unlock(&xhci->lock);
++ /* EHCI, UHCI, and OHCI always unconditionally set the
++ * urb->status of an isochronous endpoint to 0.
++ */
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
++ status = 0;
++ usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
++ spin_lock(&xhci->lock);
++}
++
+ static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
+ struct xhci_ring *ring, struct xhci_td *td)
+ {
+@@ -2225,9 +2255,7 @@ static int handle_tx_event(struct xhci_h
+ dma_addr_t ep_trb_dma;
+ struct xhci_segment *ep_seg;
+ union xhci_trb *ep_trb;
+- struct urb *urb = NULL;
+ int status = -EINPROGRESS;
+- struct urb_priv *urb_priv;
+ struct xhci_ep_ctx *ep_ctx;
+ struct list_head *tmp;
+ u32 trb_comp_code;
+@@ -2522,33 +2550,8 @@ cleanup:
+ if (!handling_skipped_tds)
+ inc_deq(xhci, xhci->event_ring);
+
+- if (ret) {
+- urb = td->urb;
+- urb_priv = urb->hcpriv;
+-
+- xhci_urb_free_priv(urb_priv);
+-
+- usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
+- if ((urb->actual_length != urb->transfer_buffer_length &&
+- (urb->transfer_flags &
+- URB_SHORT_NOT_OK)) ||
+- (status != 0 &&
+- !usb_endpoint_xfer_isoc(&urb->ep->desc)))
+- xhci_dbg(xhci, "Giveback URB %p, len = %d, "
+- "expected = %d, status = %d\n",
+- urb, urb->actual_length,
+- urb->transfer_buffer_length,
+- status);
+- spin_unlock(&xhci->lock);
+- /* EHCI, UHCI, and OHCI always unconditionally set the
+- * urb->status of an isochronous endpoint to 0.
+- */
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
+- status = 0;
+- usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
+- spin_lock(&xhci->lock);
+- }
+-
++ if (ret)
++ xhci_giveback_urb_locked(xhci, td, status);
+ /*
+ * If ep->skip is set, it means there are missed tds on the
+ * endpoint ring need to take care of.
diff --git a/patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch b/patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch
new file mode 100644
index 0000000..e6cca5f
--- /dev/null
+++ b/patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch
@@ -0,0 +1,144 @@
+From 808d84c901a67a719ae7ca3cba5ef598cbefb3e6 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:23 +0200
+Subject: [PATCH 287/299] xhci: Giveback urb in finish_td directly
+
+mostly refactoring and code cleanup.
+
+while handling transfer events we used to check the return value of
+various functions to see if we can give back the URB.
+Turns out the only case when those return values are set are when
+finish_td() notices we are completing the last td in the URB.
+
+give back the urb directly in finish_td() instead.
+
+Only functional change is that we now increase the event ring dequeue
+pointer in sowtware after giving back the URB. This should not matter
+as we are in hardware interrupt context and the time when writing the
+new event ring dequeue to hardware remains the same.
+Hardware is the only one that can put event TRBs on the event ring.
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 0c03d89d0c71722dfc0c4a2a300bff37324541dc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 31 ++++++++-----------------------
+ 1 file changed, 8 insertions(+), 23 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1869,7 +1869,6 @@ static int finish_td(struct xhci_hcd *xh
+ int ep_index;
+ struct urb *urb = NULL;
+ struct xhci_ep_ctx *ep_ctx;
+- int ret = 0;
+ struct urb_priv *urb_priv;
+ u32 trb_comp_code;
+
+@@ -1939,7 +1938,6 @@ td_cleanup:
+ urb_priv->td_cnt++;
+ /* Giveback the urb when all the tds are completed */
+ if (urb_priv->td_cnt == urb_priv->length) {
+- ret = 1;
+ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+ xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
+ if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
+@@ -1947,9 +1945,10 @@ td_cleanup:
+ usb_amd_quirk_pll_enable();
+ }
+ }
++ xhci_giveback_urb_locked(xhci, td, *status);
+ }
+
+- return ret;
++ return 0;
+ }
+
+ /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
+@@ -2259,7 +2258,6 @@ static int handle_tx_event(struct xhci_h
+ struct xhci_ep_ctx *ep_ctx;
+ struct list_head *tmp;
+ u32 trb_comp_code;
+- int ret = 0;
+ int td_num = 0;
+ bool handling_skipped_tds = false;
+
+@@ -2437,7 +2435,6 @@ static int handle_tx_event(struct xhci_h
+ xhci_dbg(xhci, "td_list is empty while skip "
+ "flag set. Clear skip flag.\n");
+ }
+- ret = 0;
+ goto cleanup;
+ }
+
+@@ -2446,7 +2443,6 @@ static int handle_tx_event(struct xhci_h
+ ep->skip = false;
+ xhci_dbg(xhci, "All tds on the ep_ring skipped. "
+ "Clear skip flag.\n");
+- ret = 0;
+ goto cleanup;
+ }
+
+@@ -2468,7 +2464,6 @@ static int handle_tx_event(struct xhci_h
+ */
+ if (!ep_seg && (trb_comp_code == COMP_STOP ||
+ trb_comp_code == COMP_STOP_INVAL)) {
+- ret = 0;
+ goto cleanup;
+ }
+
+@@ -2482,7 +2477,6 @@ static int handle_tx_event(struct xhci_h
+ if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
+ ep_ring->last_td_was_short) {
+ ep_ring->last_td_was_short = false;
+- ret = 0;
+ goto cleanup;
+ }
+ /* HC is busted, give up! */
+@@ -2497,7 +2491,7 @@ static int handle_tx_event(struct xhci_h
+ return -ESHUTDOWN;
+ }
+
+- ret = skip_isoc_td(xhci, td, event, ep, &status);
++ skip_isoc_td(xhci, td, event, ep, &status);
+ goto cleanup;
+ }
+ if (trb_comp_code == COMP_SHORT_TX)
+@@ -2523,22 +2517,15 @@ static int handle_tx_event(struct xhci_h
+ goto cleanup;
+ }
+
+- /* Now update the urb's actual_length and give back to
+- * the core
+- */
++ /* update the urb's actual_length and give back to the core */
+ if (usb_endpoint_xfer_control(&td->urb->ep->desc))
+- ret = process_ctrl_td(xhci, td, ep_trb, event, ep,
+- &status);
++ process_ctrl_td(xhci, td, ep_trb, event, ep, &status);
+ else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
+- ret = process_isoc_td(xhci, td, ep_trb, event, ep,
+- &status);
++ process_isoc_td(xhci, td, ep_trb, event, ep, &status);
+ else
+- ret = process_bulk_intr_td(xhci, td, ep_trb, event,
+- ep, &status);
+-
++ process_bulk_intr_td(xhci, td, ep_trb, event, ep,
++ &status);
+ cleanup:
+-
+-
+ handling_skipped_tds = ep->skip &&
+ trb_comp_code != COMP_MISSED_INT &&
+ trb_comp_code != COMP_PING_ERR;
+@@ -2550,8 +2537,6 @@ cleanup:
+ if (!handling_skipped_tds)
+ inc_deq(xhci, xhci->event_ring);
+
+- if (ret)
+- xhci_giveback_urb_locked(xhci, td, status);
+ /*
+ * If ep->skip is set, it means there are missed tds on the
+ * endpoint ring need to take care of.
diff --git a/patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch b/patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch
new file mode 100644
index 0000000..06aed19
--- /dev/null
+++ b/patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch
@@ -0,0 +1,205 @@
+From 6699005f41eeec6e3bcb831bb3f7c72299d59c63 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:24 +0200
+Subject: [PATCH 288/299] xhci: Remove duplicate xhci urb giveback functions
+
+We want one function that gives back urb in interrupt that can
+be used in both normal cases and when killing off urbs.
+
+Add small helpers that check if td is last_td_in_urb() and
+that increase the td count of a urb inc_td_cnt()
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 2a72126de1bb08594246a96347f7527bbef7e2df)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 127 +++++++++++++++++++------------------------
+ 1 file changed, 57 insertions(+), 70 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -115,6 +115,20 @@ static bool link_trb_toggles_cycle(union
+ return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
+ }
+
++static bool last_td_in_urb(struct xhci_td *td)
++{
++ struct urb_priv *urb_priv = td->urb->hcpriv;
++
++ return urb_priv->td_cnt == urb_priv->length;
++}
++
++static void inc_td_cnt(struct urb *urb)
++{
++ struct urb_priv *urb_priv = urb->hcpriv;
++
++ urb_priv->td_cnt++;
++}
++
+ /* Updates trb to point to the next TRB in the ring, and updates seg if the next
+ * TRB is in a new segment. This does not skip over link TRBs, and it does not
+ * effect the ring dequeue or enqueue pointers.
+@@ -622,64 +636,28 @@ static void xhci_stop_watchdog_timer_in_
+ ep->stop_cmds_pending--;
+ }
+
+-
+-/* Must be called with xhci->lock held in interrupt context */
++/*
++ * Must be called with xhci->lock held in interrupt context,
++ * releases and re-acquires xhci->lock
++ */
+ static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
+- struct xhci_td *cur_td, int status)
++ struct xhci_td *cur_td, int status)
+ {
+- struct usb_hcd *hcd;
+- struct urb *urb;
+- struct urb_priv *urb_priv;
+-
+- urb = cur_td->urb;
+- urb_priv = urb->hcpriv;
+- urb_priv->td_cnt++;
+- hcd = bus_to_hcd(urb->dev->bus);
+-
+- /* Only giveback urb when this is the last td in urb */
+- if (urb_priv->td_cnt == urb_priv->length) {
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
+- if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
+- if (xhci->quirks & XHCI_AMD_PLL_FIX)
+- usb_amd_quirk_pll_enable();
+- }
++ struct urb *urb = cur_td->urb;
++ struct urb_priv *urb_priv = urb->hcpriv;
++ struct usb_hcd *hcd = bus_to_hcd(urb->dev->bus);
++
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
++ xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
++ if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
++ if (xhci->quirks & XHCI_AMD_PLL_FIX)
++ usb_amd_quirk_pll_enable();
+ }
+- usb_hcd_unlink_urb_from_ep(hcd, urb);
+-
+- spin_unlock(&xhci->lock);
+- usb_hcd_giveback_urb(hcd, urb, status);
+- xhci_urb_free_priv(urb_priv);
+- spin_lock(&xhci->lock);
+ }
+-}
+-
+-/*
+- * giveback urb, must be called with xhci->lock held.
+- * releases and re-aquires xhci->lock
+- */
+-static void xhci_giveback_urb_locked(struct xhci_hcd *xhci, struct xhci_td *td,
+- int status)
+-{
+- struct urb *urb = td->urb;
+- struct urb_priv *urb_priv = urb->hcpriv;
+-
+ xhci_urb_free_priv(urb_priv);
+-
+- usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
+- if ((urb->actual_length != urb->transfer_buffer_length &&
+- (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
+- (status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
+- xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
+- urb, urb->actual_length,
+- urb->transfer_buffer_length, status);
++ usb_hcd_unlink_urb_from_ep(hcd, urb);
+ spin_unlock(&xhci->lock);
+- /* EHCI, UHCI, and OHCI always unconditionally set the
+- * urb->status of an isochronous endpoint to 0.
+- */
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
+- status = 0;
+- usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
++ usb_hcd_giveback_urb(hcd, urb, status);
+ spin_lock(&xhci->lock);
+ }
+
+@@ -830,7 +808,9 @@ remove_finished_td:
+ ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
+ if (ep_ring && cur_td->bounce_seg)
+ xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
+- xhci_giveback_urb_in_irq(xhci, cur_td, 0);
++ inc_td_cnt(cur_td->urb);
++ if (last_td_in_urb(cur_td))
++ xhci_giveback_urb_in_irq(xhci, cur_td, 0);
+
+ /* Stop processing the cancelled list if the watchdog timer is
+ * running.
+@@ -855,7 +835,10 @@ static void xhci_kill_ring_urbs(struct x
+
+ if (cur_td->bounce_seg)
+ xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
+- xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
++
++ inc_td_cnt(cur_td->urb);
++ if (last_td_in_urb(cur_td))
++ xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
+ }
+ }
+
+@@ -895,7 +878,10 @@ static void xhci_kill_endpoint_urbs(stru
+ cur_td = list_first_entry(&ep->cancelled_td_list,
+ struct xhci_td, cancelled_td_list);
+ list_del_init(&cur_td->cancelled_td_list);
+- xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
++
++ inc_td_cnt(cur_td->urb);
++ if (last_td_in_urb(cur_td))
++ xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
+ }
+ }
+
+@@ -1924,30 +1910,31 @@ td_cleanup:
+ * unsigned). Play it safe and say we didn't transfer anything.
+ */
+ if (urb->actual_length > urb->transfer_buffer_length) {
+- xhci_warn(xhci, "URB transfer length is wrong, xHC issue? req. len = %u, act. len = %u\n",
+- urb->transfer_buffer_length,
+- urb->actual_length);
++ xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
++ urb->transfer_buffer_length, urb->actual_length);
+ urb->actual_length = 0;
+- *status = 0;
++ *status = 0;
+ }
+ list_del_init(&td->td_list);
+ /* Was this TD slated to be cancelled but completed anyway? */
+ if (!list_empty(&td->cancelled_td_list))
+ list_del_init(&td->cancelled_td_list);
+
+- urb_priv->td_cnt++;
++ inc_td_cnt(urb);
+ /* Giveback the urb when all the tds are completed */
+- if (urb_priv->td_cnt == urb_priv->length) {
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
+- if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
+- if (xhci->quirks & XHCI_AMD_PLL_FIX)
+- usb_amd_quirk_pll_enable();
+- }
+- }
+- xhci_giveback_urb_locked(xhci, td, *status);
+- }
++ if (last_td_in_urb(td)) {
++ if ((urb->actual_length != urb->transfer_buffer_length &&
++ (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
++ (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
++ xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
++ urb, urb->actual_length,
++ urb->transfer_buffer_length, *status);
+
++ /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
++ *status = 0;
++ xhci_giveback_urb_in_irq(xhci, td, *status);
++ }
+ return 0;
+ }
+
diff --git a/patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch b/patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch
new file mode 100644
index 0000000..4e6fe2e
--- /dev/null
+++ b/patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch
@@ -0,0 +1,148 @@
+From c7f48384d9c9da834ddb70cdc4d0d276c3ec7cf3 Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:25 +0200
+Subject: [PATCH 289/299] usb: xhci: clean up error_bitmask usage
+
+In xhci_handle_event(), when errors are detected, driver always sets
+a bit in error_bitmask (one member of the xhci private driver data).
+That means users have to retrieve and decode the value of error_bitmask
+in xhci private driver data if they want to know whether those erros
+ever happened in xhci_handle_event(). Otherwise, those errors are just
+ignored silently.
+
+This patch cleans up this by replacing the setting of error_bitmask
+with the kernel print functions, so that users can easily check and
+report the errors happened in xhci_handle_event().
+
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit f4c8f03ca31a9cf4c122780ea693d145658ba397)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 46 ++++++++++++++++++++-----------------------
+ drivers/usb/host/xhci.h | 2 -
+ 2 files changed, 22 insertions(+), 26 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1239,7 +1239,7 @@ static void xhci_handle_cmd_nec_get_fw(s
+ struct xhci_event_cmd *event)
+ {
+ if (!(xhci->quirks & XHCI_NEC_HOST)) {
+- xhci->error_bitmask |= 1 << 6;
++ xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
+ return;
+ }
+ xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
+@@ -1342,14 +1342,13 @@ static void handle_cmd_completion(struct
+ cmd_trb = xhci->cmd_ring->dequeue;
+ cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
+ cmd_trb);
+- /* Is the command ring deq ptr out of sync with the deq seg ptr? */
+- if (cmd_dequeue_dma == 0) {
+- xhci->error_bitmask |= 1 << 4;
+- return;
+- }
+- /* Does the DMA address match our internal dequeue pointer address? */
+- if (cmd_dma != (u64) cmd_dequeue_dma) {
+- xhci->error_bitmask |= 1 << 5;
++ /*
++ * Check whether the completion event is for our internal kept
++ * command.
++ */
++ if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
++ xhci_warn(xhci,
++ "ERROR mismatched command completion event\n");
+ return;
+ }
+
+@@ -1438,7 +1437,7 @@ static void handle_cmd_completion(struct
+ break;
+ default:
+ /* Skip over unknown commands on the event ring */
+- xhci->error_bitmask |= 1 << 6;
++ xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
+ break;
+ }
+
+@@ -1541,10 +1540,10 @@ static void handle_port_status(struct xh
+ bool bogus_port_status = false;
+
+ /* Port status change events always have a successful completion code */
+- if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) {
+- xhci_warn(xhci, "WARN: xHC returned failed port status event\n");
+- xhci->error_bitmask |= 1 << 8;
+- }
++ if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
++ xhci_warn(xhci,
++ "WARN: xHC returned failed port status event\n");
++
+ port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
+ xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
+
+@@ -2547,18 +2546,17 @@ static int xhci_handle_event(struct xhci
+ int update_ptrs = 1;
+ int ret;
+
++ /* Event ring hasn't been allocated yet. */
+ if (!xhci->event_ring || !xhci->event_ring->dequeue) {
+- xhci->error_bitmask |= 1 << 1;
+- return 0;
++ xhci_err(xhci, "ERROR event ring not ready\n");
++ return -ENOMEM;
+ }
+
+ event = xhci->event_ring->dequeue;
+ /* Does the HC or OS own the TRB? */
+ if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
+- xhci->event_ring->cycle_state) {
+- xhci->error_bitmask |= 1 << 2;
++ xhci->event_ring->cycle_state)
+ return 0;
+- }
+
+ /*
+ * Barrier between reading the TRB_CYCLE (valid) flag above and any
+@@ -2566,7 +2564,7 @@ static int xhci_handle_event(struct xhci
+ */
+ rmb();
+ /* FIXME: Handle more event types. */
+- switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) {
++ switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
+ case TRB_TYPE(TRB_COMPLETION):
+ handle_cmd_completion(xhci, &event->event_cmd);
+ break;
+@@ -2576,9 +2574,7 @@ static int xhci_handle_event(struct xhci
+ break;
+ case TRB_TYPE(TRB_TRANSFER):
+ ret = handle_tx_event(xhci, &event->trans_event);
+- if (ret < 0)
+- xhci->error_bitmask |= 1 << 9;
+- else
++ if (ret >= 0)
+ update_ptrs = 0;
+ break;
+ case TRB_TYPE(TRB_DEV_NOTE):
+@@ -2589,7 +2585,9 @@ static int xhci_handle_event(struct xhci
+ TRB_TYPE(48))
+ handle_vendor_event(xhci, event);
+ else
+- xhci->error_bitmask |= 1 << 3;
++ xhci_warn(xhci, "ERROR unknown event type %d\n",
++ TRB_FIELD_TO_TYPE(
++ le32_to_cpu(event->event_cmd.flags)));
+ }
+ /* Any of the above functions may drop and re-acquire the lock, so check
+ * to make sure a watchdog timer didn't mark the host as non-responsive.
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1614,8 +1614,6 @@ struct xhci_hcd {
+ #define XHCI_STATE_DYING (1 << 0)
+ #define XHCI_STATE_HALTED (1 << 1)
+ #define XHCI_STATE_REMOVING (1 << 2)
+- /* Statistics */
+- int error_bitmask;
+ unsigned int quirks;
+ #define XHCI_LINK_TRB_QUIRK (1 << 0)
+ #define XHCI_RESET_EP_QUIRK (1 << 1)
diff --git a/patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch b/patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch
new file mode 100644
index 0000000..13b8f6a
--- /dev/null
+++ b/patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch
@@ -0,0 +1,106 @@
+From 8c420c9fedc7815be7e71feaa2b7b6fed838ada3 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:28 +0200
+Subject: [PATCH 290/299] xhci: add helper to get the endpoint state of a
+ endpoint context
+
+define GET_EP_CTX_STATE() macro to get the endpoint state from a
+pointer to a le32 enpoint context structure
+
+No functional changes
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 5071e6b279178f7d25e1aebd23f49f686657a5fb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 18 ++++++------------
+ drivers/usb/host/xhci.c | 3 +--
+ drivers/usb/host/xhci.h | 2 ++
+ 3 files changed, 9 insertions(+), 14 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1059,8 +1059,7 @@ static void xhci_handle_cmd_set_deq(stru
+ break;
+ case COMP_CTX_STATE:
+ xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
+- ep_state = le32_to_cpu(ep_ctx->ep_info);
+- ep_state &= EP_STATE_MASK;
++ ep_state = GET_EP_CTX_STATE(ep_ctx);
+ slot_state = le32_to_cpu(slot_ctx->dev_state);
+ slot_state = GET_SLOT_STATE(slot_state);
+ xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
+@@ -1819,8 +1818,7 @@ static int xhci_requires_manual_halt_cle
+ * endpoint anyway. Check if a babble halted the
+ * endpoint.
+ */
+- if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
+- cpu_to_le32(EP_STATE_HALTED))
++ if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
+ return 1;
+
+ return 0;
+@@ -2269,9 +2267,7 @@ static int handle_tx_event(struct xhci_h
+ ep = &xdev->eps[ep_index];
+ ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
+ ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
+- if (!ep_ring ||
+- (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
+- EP_STATE_DISABLED) {
++ if (!ep_ring || GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
+ xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
+ "or incorrect stream ring\n");
+ xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
+@@ -2832,8 +2828,7 @@ static int prepare_transfer(struct xhci_
+ return -EINVAL;
+ }
+
+- ret = prepare_ring(xhci, ep_ring,
+- le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
++ ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
+ num_trbs, mem_flags);
+ if (ret)
+ return ret;
+@@ -3729,7 +3724,7 @@ int xhci_queue_isoc_tx_prepare(struct xh
+ /* Check the ring to guarantee there is enough room for the whole urb.
+ * Do not insert any td of the urb to the ring if the check failed.
+ */
+- ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
++ ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
+ num_trbs, mem_flags);
+ if (ret)
+ return ret;
+@@ -3742,8 +3737,7 @@ int xhci_queue_isoc_tx_prepare(struct xh
+
+ /* Calculate the start frame and put it in urb->start_frame. */
+ if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
+- if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
+- EP_STATE_RUNNING) {
++ if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
+ urb->start_frame = xep->next_frame_id;
+ goto skip_start_over;
+ }
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -1643,8 +1643,7 @@ int xhci_drop_endpoint(struct usb_hcd *h
+ /* If the HC already knows the endpoint is disabled,
+ * or the HCD has noted it is disabled, ignore this request
+ */
+- if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
+- cpu_to_le32(EP_STATE_DISABLED)) ||
++ if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
+ le32_to_cpu(ctrl_ctx->drop_flags) &
+ xhci_get_endpoint_flag(&ep->desc)) {
+ /* Do not warn when called after a usb_device_reset */
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -709,6 +709,8 @@ struct xhci_ep_ctx {
+ #define EP_STATE_HALTED 2
+ #define EP_STATE_STOPPED 3
+ #define EP_STATE_ERROR 4
++#define GET_EP_CTX_STATE(ctx) (le32_to_cpu((ctx)->ep_info) & EP_STATE_MASK)
++
+ /* Mult - Max number of burtst within an interval, in EP companion desc. */
+ #define EP_MULT(p) (((p) & 0x3) << 8)
+ #define CTX_TO_EP_MULT(p) (((p) >> 8) & 0x3)
diff --git a/patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch b/patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch
new file mode 100644
index 0000000..72cdae5
--- /dev/null
+++ b/patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch
@@ -0,0 +1,39 @@
+From 39ecb6b98900bc33b14c7502462c69f48d0e5d61 Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:29 +0200
+Subject: [PATCH 291/299] usb: xhci: cleanup cmd_completion in xhci_virt_device
+
+cmd_completion in struct xhci_virt_device is legacy. With command
+structure and command queue introduced in xhci, cmd_completion is
+not used any more. This patch removes it.
+
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 228cfaea541824ac9bb0c83d957e8b34d631f58a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-mem.c | 1 -
+ drivers/usb/host/xhci.h | 1 -
+ 2 files changed, 2 deletions(-)
+
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -1066,7 +1066,6 @@ int xhci_alloc_virt_device(struct xhci_h
+ goto fail;
+ dev->num_rings_cached = 0;
+
+- init_completion(&dev->cmd_completion);
+ dev->udev = udev;
+
+ /* Point to output device context in dcbaa. */
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -994,7 +994,6 @@ struct xhci_virt_device {
+ int num_rings_cached;
+ #define XHCI_MAX_RINGS_CACHED 31
+ struct xhci_virt_ep eps[31];
+- struct completion cmd_completion;
+ u8 fake_port;
+ u8 real_port;
+ struct xhci_interval_bw_table *bw_table;
diff --git a/patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch b/patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch
new file mode 100644
index 0000000..f4c786d
--- /dev/null
+++ b/patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch
@@ -0,0 +1,122 @@
+From b21483a406b1e5d743f73d79fe704f8883eab8a4 Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:30 +0200
+Subject: [PATCH 292/299] usb: xhci: remove the use of xhci->addr_dev
+
+xhci->addr_dev is used for the completion of both address device
+and enable slot commands. It's shared by enumerations of all USB
+devices connected to an xhci host. Hence, it's just a source for
+possible races. Since we've introduced command structure and the
+command queue to xhci driver. It is time to get rid of addr_dev
+and use the completion in the command structure instead.
+
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 87e44f2aac8d45c1e48c94017942fa10037daae0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-mem.c | 1 -
+ drivers/usb/host/xhci.c | 18 ++++++++++--------
+ drivers/usb/host/xhci.h | 1 -
+ 3 files changed, 10 insertions(+), 10 deletions(-)
+
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -2583,7 +2583,6 @@ int xhci_mem_init(struct xhci_hcd *xhci,
+ * something other than the default (~1ms minimum between interrupts).
+ * See section 5.5.1.2.
+ */
+- init_completion(&xhci->addr_dev);
+ for (i = 0; i < MAX_HC_SLOTS; ++i)
+ xhci->devs[i] = NULL;
+ for (i = 0; i < USB_MAXCHILDREN; ++i) {
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3680,20 +3680,19 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
+ int ret, slot_id;
+ struct xhci_command *command;
+
+- command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
++ command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
+ if (!command)
+ return 0;
+
+ /* xhci->slot_id and xhci->addr_dev are not thread-safe */
+ mutex_lock(&xhci->mutex);
+ spin_lock_irqsave(&xhci->lock, flags);
+- command->completion = &xhci->addr_dev;
+ ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
+ if (ret) {
+ spin_unlock_irqrestore(&xhci->lock, flags);
+ mutex_unlock(&xhci->mutex);
+ xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
+- kfree(command);
++ xhci_free_command(xhci, command);
+ return 0;
+ }
+ xhci_ring_cmd_db(xhci);
+@@ -3708,7 +3707,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
+ xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
+ HCS_MAX_SLOTS(
+ readl(&xhci->cap_regs->hcs_params1)));
+- kfree(command);
++ xhci_free_command(xhci, command);
+ return 0;
+ }
+
+@@ -3744,7 +3743,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
+ #endif
+
+
+- kfree(command);
++ xhci_free_command(xhci, command);
+ /* Is this a LS or FS device under a HS hub? */
+ /* Hub or peripherial? */
+ return 1;
+@@ -3752,6 +3751,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
+ disable_slot:
+ /* Disable slot, if we can do it without mem alloc */
+ spin_lock_irqsave(&xhci->lock, flags);
++ kfree(command->completion);
+ command->completion = NULL;
+ command->status = 0;
+ if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
+@@ -3815,14 +3815,13 @@ static int xhci_setup_device(struct usb_
+ }
+ }
+
+- command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
++ command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
+ if (!command) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ command->in_ctx = virt_dev->in_ctx;
+- command->completion = &xhci->addr_dev;
+
+ slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
+ ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
+@@ -3940,7 +3939,10 @@ static int xhci_setup_device(struct usb_
+ le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
+ out:
+ mutex_unlock(&xhci->mutex);
+- kfree(command);
++ if (command) {
++ kfree(command->completion);
++ kfree(command);
++ }
+ return ret;
+ }
+
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1580,7 +1580,6 @@ struct xhci_hcd {
+ /* slot enabling and address device helpers */
+ /* these are not thread safe so use mutex */
+ struct mutex mutex;
+- struct completion addr_dev;
+ int slot_id;
+ /* For USB 3.0 LPM enable/disable. */
+ struct xhci_command *lpm_command;
diff --git a/patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch b/patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch
new file mode 100644
index 0000000..3785dcb
--- /dev/null
+++ b/patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch
@@ -0,0 +1,81 @@
+From 085624b7b2edbb15ccba15437b5affc400adc1b0 Mon Sep 17 00:00:00 2001
+From: Lu Baolu <baolu.lu@linux.intel.com>
+Date: Fri, 11 Nov 2016 15:13:31 +0200
+Subject: [PATCH 293/299] usb: xhci: move slot_id from xhci_hcd to xhci_command
+ structure
+
+xhci->slot_id is used for providing a way to pass slot id from the
+command completion handler to the function waiting for completion.
+It's shared by enumerations of all USB devices connected to an
+xhci host. Hence, it's a source for possible races. Since we've
+introduced command structure and the command queue to xhci driver.
+It's better to move slot_id from xhci_hcd structure to xhci_command
+structure. Hence the race source is removed.
+
+Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit c2d3d49bba0889f42e4753651d103f7ba74fbaf1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 8 ++++----
+ drivers/usb/host/xhci.c | 2 +-
+ drivers/usb/host/xhci.h | 2 +-
+ 3 files changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1151,12 +1151,12 @@ static void xhci_handle_cmd_reset_ep(str
+ }
+
+ static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
+- u32 cmd_comp_code)
++ struct xhci_command *command, u32 cmd_comp_code)
+ {
+ if (cmd_comp_code == COMP_SUCCESS)
+- xhci->slot_id = slot_id;
++ command->slot_id = slot_id;
+ else
+- xhci->slot_id = 0;
++ command->slot_id = 0;
+ }
+
+ static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
+@@ -1389,7 +1389,7 @@ static void handle_cmd_completion(struct
+ cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
+ switch (cmd_type) {
+ case TRB_ENABLE_SLOT:
+- xhci_handle_cmd_enable_slot(xhci, slot_id, cmd_comp_code);
++ xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
+ break;
+ case TRB_DISABLE_SLOT:
+ xhci_handle_cmd_disable_slot(xhci, slot_id);
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -3699,7 +3699,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd,
+ spin_unlock_irqrestore(&xhci->lock, flags);
+
+ wait_for_completion(command->completion);
+- slot_id = xhci->slot_id;
++ slot_id = command->slot_id;
+ mutex_unlock(&xhci->mutex);
+
+ if (!slot_id || command->status != COMP_SUCCESS) {
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -786,6 +786,7 @@ struct xhci_command {
+ /* Input context for changing device state */
+ struct xhci_container_ctx *in_ctx;
+ u32 status;
++ int slot_id;
+ /* If completion is null, no one is waiting on this command
+ * and the structure can be freed after the command completes.
+ */
+@@ -1580,7 +1581,6 @@ struct xhci_hcd {
+ /* slot enabling and address device helpers */
+ /* these are not thread safe so use mutex */
+ struct mutex mutex;
+- int slot_id;
+ /* For USB 3.0 LPM enable/disable. */
+ struct xhci_command *lpm_command;
+ /* Internal mirror of the HW's dcbaa */
diff --git a/patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch b/patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch
new file mode 100644
index 0000000..29ad938
--- /dev/null
+++ b/patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch
@@ -0,0 +1,64 @@
+From 7879a8a1911d4c1e37a8270363c1a5ddcc6e0df6 Mon Sep 17 00:00:00 2001
+From: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
+Date: Tue, 3 Jan 2017 18:28:51 +0200
+Subject: [PATCH 294/299] xhci: Fix race related to abort operation
+
+Current abort operation has race.
+
+ xhci_handle_command_timeout()
+ xhci_abort_cmd_ring()
+ xhci_write_64(CMD_RING_ABORT)
+ xhci_handshake(5s)
+ do {
+ check CMD_RING_RUNNING
+ udelay(1)
+ ...
+ COMP_CMD_ABORT event
+ COMP_CMD_STOP event
+ xhci_handle_stopped_cmd_ring()
+ restart cmd_ring
+ CMD_RING_RUNNING become 1 again
+ } while ()
+ return -ETIMEDOUT
+ xhci_write_64(CMD_RING_ABORT)
+ /* can abort random command */
+
+To do abort operation correctly, we have to wait both of COMP_CMD_STOP
+event and negation of CMD_RING_RUNNING.
+
+But like above, while timeout handler is waiting negation of
+CMD_RING_RUNNING, event handler can restart cmd_ring. So timeout
+handler never be notice negation of CMD_RING_RUNNING, and retry of
+CMD_RING_ABORT can abort random command (BTW, I guess retry of
+CMD_RING_ABORT was workaround of this race).
+
+To fix this race, this moves xhci_handle_stopped_cmd_ring() to
+xhci_abort_cmd_ring(). And timeout handler waits COMP_CMD_STOP event.
+
+At this point, timeout handler is owner of cmd_ring, and safely
+restart cmd_ring by using xhci_handle_stopped_cmd_ring().
+
+[FWIW, as bonus, this way would be easily extend to add CMD_RING_PAUSE
+operation]
+
+[locks edited as patch is rebased on other locking fixes -Mathias]
+Signed-off-by: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+(cherry picked from commit 1c111b6c3844a142e03bcfc2fa17bfbdea08e9dc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -392,7 +392,6 @@ static int xhci_abort_cmd_ring(struct xh
+ } else {
+ xhci_handle_stopped_cmd_ring(xhci, xhci_next_queued_cmd(xhci));
+ }
+-
+ return 0;
+ }
+
diff --git a/patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch b/patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch
new file mode 100644
index 0000000..e7d3b11
--- /dev/null
+++ b/patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch
@@ -0,0 +1,126 @@
+From 8d8dd85e33b4672179e1eb06d3d516d6f81d2c46 Mon Sep 17 00:00:00 2001
+From: Felipe Balbi <felipe.balbi@linux.intel.com>
+Date: Tue, 3 Jan 2017 18:28:53 +0200
+Subject: [PATCH 295/299] usb: host: xhci: handle COMP_STOP from SETUP phase
+ too
+
+Stop Endpoint command can come at any point and we
+have no control of that. We should make sure to
+handle COMP_STOP on SETUP phase as well, otherwise
+urb->actual_length might be set to negative values
+in some occasions such as below:
+
+ urb->length = 4;
+ build_control_transfer_td_for(urb, ep);
+
+ stop_endpoint(ep);
+
+COMP_STOP:
+ [...]
+ urb->actual_length = urb->length - trb->length;
+
+trb->length is 8 for SETUP stage (8 control request
+bytes), so actual_length would be set to -4 in this
+case.
+
+While doing that, also make sure to use TRB_TYPE
+field of the actual TRB instead of matching pointers
+to figure out in which stage of the control transfer
+we got our completion event.
+
+Cc: <stable@vger.kernel.org>
+Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 29fc1aa454d0603493b47a8e2410ae6e9ab20258)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-ring.c | 33 +++++++++++++++++++++------------
+ 1 file changed, 21 insertions(+), 12 deletions(-)
+
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1963,8 +1963,9 @@ static int process_ctrl_td(struct xhci_h
+ struct xhci_ep_ctx *ep_ctx;
+ u32 trb_comp_code;
+ u32 remaining, requested;
+- bool on_data_stage;
++ u32 trb_type;
+
++ trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb->generic.field[3]));
+ slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
+ xdev = xhci->devs[slot_id];
+ ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
+@@ -1974,14 +1975,11 @@ static int process_ctrl_td(struct xhci_h
+ requested = td->urb->transfer_buffer_length;
+ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
+
+- /* not setup (dequeue), or status stage means we are at data stage */
+- on_data_stage = (ep_trb != ep_ring->dequeue && ep_trb != td->last_trb);
+-
+ switch (trb_comp_code) {
+ case COMP_SUCCESS:
+- if (ep_trb != td->last_trb) {
++ if (trb_type != TRB_STATUS) {
+ xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
+- on_data_stage ? "data" : "setup");
++ (trb_type == TRB_DATA) ? "data" : "setup");
+ *status = -ESHUTDOWN;
+ break;
+ }
+@@ -1991,15 +1989,25 @@ static int process_ctrl_td(struct xhci_h
+ *status = 0;
+ break;
+ case COMP_STOP_SHORT:
+- if (on_data_stage)
++ if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
+ td->urb->actual_length = remaining;
+ else
+ xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
+ goto finish_td;
+ case COMP_STOP:
+- if (on_data_stage)
++ switch (trb_type) {
++ case TRB_SETUP:
++ td->urb->actual_length = 0;
++ goto finish_td;
++ case TRB_DATA:
++ case TRB_NORMAL:
+ td->urb->actual_length = requested - remaining;
+- goto finish_td;
++ goto finish_td;
++ default:
++ xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
++ trb_type);
++ goto finish_td;
++ }
+ case COMP_STOP_INVAL:
+ goto finish_td;
+ default:
+@@ -2011,7 +2019,7 @@ static int process_ctrl_td(struct xhci_h
+ /* else fall through */
+ case COMP_STALL:
+ /* Did we transfer part of the data (middle) phase? */
+- if (on_data_stage)
++ if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
+ td->urb->actual_length = requested - remaining;
+ else if (!td->urb_length_set)
+ td->urb->actual_length = 0;
+@@ -2019,14 +2027,15 @@ static int process_ctrl_td(struct xhci_h
+ }
+
+ /* stopped at setup stage, no data transferred */
+- if (ep_trb == ep_ring->dequeue)
++ if (trb_type == TRB_SETUP)
+ goto finish_td;
+
+ /*
+ * if on data stage then update the actual_length of the URB and flag it
+ * as set, so it won't be overwritten in the event for the last TRB.
+ */
+- if (on_data_stage) {
++ if (trb_type == TRB_DATA ||
++ trb_type == TRB_NORMAL) {
+ td->urb_length_set = true;
+ td->urb->actual_length = requested - remaining;
+ xhci_dbg(xhci, "Waiting for status stage event\n");
diff --git a/patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch b/patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch
new file mode 100644
index 0000000..5630409
--- /dev/null
+++ b/patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch
@@ -0,0 +1,37 @@
+From 4d561a900c3907ea5bcc9bf8fbce27fd1c2fe5be Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Fri, 20 Jan 2017 15:38:24 +0200
+Subject: [PATCH 296/299] xhci: remove WARN_ON if dma mask is not set for
+ platform devices
+
+The warn on is a bit too much, we will anyway set the dma mask if not set
+previously.
+
+The main reason for this fix is that 4.10-rc1 has a dwc3 change that
+pass a parent sysdev dev pointer instead of setting the dma mask of
+its xhci platform device. xhci platform driver can then get more
+attributes from the sysdev than just the dma mask.
+
+The usb core and xhci changes are not yet in 4.10, and a fix like
+this was preferred instead of taking those big changes this late in
+the rc-cycle.
+
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 488dc164914ff5ce5e913abd32048d28fc0d06b8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-plat.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -165,7 +165,7 @@ static int xhci_plat_probe(struct platfo
+ return irq;
+
+ /* Try to set 64-bit DMA first */
+- if (WARN_ON(!pdev->dev.dma_mask))
++ if (!pdev->dev.dma_mask)
+ /* Platform did not initialize dma_mask */
+ ret = dma_coerce_mask_and_coherent(&pdev->dev,
+ DMA_BIT_MASK(64));
diff --git a/patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch b/patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch
new file mode 100644
index 0000000..06c2947
--- /dev/null
+++ b/patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch
@@ -0,0 +1,90 @@
+From cf2eeafdcd6c58ed5a24bf607d1cc3aec8c1497a Mon Sep 17 00:00:00 2001
+From: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
+Date: Tue, 16 Aug 2016 23:26:43 +0300
+Subject: [PATCH 297/299] drm: dw_hdmi: use of_get_i2c_adapter_by_node
+ interface
+
+This change is needed to properly lock I2C bus driver, which serves
+DDC.
+
+The change fixes an overflow over zero of I2C bus driver user counter:
+
+ root@imx6q:~# lsmod
+ Not tainted
+ dw_hdmi_ahb_audio 4082 0 - Live 0xbf02c000
+ dw_hdmi_imx 3498 0 - Live 0xbf00d000
+ dw_hdmi 16398 2 dw_hdmi_ahb_audio,dw_hdmi_imx, Live 0xbf004000
+ i2c_imx 16687 0 - Live 0xbf017000
+
+ root@imx6q:~# rmmod dw_hdmi_imx
+ root@imx6q:~# lsmod
+ Not tainted
+ dw_hdmi_ahb_audio 4082 0 - Live 0xbf02c000
+ dw_hdmi 16398 1 dw_hdmi_ahb_audio, Live 0xbf004000
+ i2c_imx 16687 -1 - Live 0xbf017000
+ ^^
+
+ root@imx6q:~# rmmod i2c_imx
+ rmmod: ERROR: Module i2c_imx is in use
+
+Note that prior to this change put_device() coupled with
+of_find_i2c_adapter_by_node() was missing on error path of
+dw_hdmi_bind(), added i2c_put_adapter() there along with the change.
+
+Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
+Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Cc: Fabio Estevam <fabio.estevam@nxp.com>
+Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
+(cherry picked from commit 9f04a1f2b389a656486c1f9f918a3305569fba6a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/bridge/dw-hdmi.c | 14 +++++++++-----
+ 1 file changed, 9 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/bridge/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/dw-hdmi.c
+@@ -1681,7 +1681,7 @@ int dw_hdmi_bind(struct device *dev, str
+
+ ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0);
+ if (ddc_node) {
+- hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node);
++ hdmi->ddc = of_get_i2c_adapter_by_node(ddc_node);
+ of_node_put(ddc_node);
+ if (!hdmi->ddc) {
+ dev_dbg(hdmi->dev, "failed to read ddc node\n");
+@@ -1693,20 +1693,22 @@ int dw_hdmi_bind(struct device *dev, str
+ }
+
+ hdmi->regs = devm_ioremap_resource(dev, iores);
+- if (IS_ERR(hdmi->regs))
+- return PTR_ERR(hdmi->regs);
++ if (IS_ERR(hdmi->regs)) {
++ ret = PTR_ERR(hdmi->regs);
++ goto err_res;
++ }
+
+ hdmi->isfr_clk = devm_clk_get(hdmi->dev, "isfr");
+ if (IS_ERR(hdmi->isfr_clk)) {
+ ret = PTR_ERR(hdmi->isfr_clk);
+ dev_err(hdmi->dev, "Unable to get HDMI isfr clk: %d\n", ret);
+- return ret;
++ goto err_res;
+ }
+
+ ret = clk_prepare_enable(hdmi->isfr_clk);
+ if (ret) {
+ dev_err(hdmi->dev, "Cannot enable HDMI isfr clock: %d\n", ret);
+- return ret;
++ goto err_res;
+ }
+
+ hdmi->iahb_clk = devm_clk_get(hdmi->dev, "iahb");
+@@ -1792,6 +1794,8 @@ err_iahb:
+ clk_disable_unprepare(hdmi->iahb_clk);
+ err_isfr:
+ clk_disable_unprepare(hdmi->isfr_clk);
++err_res:
++ i2c_put_adapter(hdmi->ddc);
+
+ return ret;
+ }
diff --git a/patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch b/patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch
new file mode 100644
index 0000000..6dcb012
--- /dev/null
+++ b/patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch
@@ -0,0 +1,426 @@
+From 72e05d201c4c0873d79ca1b5ebadd4dace751cbc Mon Sep 17 00:00:00 2001
+From: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
+Date: Wed, 24 Aug 2016 08:46:37 +0300
+Subject: [PATCH 298/299] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter
+ support
+
+The change adds support of internal HDMI I2C master controller, this
+subdevice is used by default, if "ddc-i2c-bus" DT property is omitted.
+
+The main purpose of this functionality is to support reading EDID from
+an HDMI monitor on boards, which don't have an I2C bus connected to
+DDC pins.
+
+The current implementation does not support "I2C Master Interface
+Extended Read Mode" to read data addressed by non-zero segment
+pointer, this means that if EDID has more than 1 extension blocks,
+EDID reading operation won't succeed, in my practice all tested HDMI
+monitors have at maximum one extension block.
+
+Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
+Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
+(cherry picked from commit 3efc2fa3b777e65e344a7612d38a8278e78a0514)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt | 4
+ drivers/gpu/drm/bridge/dw-hdmi.c | 265 ++++++++++-
+ drivers/gpu/drm/bridge/dw-hdmi.h | 19
+ 3 files changed, 281 insertions(+), 7 deletions(-)
+
+--- a/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
++++ b/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
+@@ -19,7 +19,9 @@ Required properties:
+
+ Optional properties
+ - reg-io-width: the width of the reg:1,4, default set to 1 if not present
+-- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
++- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing,
++ if the property is omitted, a functionally reduced I2C bus
++ controller on DW HDMI is probed
+ - clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
+
+ Example:
+--- a/drivers/gpu/drm/bridge/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/dw-hdmi.c
+@@ -1,14 +1,15 @@
+ /*
++ * DesignWare High-Definition Multimedia Interface (HDMI) driver
++ *
++ * Copyright (C) 2013-2015 Mentor Graphics Inc.
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
++ * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+- * Designware High-Definition Multimedia Interface (HDMI) driver
+- *
+- * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ */
+ #include <linux/module.h>
+ #include <linux/irq.h>
+@@ -101,6 +102,17 @@ struct hdmi_data_info {
+ struct hdmi_vmode video_mode;
+ };
+
++struct dw_hdmi_i2c {
++ struct i2c_adapter adap;
++
++ struct mutex lock; /* used to serialize data transfers */
++ struct completion cmp;
++ u8 stat;
++
++ u8 slave_reg;
++ bool is_regaddr;
++};
++
+ struct dw_hdmi {
+ struct drm_connector connector;
+ struct drm_encoder *encoder;
+@@ -111,6 +123,7 @@ struct dw_hdmi {
+ struct device *dev;
+ struct clk *isfr_clk;
+ struct clk *iahb_clk;
++ struct dw_hdmi_i2c *i2c;
+
+ struct hdmi_data_info hdmi_data;
+ const struct dw_hdmi_plat_data *plat_data;
+@@ -198,6 +211,201 @@ static void hdmi_mask_writeb(struct dw_h
+ hdmi_modb(hdmi, data << shift, mask, reg);
+ }
+
++static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
++{
++ /* Software reset */
++ hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
++
++ /* Set Standard Mode speed (determined to be 100KHz on iMX6) */
++ hdmi_writeb(hdmi, 0x00, HDMI_I2CM_DIV);
++
++ /* Set done, not acknowledged and arbitration interrupt polarities */
++ hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
++ hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
++ HDMI_I2CM_CTLINT);
++
++ /* Clear DONE and ERROR interrupts */
++ hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
++ HDMI_IH_I2CM_STAT0);
++
++ /* Mute DONE and ERROR interrupts */
++ hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
++ HDMI_IH_MUTE_I2CM_STAT0);
++}
++
++static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
++ unsigned char *buf, unsigned int length)
++{
++ struct dw_hdmi_i2c *i2c = hdmi->i2c;
++ int stat;
++
++ if (!i2c->is_regaddr) {
++ dev_dbg(hdmi->dev, "set read register address to 0\n");
++ i2c->slave_reg = 0x00;
++ i2c->is_regaddr = true;
++ }
++
++ while (length--) {
++ reinit_completion(&i2c->cmp);
++
++ hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
++ hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
++ HDMI_I2CM_OPERATION);
++
++ stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
++ if (!stat)
++ return -EAGAIN;
++
++ /* Check for error condition on the bus */
++ if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
++ return -EIO;
++
++ *buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
++ }
++
++ return 0;
++}
++
++static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
++ unsigned char *buf, unsigned int length)
++{
++ struct dw_hdmi_i2c *i2c = hdmi->i2c;
++ int stat;
++
++ if (!i2c->is_regaddr) {
++ /* Use the first write byte as register address */
++ i2c->slave_reg = buf[0];
++ length--;
++ buf++;
++ i2c->is_regaddr = true;
++ }
++
++ while (length--) {
++ reinit_completion(&i2c->cmp);
++
++ hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
++ hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
++ hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
++ HDMI_I2CM_OPERATION);
++
++ stat = wait_for_completion_timeout(&i2c->cmp, HZ / 10);
++ if (!stat)
++ return -EAGAIN;
++
++ /* Check for error condition on the bus */
++ if (i2c->stat & HDMI_IH_I2CM_STAT0_ERROR)
++ return -EIO;
++ }
++
++ return 0;
++}
++
++static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
++ struct i2c_msg *msgs, int num)
++{
++ struct dw_hdmi *hdmi = i2c_get_adapdata(adap);
++ struct dw_hdmi_i2c *i2c = hdmi->i2c;
++ u8 addr = msgs[0].addr;
++ int i, ret = 0;
++
++ dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
++
++ for (i = 0; i < num; i++) {
++ if (msgs[i].addr != addr) {
++ dev_warn(hdmi->dev,
++ "unsupported transfer, changed slave address\n");
++ return -EOPNOTSUPP;
++ }
++
++ if (msgs[i].len == 0) {
++ dev_dbg(hdmi->dev,
++ "unsupported transfer %d/%d, no data\n",
++ i + 1, num);
++ return -EOPNOTSUPP;
++ }
++ }
++
++ mutex_lock(&i2c->lock);
++
++ /* Unmute DONE and ERROR interrupts */
++ hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
++
++ /* Set slave device address taken from the first I2C message */
++ hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
++
++ /* Set slave device register address on transfer */
++ i2c->is_regaddr = false;
++
++ for (i = 0; i < num; i++) {
++ dev_dbg(hdmi->dev, "xfer: num: %d/%d, len: %d, flags: %#x\n",
++ i + 1, num, msgs[i].len, msgs[i].flags);
++
++ if (msgs[i].flags & I2C_M_RD)
++ ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf, msgs[i].len);
++ else
++ ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf, msgs[i].len);
++
++ if (ret < 0)
++ break;
++ }
++
++ if (!ret)
++ ret = num;
++
++ /* Mute DONE and ERROR interrupts */
++ hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
++ HDMI_IH_MUTE_I2CM_STAT0);
++
++ mutex_unlock(&i2c->lock);
++
++ return ret;
++}
++
++static u32 dw_hdmi_i2c_func(struct i2c_adapter *adapter)
++{
++ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
++}
++
++static const struct i2c_algorithm dw_hdmi_algorithm = {
++ .master_xfer = dw_hdmi_i2c_xfer,
++ .functionality = dw_hdmi_i2c_func,
++};
++
++static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
++{
++ struct i2c_adapter *adap;
++ struct dw_hdmi_i2c *i2c;
++ int ret;
++
++ i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
++ if (!i2c)
++ return ERR_PTR(-ENOMEM);
++
++ mutex_init(&i2c->lock);
++ init_completion(&i2c->cmp);
++
++ adap = &i2c->adap;
++ adap->class = I2C_CLASS_DDC;
++ adap->owner = THIS_MODULE;
++ adap->dev.parent = hdmi->dev;
++ adap->algo = &dw_hdmi_algorithm;
++ strlcpy(adap->name, "DesignWare HDMI", sizeof(adap->name));
++ i2c_set_adapdata(adap, hdmi);
++
++ ret = i2c_add_adapter(adap);
++ if (ret) {
++ dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
++ devm_kfree(hdmi->dev, i2c);
++ return ERR_PTR(ret);
++ }
++
++ hdmi->i2c = i2c;
++
++ dev_info(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
++
++ return adap;
++}
++
+ static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
+ unsigned int n)
+ {
+@@ -1512,16 +1720,40 @@ static const struct drm_bridge_funcs dw_
+ .mode_set = dw_hdmi_bridge_mode_set,
+ };
+
++static irqreturn_t dw_hdmi_i2c_irq(struct dw_hdmi *hdmi)
++{
++ struct dw_hdmi_i2c *i2c = hdmi->i2c;
++ unsigned int stat;
++
++ stat = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
++ if (!stat)
++ return IRQ_NONE;
++
++ hdmi_writeb(hdmi, stat, HDMI_IH_I2CM_STAT0);
++
++ i2c->stat = stat;
++
++ complete(&i2c->cmp);
++
++ return IRQ_HANDLED;
++}
++
+ static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
+ {
+ struct dw_hdmi *hdmi = dev_id;
+ u8 intr_stat;
++ irqreturn_t ret = IRQ_NONE;
++
++ if (hdmi->i2c)
++ ret = dw_hdmi_i2c_irq(hdmi);
+
+ intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
+- if (intr_stat)
++ if (intr_stat) {
+ hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
++ return IRQ_WAKE_THREAD;
++ }
+
+- return intr_stat ? IRQ_WAKE_THREAD : IRQ_NONE;
++ return ret;
+ }
+
+ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
+@@ -1746,6 +1978,13 @@ int dw_hdmi_bind(struct device *dev, str
+ */
+ hdmi_init_clk_regenerator(hdmi);
+
++ /* If DDC bus is not specified, try to register HDMI I2C bus */
++ if (!hdmi->ddc) {
++ hdmi->ddc = dw_hdmi_i2c_adapter(hdmi);
++ if (IS_ERR(hdmi->ddc))
++ hdmi->ddc = NULL;
++ }
++
+ /*
+ * Configure registers related to HDMI interrupt
+ * generation before registering IRQ.
+@@ -1786,11 +2025,20 @@ int dw_hdmi_bind(struct device *dev, str
+ hdmi->audio = platform_device_register_full(&pdevinfo);
+ }
+
++ /* Reset HDMI DDC I2C master controller and mute I2CM interrupts */
++ if (hdmi->i2c)
++ dw_hdmi_i2c_init(hdmi);
++
+ dev_set_drvdata(dev, hdmi);
+
+ return 0;
+
+ err_iahb:
++ if (hdmi->i2c) {
++ i2c_del_adapter(&hdmi->i2c->adap);
++ hdmi->ddc = NULL;
++ }
++
+ clk_disable_unprepare(hdmi->iahb_clk);
+ err_isfr:
+ clk_disable_unprepare(hdmi->isfr_clk);
+@@ -1813,13 +2061,18 @@ void dw_hdmi_unbind(struct device *dev,
+
+ clk_disable_unprepare(hdmi->iahb_clk);
+ clk_disable_unprepare(hdmi->isfr_clk);
+- i2c_put_adapter(hdmi->ddc);
++
++ if (hdmi->i2c)
++ i2c_del_adapter(&hdmi->i2c->adap);
++ else
++ i2c_put_adapter(hdmi->ddc);
+ }
+ EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
+
+ MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
+ MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
+ MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
++MODULE_AUTHOR("Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>");
+ MODULE_DESCRIPTION("DW HDMI transmitter driver");
+ MODULE_LICENSE("GPL");
+ MODULE_ALIAS("platform:dw-hdmi");
+--- a/drivers/gpu/drm/bridge/dw-hdmi.h
++++ b/drivers/gpu/drm/bridge/dw-hdmi.h
+@@ -566,6 +566,10 @@ enum {
+ HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
+ HDMI_IH_PHY_STAT0_HPD = 0x1,
+
++/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
++ HDMI_IH_I2CM_STAT0_DONE = 0x2,
++ HDMI_IH_I2CM_STAT0_ERROR = 0x1,
++
+ /* IH_MUTE_I2CMPHY_STAT0 field values */
+ HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
+ HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
+@@ -1032,6 +1036,21 @@ enum {
+ HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
+ HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
+ HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
++
++/* I2CM_OPERATION field values */
++ HDMI_I2CM_OPERATION_WRITE = 0x10,
++ HDMI_I2CM_OPERATION_READ_EXT = 0x2,
++ HDMI_I2CM_OPERATION_READ = 0x1,
++
++/* I2CM_INT field values */
++ HDMI_I2CM_INT_DONE_POL = 0x8,
++ HDMI_I2CM_INT_DONE_MASK = 0x4,
++
++/* I2CM_CTLINT field values */
++ HDMI_I2CM_CTLINT_NAC_POL = 0x80,
++ HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
++ HDMI_I2CM_CTLINT_ARB_POL = 0x8,
++ HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
+ };
+
+ #endif /* __DW_HDMI_H__ */
diff --git a/patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch b/patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch
new file mode 100644
index 0000000..1b3e9b7
--- /dev/null
+++ b/patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch
@@ -0,0 +1,303 @@
+From e629b8e80ed3dc7817ba8a92d4d8098bc5fdbe65 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 8 Nov 2016 01:00:57 +0000
+Subject: [PATCH 299/299] drm: bridge: add DesignWare HDMI I2S audio support
+
+Current dw-hdmi is supporting sound via AHB bus, but it has
+I2S audio feature too. This patch adds I2S audio support to dw-hdmi.
+This HDMI I2S is supported by using ALSA SoC common HDMI encoder
+driver.
+
+Tested-by: Jose Abreu <joabreu@synopsys.com>
+Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Archit Taneja <architt@codeaurora.org>
+Link: http://patchwork.freedesktop.org/patch/msgid/8737j2bxba.wl%kuninori.morimoto.gx@renesas.com
+(cherry picked from commit 2761ba6c0925ca9c5b917a95f68135d9dce443fb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/bridge/Kconfig | 8 +
+ drivers/gpu/drm/bridge/Makefile | 1
+ drivers/gpu/drm/bridge/dw-hdmi-audio.h | 7 +
+ drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c | 141 +++++++++++++++++++++++++++++
+ drivers/gpu/drm/bridge/dw-hdmi.c | 22 ++++
+ drivers/gpu/drm/bridge/dw-hdmi.h | 20 ++++
+ 6 files changed, 197 insertions(+), 2 deletions(-)
+ create mode 100644 drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c
+
+--- a/drivers/gpu/drm/bridge/Kconfig
++++ b/drivers/gpu/drm/bridge/Kconfig
+@@ -39,6 +39,14 @@ config DRM_DW_HDMI_AHB_AUDIO
+ Designware HDMI block. This is used in conjunction with
+ the i.MX6 HDMI driver.
+
++config DRM_DW_HDMI_I2S_AUDIO
++ tristate "Synopsis Designware I2S Audio interface"
++ depends on DRM_DW_HDMI
++ select SND_SOC_HDMI_CODEC
++ help
++ Support the I2S Audio interface which is part of the Synopsis
++ Designware HDMI block.
++
+ config DRM_NXP_PTN3460
+ tristate "NXP PTN3460 DP/LVDS bridge"
+ depends on OF
+--- a/drivers/gpu/drm/bridge/Makefile
++++ b/drivers/gpu/drm/bridge/Makefile
+@@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += an
+ obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o
+ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
+ obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
++obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+ obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
+ obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
+ obj-$(CONFIG_DRM_SII902X) += sii902x.o
+--- a/drivers/gpu/drm/bridge/dw-hdmi-audio.h
++++ b/drivers/gpu/drm/bridge/dw-hdmi-audio.h
+@@ -11,4 +11,11 @@ struct dw_hdmi_audio_data {
+ u8 *eld;
+ };
+
++struct dw_hdmi_i2s_audio_data {
++ struct dw_hdmi *hdmi;
++
++ void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
++ u8 (*read)(struct dw_hdmi *hdmi, int offset);
++};
++
+ #endif
+--- /dev/null
++++ b/drivers/gpu/drm/bridge/dw-hdmi-i2s-audio.c
+@@ -0,0 +1,141 @@
++/*
++ * dw-hdmi-i2s-audio.c
++ *
++ * Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <drm/bridge/dw_hdmi.h>
++
++#include <sound/hdmi-codec.h>
++
++#include "dw-hdmi.h"
++#include "dw-hdmi-audio.h"
++
++#define DRIVER_NAME "dw-hdmi-i2s-audio"
++
++static inline void hdmi_write(struct dw_hdmi_i2s_audio_data *audio,
++ u8 val, int offset)
++{
++ struct dw_hdmi *hdmi = audio->hdmi;
++
++ audio->write(hdmi, val, offset);
++}
++
++static inline u8 hdmi_read(struct dw_hdmi_i2s_audio_data *audio, int offset)
++{
++ struct dw_hdmi *hdmi = audio->hdmi;
++
++ return audio->read(hdmi, offset);
++}
++
++static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
++ struct hdmi_codec_daifmt *fmt,
++ struct hdmi_codec_params *hparms)
++{
++ struct dw_hdmi_i2s_audio_data *audio = data;
++ struct dw_hdmi *hdmi = audio->hdmi;
++ u8 conf0 = 0;
++ u8 conf1 = 0;
++ u8 inputclkfs = 0;
++
++ /* it cares I2S only */
++ if ((fmt->fmt != HDMI_I2S) ||
++ (fmt->bit_clk_master | fmt->frame_clk_master)) {
++ dev_err(dev, "unsupported format/settings\n");
++ return -EINVAL;
++ }
++
++ inputclkfs = HDMI_AUD_INPUTCLKFS_64FS;
++ conf0 = HDMI_AUD_CONF0_I2S_ALL_ENABLE;
++
++ switch (hparms->sample_width) {
++ case 16:
++ conf1 = HDMI_AUD_CONF1_WIDTH_16;
++ break;
++ case 24:
++ case 32:
++ conf1 = HDMI_AUD_CONF1_WIDTH_24;
++ break;
++ }
++
++ dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
++
++ hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
++ hdmi_write(audio, conf0, HDMI_AUD_CONF0);
++ hdmi_write(audio, conf1, HDMI_AUD_CONF1);
++
++ dw_hdmi_audio_enable(hdmi);
++
++ return 0;
++}
++
++static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
++{
++ struct dw_hdmi_i2s_audio_data *audio = data;
++ struct dw_hdmi *hdmi = audio->hdmi;
++
++ dw_hdmi_audio_disable(hdmi);
++
++ hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
++}
++
++static struct hdmi_codec_ops dw_hdmi_i2s_ops = {
++ .hw_params = dw_hdmi_i2s_hw_params,
++ .audio_shutdown = dw_hdmi_i2s_audio_shutdown,
++};
++
++static int snd_dw_hdmi_probe(struct platform_device *pdev)
++{
++ struct dw_hdmi_i2s_audio_data *audio = pdev->dev.platform_data;
++ struct platform_device_info pdevinfo;
++ struct hdmi_codec_pdata pdata;
++ struct platform_device *platform;
++
++ pdata.ops = &dw_hdmi_i2s_ops;
++ pdata.i2s = 1;
++ pdata.max_i2s_channels = 6;
++ pdata.data = audio;
++
++ memset(&pdevinfo, 0, sizeof(pdevinfo));
++ pdevinfo.parent = pdev->dev.parent;
++ pdevinfo.id = PLATFORM_DEVID_AUTO;
++ pdevinfo.name = HDMI_CODEC_DRV_NAME;
++ pdevinfo.data = &pdata;
++ pdevinfo.size_data = sizeof(pdata);
++ pdevinfo.dma_mask = DMA_BIT_MASK(32);
++
++ platform = platform_device_register_full(&pdevinfo);
++ if (IS_ERR(platform))
++ return PTR_ERR(platform);
++
++ dev_set_drvdata(&pdev->dev, platform);
++
++ return 0;
++}
++
++static int snd_dw_hdmi_remove(struct platform_device *pdev)
++{
++ struct platform_device *platform = dev_get_drvdata(&pdev->dev);
++
++ platform_device_unregister(platform);
++
++ return 0;
++}
++
++static struct platform_driver snd_dw_hdmi_driver = {
++ .probe = snd_dw_hdmi_probe,
++ .remove = snd_dw_hdmi_remove,
++ .driver = {
++ .name = DRIVER_NAME,
++ .owner = THIS_MODULE,
++ },
++};
++module_platform_driver(snd_dw_hdmi_driver);
++
++MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
++MODULE_DESCRIPTION("Synopsis Designware HDMI I2S ALSA SoC interface");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" DRIVER_NAME);
+--- a/drivers/gpu/drm/bridge/dw-hdmi.c
++++ b/drivers/gpu/drm/bridge/dw-hdmi.c
+@@ -1871,10 +1871,11 @@ int dw_hdmi_bind(struct device *dev, str
+ struct device_node *np = dev->of_node;
+ struct platform_device_info pdevinfo;
+ struct device_node *ddc_node;
+- struct dw_hdmi_audio_data audio;
+ struct dw_hdmi *hdmi;
+ int ret;
+ u32 val = 1;
++ u8 config0;
++ u8 config1;
+
+ hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
+ if (!hdmi)
+@@ -2011,7 +2012,12 @@ int dw_hdmi_bind(struct device *dev, str
+ pdevinfo.parent = dev;
+ pdevinfo.id = PLATFORM_DEVID_AUTO;
+
+- if (hdmi_readb(hdmi, HDMI_CONFIG1_ID) & HDMI_CONFIG1_AHB) {
++ config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
++ config1 = hdmi_readb(hdmi, HDMI_CONFIG1_ID);
++
++ if (config1 & HDMI_CONFIG1_AHB) {
++ struct dw_hdmi_audio_data audio;
++
+ audio.phys = iores->start;
+ audio.base = hdmi->regs;
+ audio.irq = irq;
+@@ -2022,6 +2028,18 @@ int dw_hdmi_bind(struct device *dev, str
+ pdevinfo.data = &audio;
+ pdevinfo.size_data = sizeof(audio);
+ pdevinfo.dma_mask = DMA_BIT_MASK(32);
++ hdmi->audio = platform_device_register_full(&pdevinfo);
++ } else if (config0 & HDMI_CONFIG0_I2S) {
++ struct dw_hdmi_i2s_audio_data audio;
++
++ audio.hdmi = hdmi;
++ audio.write = hdmi_writeb;
++ audio.read = hdmi_readb;
++
++ pdevinfo.name = "dw-hdmi-i2s-audio";
++ pdevinfo.data = &audio;
++ pdevinfo.size_data = sizeof(audio);
++ pdevinfo.dma_mask = DMA_BIT_MASK(32);
+ hdmi->audio = platform_device_register_full(&pdevinfo);
+ }
+
+--- a/drivers/gpu/drm/bridge/dw-hdmi.h
++++ b/drivers/gpu/drm/bridge/dw-hdmi.h
+@@ -545,6 +545,9 @@
+ #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR 0x7E12
+
+ enum {
++/* CONFIG0_ID field values */
++ HDMI_CONFIG0_I2S = 0x10,
++
+ /* CONFIG1_ID field values */
+ HDMI_CONFIG1_AHB = 0x01,
+
+@@ -891,6 +894,17 @@ enum {
+ HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
+ HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
+
++/* AUD_CONF0 field values */
++ HDMI_AUD_CONF0_SW_RESET = 0x80,
++ HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
++
++/* AUD_CONF1 field values */
++ HDMI_AUD_CONF1_MODE_I2S = 0x00,
++ HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
++ HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
++ HDMI_AUD_CONF1_WIDTH_16 = 0x10,
++ HDMI_AUD_CONF1_WIDTH_24 = 0x18,
++
+ /* AUD_CTS3 field values */
+ HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
+ HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
+@@ -905,6 +919,12 @@ enum {
+ HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
+ HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
+
++/* HDMI_AUD_INPUTCLKFS field values */
++ HDMI_AUD_INPUTCLKFS_128FS = 0,
++ HDMI_AUD_INPUTCLKFS_256FS = 1,
++ HDMI_AUD_INPUTCLKFS_512FS = 2,
++ HDMI_AUD_INPUTCLKFS_64FS = 4,
++
+ /* AHB_DMA_CONF0 field values */
+ HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
+ HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
diff --git a/series b/series
index 8353aae..5ebb803 100644
--- a/series
+++ b/series
@@ -20,6 +20,306 @@
#############################################################################
# Renesas patches
#
+patches.renesas/0001-drm-bridge-adv7511-Add-Audio-support.patch
+patches.renesas/0002-drm-bridge-adv7511-Enable-the-audio-data-and-clock-p.patch
+patches.renesas/0003-media-cec-pass-parent-device-in-register-not-allocat.patch
+patches.renesas/0004-ASoC-rsnd-depends-on-OF.patch
+patches.renesas/0005-ASoC-rsnd-enable-COMPILE_TEST.patch
+patches.renesas/0006-arm64-dts-r8a7795-salvator-x-enable-UHS-for-SDHI-0-3.patch
+patches.renesas/0007-arm64-dts-r8a7796-salvator-x-Populate-EXTALR.patch
+patches.renesas/0008-arm64-dts-r8a7795-salvator-x-Add-DU-LVDS-output-endp.patch
+patches.renesas/0009-arm64-defconfig-Enable-DRM-DU-and-V4L2-FCP-VSP-modul.patch
+patches.renesas/0010-arm64-dts-r8a7795-Remove-FCP-SoC-specific-compatible.patch
+patches.renesas/0011-arm64-dts-r8a7796-add-SDHI-nodes.patch
+patches.renesas/0012-arm64-Enable-HIBERNATION-in-defconfig.patch
+patches.renesas/0013-Input-gpio_keys_polled-keep-button-data-constant.patch
+patches.renesas/0014-Input-gpio_keys-annotate-PM-methods-as-__maybe_unuse.patch
+patches.renesas/0015-Input-gpio_keys-fix-leaking-DT-node-references.patch
+patches.renesas/0016-Input-gpio_keys-switch-to-using-generic-device-prope.patch
+patches.renesas/0017-Input-gpio_keys-set-input-direction-explicitly.patch
+patches.renesas/0018-regulator-gpio-properly-check-return-value-of-of_get.patch
+patches.renesas/0019-i2c-rcar-Add-per-Generation-fallback-bindings.patch
+patches.renesas/0020-i2c-sh_mobile-Add-per-Generation-fallback-bindings.patch
+patches.renesas/0021-base-soc-Early-register-bus-when-needed.patch
+patches.renesas/0022-base-soc-Introduce-soc_device_match-interface.patch
+patches.renesas/0023-base-soc-Check-for-NULL-SoC-device-attributes.patch
+patches.renesas/0024-base-soc-Provide-a-dummy-implementation-of-soc_devic.patch
+patches.renesas/0025-ARM-shmobile-Document-DT-bindings-for-Product-Regist.patch
+patches.renesas/0026-soc-renesas-Identify-SoC-and-register-with-the-SoC-b.patch
+patches.renesas/0027-ARM-shmobile-r8a7743-add-power-domain-index-macros.patch
+patches.renesas/0028-soc-renesas-rcar-sysc-add-R8A7743-support.patch
+patches.renesas/0029-ARM-shmobile-r8a7745-add-power-domain-index-macros.patch
+patches.renesas/0030-soc-renesas-rcar-sysc-add-R8A7745-support.patch
+patches.renesas/0031-PCI-rcar-gen2-Use-gen2-fallback-compatibility-last.patch
+patches.renesas/0032-PCI-rcar-Use-gen2-fallback-compatibility-last.patch
+patches.renesas/0033-PCI-rcar-Add-gen3-fallback-compatibility-string-for-.patch
+patches.renesas/0034-net-phy-phy-drivers-should-not-set-SUPPORTED_-Asym_-.patch
+patches.renesas/0035-net-phy-micrel-KSZ8795-do-not-set-SUPPORTED_-Asym_-P.patch
+patches.renesas/0036-phy-rcar-gen3-usb2-add-sysfs-for-usb-role-swap.patch
+patches.renesas/0037-can-rcar_can-Add-r8a7796-support.patch
+patches.renesas/0038-can-rcar_canfd-Add-r8a7796-support.patch
+patches.renesas/0039-can-rcar_canfd-Correct-order-of-interrupt-specifiers.patch
+patches.renesas/0040-dmaengine-rcar-dmac-Document-R-Car-M3-W-bindings.patch
+patches.renesas/0041-drm-Add-reference-counting-to-drm_atomic_state.patch
+patches.renesas/0042-drm-define-drm_compat_ioctl-NULL-on-CONFIG_COMPAT-n-.patch
+patches.renesas/0043-drm-Make-the-connector-.detect-callback-optional.patch
+patches.renesas/0044-drm-rcar-du-Constify-node-argument-to-rcar_du_lvds_c.patch
+patches.renesas/0045-drm-rcar-du-Bring-HDMI-encoder-comments-in-line-with.patch
+patches.renesas/0046-drm-rcar-du-Remove-test-for-impossible-error-conditi.patch
+patches.renesas/0047-drm-rcar-du-Remove-memory-allocation-error-message.patch
+patches.renesas/0048-drm-rcar-du-Fix-crash-in-encoder-failure-error-path.patch
+patches.renesas/0049-drm-rcar-du-Simplify-and-fix-probe-error-handling.patch
+patches.renesas/0050-drm-rcar-du-Add-R8A7792-support.patch
+patches.renesas/0051-drm-rcar-du-Add-R8A7796-support.patch
+patches.renesas/0052-drm-rcar-du-Fix-dot-clock-routing-configuration.patch
+patches.renesas/0053-drm-rcar-du-Fix-display-timing-controller-parameter.patch
+patches.renesas/0054-drm-rcar-du-Fix-H-V-sync-signal-polarity-configurati.patch
+patches.renesas/0055-drm-rcar-du-Fix-LVDS-start-sequence-on-Gen3.patch
+patches.renesas/0056-dt-bindings-media-renesas-fcp-Remove-SoC-specific-co.patch
+patches.renesas/0057-media-v4l-rcar-fcp-Fix-module-autoload-for-OF-regist.patch
+patches.renesas/0058-reset-Add-renesas-rst-DT-bindings.patch
+patches.renesas/0059-soc-renesas-Add-R-Car-RST-driver.patch
+patches.renesas/0060-ASoC-rsnd-remove-duplicate-define-of-rsnd_dvc_of_nod.patch
+patches.renesas/0061-ASoC-rsnd-amend-.probe-.remove-call-for-DPCM.patch
+patches.renesas/0062-ASoC-rsnd-add-rsnd_mod_next-for-for_each_rsnd_mod_xx.patch
+patches.renesas/0063-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_dai_call.patch
+patches.renesas/0064-ASoC-rsnd-use-for_each_rsnd_mod_xxx-on-rsnd_rdai_con.patch
+patches.renesas/0065-ASoC-rsnd-add-rsnd_parse_of_node-and-integrate-rsnd_.patch
+patches.renesas/0066-ASoC-rsnd-remove-non-DT-support-for-DMA.patch
+patches.renesas/0067-ASoC-rsnd-don-t-use-devm_request_irq-for-SSI.patch
+patches.renesas/0068-ASoC-rsnd-remove-rsnd_dma_detach.patch
+patches.renesas/0069-ASoC-rsnd-don-t-call-unneeded-of_node_put-on-dma.c.patch
+patches.renesas/0070-ASoC-rsnd-add-nolock_start-stop-callback.patch
+patches.renesas/0071-ASoC-rsnd-remove-Gen2-only-comment.patch
+patches.renesas/0072-ASoC-rsnd-rsnd_reg-cleanup-for-SSIU.patch
+patches.renesas/0073-ASoC-rsnd-fixup-SCU_SYS_STATUSx-access.patch
+patches.renesas/0074-ASoC-rsnd-clear-SSI_SYS_STATUSx-every-time.patch
+patches.renesas/0075-ASoC-rsnd-enable-SRC-sync-even-FIN-FOUT.patch
+patches.renesas/0076-ASoC-rsnd-use-BRGCKR-instead-of-SSICKR.patch
+patches.renesas/0077-ASoC-rsnd-Request-Release-DMA-channel-each-time.patch
+patches.renesas/0078-ASoC-rsnd-use-dma_sync_single_for_xxx-for-IOMMU.patch
+patches.renesas/0079-ASoC-rsnd-rsnd_get_dalign-needs-to-care-SSIU-not-SSI.patch
+patches.renesas/0080-ASoC-rsnd-tidyup-ssi-usrcnt-counter-check-in-hw_para.patch
+patches.renesas/0081-ASoC-rsnd-enable-disable-ADG-when-suspend-resume-tim.patch
+patches.renesas/0082-ASoC-rsnd-setup-BRGCKR-BRRA-BRRB-when-starting.patch
+patches.renesas/0083-ASoC-rsnd-don-t-double-free-kctrl.patch
+patches.renesas/0084-spi-rspi-supports-32bytes-buffer-for-DUAL-and-QUAD.patch
+patches.renesas/0085-spi-rspi-avoid-uninitialized-variable-access.patch
+patches.renesas/0086-mmc-sh_mmcif-Document-r8a73a4-r8a7778-and-sh73a0-DT-.patch
+patches.renesas/0087-mmc-sh_mobile_sdhi-add-ocr_mask-option.patch
+patches.renesas/0088-mmc-tmio-mmc-add-support-for-32bit-data-port.patch
+patches.renesas/0089-mmc-sh_mobile_sdhi-Add-r7s72100-support.patch
+patches.renesas/0090-spi-sh-msiof-Add-support-for-R-Car-M3-W.patch
+patches.renesas/0091-spi-sh-msiof-Add-R-Car-Gen-2-and-3-fallback-bindings.patch
+patches.renesas/0092-spi-sh-msiof-Do-not-use-C-style-comment.patch
+patches.renesas/0093-pinctrl-sh-pfc-r8a7796-Add-I2C-pin-support.patch
+patches.renesas/0094-pinctrl-sh-pfc-r8a7796-Add-DRIF-support.patch
+patches.renesas/0095-pinctrl-sh-pfc-r8a7796-Fix-GPSR-definitions-for-SDHI.patch
+patches.renesas/0096-pinctrl-sh-pfc-r8a7796-Add-EtherAVB-pins-groups-and-.patch
+patches.renesas/0097-pinctrl-sh-pfc-r8a7796-Add-DU-support.patch
+patches.renesas/0098-pinctrl-sh-pfc-r8a7795-Simplify-get-bias-logic.patch
+patches.renesas/0099-pinctrl-sh-pfc-r8a7778-Use-lookup-function-for-bias-.patch
+patches.renesas/0100-pinctrl-sh-pfc-Support-named-pins-with-custom-config.patch
+patches.renesas/0101-pinctrl-sh-pfc-r8a7795-Support-none-GPIO-pins-with-c.patch
+patches.renesas/0102-pinctrl-sh-pfc-r8a7795-Add-group-for-AVB-MDIO-and-MI.patch
+patches.renesas/0103-pinctrl-sh-pfc-r8a7795-Add-group-for-QSPI0-and-QSPI1.patch
+patches.renesas/0104-serial-sh-sci-Fix-deadlock-caused-by-serial-output-r.patch
+patches.renesas/0105-ASoC-constify-snd_soc_ops-structures.patch
+patches.renesas/0106-ASoC-simple-scu-card-code-sync-follow-to-simple-fami.patch
+patches.renesas/0107-ASoC-simple-scu-card-code-sync-rename-asoc_simple_ca.patch
+patches.renesas/0108-ASoC-simple-scu-card-code-sync-tidyup-props-link-nam.patch
+patches.renesas/0109-usb-renesas_usbhs-cleanup-with-list_first_entry_or_n.patch
+patches.renesas/0110-media-v4l-vsp1-Add-support-for-capture-and-output-in.patch
+patches.renesas/0111-media-v4l-vsp1-Fix-module-autoload-for-OF-registrati.patch
+patches.renesas/0112-ASoC-wm8978-Adjust-clock-indices-so-that-simple-card.patch
+patches.renesas/0113-usb-host-xhci-rcar-add-a-new-firmware-version-for-r8.patch
+patches.renesas/0114-usb-host-xhci-plat-add-support-for-Renesas-r8a7796-S.patch
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+patches.renesas/0143-arm64-defconfig-Do-not-lower-CONFIG_LOG_BUF_SHIFT.patch
+patches.renesas/0144-arm64-defconfig-drop-GPIO_SYSFS-on-multiplatforms.patch
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+patches.renesas/0148-mmc-tmio-enhance-illegal-sequence-handling.patch
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+patches.renesas/0152-mmc-sh_mobile_sdhi-Add-tuning-support.patch
+patches.renesas/0153-mmc-tmio-fix-wrong-bitmask-for-SDIO-irqs.patch
+patches.renesas/0154-mmc-tmio-remove-SDIO-from-TODO-list.patch
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+patches.renesas/0158-media-videodev2.h-Add-HSV-encoding.patch
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+patches.renesas/0163-clk-renesas-cpg-mssr-Always-use-readl-writel.patch
+patches.renesas/0164-clk-renesas-rcar-gen3-cpg-Always-use-readl-writel.patch
+patches.renesas/0165-clk-renesas-r8a7796-Add-DRIF-clock.patch
+patches.renesas/0166-clk-renesas-cpg-mssr-Remove-bogus-commas-from-error-.patch
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+patches.renesas/0170-ARM-dts-r8a7778-Add-device-node-for-RESET-WDT-module.patch
+patches.renesas/0171-ARM-dts-r8a7779-Add-device-node-for-RESET-WDT-module.patch
+patches.renesas/0172-ARM-dts-r8a7790-Add-device-node-for-RST-module.patch
+patches.renesas/0173-ARM-dts-r8a7791-Add-device-node-for-RST-module.patch
+patches.renesas/0174-ARM-dts-r8a7792-Add-device-node-for-RST-module.patch
+patches.renesas/0175-ARM-dts-r8a7793-Add-device-node-for-RST-module.patch
+patches.renesas/0176-ARM-dts-r8a7794-Add-device-node-for-RST-module.patch
+patches.renesas/0177-arm64-renesas-r8a7795-dtsi-Add-device-node-for-RST-m.patch
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+patches.renesas/0179-clk-renesas-r8a7778-Obtain-mode-pin-values-using-R-C.patch
+patches.renesas/0180-clk-renesas-r8a7779-Obtain-mode-pin-values-from-R-Ca.patch
+patches.renesas/0181-clk-renesas-rcar-gen2-Obtain-mode-pin-values-using-R.patch
+patches.renesas/0182-clk-renesas-r8a7795-Obtain-mode-pin-values-from-R-Ca.patch
+patches.renesas/0183-clk-renesas-r8a7796-Obtain-mode-pin-values-from-R-Ca.patch
+patches.renesas/0184-clk-renesas-rcar-gen3-cpg-Remove-obsolete-rcar_gen3_.patch
+patches.renesas/0185-ARM-shmobile-r8a7778-Stop-passing-mode-pins-state-to.patch
+patches.renesas/0186-ARM-shmobile-r8a7779-Stop-passing-mode-pins-state-to.patch
+patches.renesas/0187-ARM-shmobile-rcar-gen2-Stop-passing-mode-pins-state-.patch
+patches.renesas/0188-clk-renesas-r8a7778-Remove-obsolete-r8a7778_clocks_i.patch
+patches.renesas/0189-clk-renesas-r8a7779-Remove-obsolete-r8a7779_clocks_i.patch
+patches.renesas/0190-clk-renesas-rcar-gen2-Remove-obsolete-rcar_gen2_cloc.patch
+patches.renesas/0191-clk-renesas-Add-r8a7743-CPG-Core-Clock-Definitions.patch
+patches.renesas/0192-clk-renesas-Add-r8a7745-CPG-Core-Clock-Definitions.patch
+patches.renesas/0193-clk-renesas-r8a7796-Add-CSI2-clocks.patch
+patches.renesas/0194-clk-renesas-r8a7796-Add-VIN-clocks.patch
+patches.renesas/0195-clk-renesas-r8a7795-Fix-HDMI-parent-clock.patch
+patches.renesas/0196-clk-renesas-cpg-mssr-Add-common-R-Car-Gen2-support.patch
+patches.renesas/0197-clk-renesas-cpg-mssr-Add-R8A7743-support.patch
+patches.renesas/0198-clk-renesas-cpg-mssr-Add-R8A7745-support.patch
+patches.renesas/0199-ARM-dts-r7s72100-add-mmcif-clock-to-device-tree.patch
+patches.renesas/0200-ARM-dts-r8a7791-set-maximum-frequency-for-SDHI-clock.patch
+patches.renesas/0201-ARM-shmobile-defconfig-Enable-CONFIG_CGROUPS.patch
+patches.renesas/0202-ARM-shmobile-Sort-Kconfig-selections.patch
+patches.renesas/0203-ARM-shmobile-r8a7743-basic-SoC-support.patch
+patches.renesas/0204-ARM-shmobile-document-SK-RZG1M-board.patch
+patches.renesas/0205-ARM-shmobile-r8a7794-alt-Add-board-part-number-to-DT.patch
+patches.renesas/0206-ARM-shmobile-r8a7793-gose-Add-board-part-number-to-D.patch
+patches.renesas/0207-ARM-shmobile-Consolidate-R8A7743-and-R8A779-234-mach.patch
+patches.renesas/0208-ARM-shmobile-select-errata-798181-for-SoCs-with-CA15.patch
+patches.renesas/0209-ARM-shmobile-r8a7779-marzen-Add-board-part-number-to.patch
+patches.renesas/0210-ARM-dts-koelsch-enable-UHS-for-SDHI-0-1-3.patch
+patches.renesas/0211-ARM-dts-r8a7794-set-maximum-frequency-for-SDHI-clock.patch
+patches.renesas/0212-ARM-dts-alt-enable-UHS-for-SDHI-0-1.patch
+patches.renesas/0213-ARM-dts-r8a7790-Correct-SCIFB-reg-properties-to-cove.patch
+patches.renesas/0214-ARM-dts-r8a7791-Correct-SCIFB-reg-properties-to-cove.patch
+patches.renesas/0215-ARM-dts-r8a7793-Correct-SCIFB-reg-properties-to-cove.patch
+patches.renesas/0216-ARM-dts-r8a7794-Correct-SCIFB-reg-properties-to-cove.patch
+patches.renesas/0217-ARM-dts-wheat-add-DU-support.patch
+patches.renesas/0218-ARM-dts-r8a7792-add-MSIOF-clocks.patch
+patches.renesas/0219-ARM-dts-r8a7792-add-MSIOF-support.patch
+patches.renesas/0220-ARM-dts-r7s72100-add-mmcif-to-device-tree.patch
+patches.renesas/0221-ARM-dts-r7s72100-add-sdhi-clock-to-device-tree.patch
+patches.renesas/0222-ARM-dts-gose-use-generic-pinctrl-properties-in-SDHI-.patch
+patches.renesas/0223-ARM-dts-r8a7794-Fix-W-1-dtc-warnings.patch
+patches.renesas/0224-ARM-dts-r7s72100-add-sdhi-to-device-tree.patch
+patches.renesas/0225-ARM-dts-rskrza1-add-sdhi1-DT-support.patch
+patches.renesas/0226-ARM-dts-lager-Add-entries-for-VIN-HDMI-input-support.patch
+patches.renesas/0227-ARM-dts-koelsch-add-HDMI-input.patch
+patches.renesas/0228-ARM-dts-r8a7793-Enable-VIN0-VIN2.patch
+patches.renesas/0229-ARM-dts-r8a7779-Fix-DU-reg-property.patch
+patches.renesas/0230-ARM-dts-emev2-Remove-skeleton.dtsi-inclusion.patch
+patches.renesas/0231-ARM-dts-r8a7778-Remove-skeleton.dtsi-inclusion.patch
+patches.renesas/0232-ARM-dts-r8a7779-Remove-skeleton.dtsi-inclusion.patch
+patches.renesas/0233-ARM-dts-r8a7740-Remove-skeleton.dtsi-inclusion.patch
+patches.renesas/0234-ARM-dts-sh73a0-Remove-skeleton.dtsi-inclusion.patch
+patches.renesas/0235-ARM-dts-r8a7779-marzen-Configure-pinmuxing-for-the-D.patch
+patches.renesas/0236-ARM-shmobile-r8a7745-basic-SoC-support.patch
+patches.renesas/0237-ARM-shmobile-document-SK-RZG1E-board.patch
+patches.renesas/0238-ARM-dts-alt-Fix-PFC-names-for-DU.patch
+patches.renesas/0239-ARM-dts-lager-rename-and-reindex-i2cexio.patch
+patches.renesas/0240-ARM-dts-lager-use-demuxer-for-IIC1-I2C1.patch
+patches.renesas/0241-ARM-dts-koelsch-use-demuxer-for-I2C1.patch
+patches.renesas/0242-ARM-dts-alt-use-demuxer-for-I2C4.patch
+patches.renesas/0243-ARM-dts-lager-Enable-UHS-I-SDR-104.patch
+patches.renesas/0244-ARM-dts-koelsch-Enable-UHS-I-SDR-104.patch
+patches.renesas/0245-ARM-dts-alt-Enable-UHS-I-SDR-104.patch
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+patches.renesas/0247-ARM-dts-r8a7743-add-SYS-DMAC-support.patch
+patches.renesas/0248-ARM-dts-r8a7743-add-H-SCIF-A-B-support.patch
+patches.renesas/0249-ARM-dts-r8a7743-add-Ether-support.patch
+patches.renesas/0250-ARM-dts-r8a7743-add-IRQC-support.patch
+patches.renesas/0251-ARM-dts-sk-rzg1m-initial-device-tree.patch
+patches.renesas/0252-ARM-dts-sk-rzg1m-add-Ether-support.patch
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+patches.renesas/0254-ARM-dts-r8a7745-add-SYS-DMAC-support.patch
+patches.renesas/0255-ARM-dts-r8a7745-add-H-SCIF-A-B-support.patch
+patches.renesas/0256-ARM-dts-r8a7745-add-Ether-support.patch
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+patches.renesas/0258-ARM-dts-sk-rzg1e-initial-device-tree.patch
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+patches.renesas/0261-ARM-dts-r8a7779-Add-device-node-for-PRR.patch
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+patches.renesas/0269-media-v4l-Add-Renesas-R-Car-FDP1-Driver.patch
+patches.renesas/0270-media-v4l-rcar_fdp1-mark-PM-functions-as-__maybe_unu.patch
+patches.renesas/0271-usb-add-helper-to-extract-bits-12-11-of-wMaxPacketSi.patch
+patches.renesas/0272-usb-host-xhci-make-use-of-new-usb_endpoint_maxp_mult.patch
+patches.renesas/0273-usb-host-xhci-purge-GET_MAX_PACKET.patch
+patches.renesas/0274-xhci-remove-unnecessary-xhci_quiesce-call-before-xhc.patch
+patches.renesas/0275-xhci-cleanup-error-message-if-halting-the-host-faile.patch
+patches.renesas/0276-xhci-don-t-try-to-reset-the-host-if-it-is-unaccessib.patch
+patches.renesas/0277-xhci-use-trb-helper-functions-when-possible.patch
+patches.renesas/0278-xhci-add-trb_is_noop-helper-function.patch
+patches.renesas/0279-xhci-remove-extra-URB_SHORT_NOT_OK-checks-in-xhci-co.patch
+patches.renesas/0280-xhci-cleanup-and-refactor-process_ctrl_td.patch
+patches.renesas/0281-xhci-cleanup-and-refactor-process_bulk_intr_td.patch
+patches.renesas/0282-xhci-rename-endpoint-related-trb-variables.patch
+patches.renesas/0283-xhci-refactor-and-cleanup-process_isoc_td.patch
+patches.renesas/0284-xhci-cleanup-and-refactor-td_to_noop.patch
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+patches.renesas/0286-xhci-refactor-handle_tx_event-urb-giveback.patch
+patches.renesas/0287-xhci-Giveback-urb-in-finish_td-directly.patch
+patches.renesas/0288-xhci-Remove-duplicate-xhci-urb-giveback-functions.patch
+patches.renesas/0289-usb-xhci-clean-up-error_bitmask-usage.patch
+patches.renesas/0290-xhci-add-helper-to-get-the-endpoint-state-of-a-endpo.patch
+patches.renesas/0291-usb-xhci-cleanup-cmd_completion-in-xhci_virt_device.patch
+patches.renesas/0292-usb-xhci-remove-the-use-of-xhci-addr_dev.patch
+patches.renesas/0293-usb-xhci-move-slot_id-from-xhci_hcd-to-xhci_command-.patch
+patches.renesas/0294-xhci-Fix-race-related-to-abort-operation.patch
+patches.renesas/0295-usb-host-xhci-handle-COMP_STOP-from-SETUP-phase-too.patch
+patches.renesas/0296-xhci-remove-WARN_ON-if-dma-mask-is-not-set-for-platf.patch
+patches.renesas/0297-drm-dw_hdmi-use-of_get_i2c_adapter_by_node-interface.patch
+patches.renesas/0298-drm-bridge-dw_hdmi-add-dw-hdmi-i2c-bus-adapter-suppo.patch
+patches.renesas/0299-drm-bridge-add-DesignWare-HDMI-I2S-audio-support.patch
+
#############################################################################
# Misc patches
